aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_object.h203
1 files changed, 203 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
new file mode 100644
index 000000000000..675bdc30e41d
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -0,0 +1,203 @@
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28#ifndef __AMDGPU_OBJECT_H__
29#define __AMDGPU_OBJECT_H__
30
31#include <drm/amdgpu_drm.h>
32#include "amdgpu.h"
33
34/**
35 * amdgpu_mem_type_to_domain - return domain corresponding to mem_type
36 * @mem_type: ttm memory type
37 *
38 * Returns corresponding domain of the ttm mem_type
39 */
40static inline unsigned amdgpu_mem_type_to_domain(u32 mem_type)
41{
42 switch (mem_type) {
43 case TTM_PL_VRAM:
44 return AMDGPU_GEM_DOMAIN_VRAM;
45 case TTM_PL_TT:
46 return AMDGPU_GEM_DOMAIN_GTT;
47 case TTM_PL_SYSTEM:
48 return AMDGPU_GEM_DOMAIN_CPU;
49 case AMDGPU_PL_GDS:
50 return AMDGPU_GEM_DOMAIN_GDS;
51 case AMDGPU_PL_GWS:
52 return AMDGPU_GEM_DOMAIN_GWS;
53 case AMDGPU_PL_OA:
54 return AMDGPU_GEM_DOMAIN_OA;
55 default:
56 break;
57 }
58 return 0;
59}
60
61/**
62 * amdgpu_bo_reserve - reserve bo
63 * @bo: bo structure
64 * @no_intr: don't return -ERESTARTSYS on pending signal
65 *
66 * Returns:
67 * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
68 * a signal. Release all buffer reservations and return to user-space.
69 */
70static inline int amdgpu_bo_reserve(struct amdgpu_bo *bo, bool no_intr)
71{
72 int r;
73
74 r = ttm_bo_reserve(&bo->tbo, !no_intr, false, false, 0);
75 if (unlikely(r != 0)) {
76 if (r != -ERESTARTSYS)
77 dev_err(bo->adev->dev, "%p reserve failed\n", bo);
78 return r;
79 }
80 return 0;
81}
82
83static inline void amdgpu_bo_unreserve(struct amdgpu_bo *bo)
84{
85 ttm_bo_unreserve(&bo->tbo);
86}
87
88/**
89 * amdgpu_bo_gpu_offset - return GPU offset of bo
90 * @bo: amdgpu object for which we query the offset
91 *
92 * Returns current GPU offset of the object.
93 *
94 * Note: object should either be pinned or reserved when calling this
95 * function, it might be useful to add check for this for debugging.
96 */
97static inline u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo)
98{
99 return bo->tbo.offset;
100}
101
102static inline unsigned long amdgpu_bo_size(struct amdgpu_bo *bo)
103{
104 return bo->tbo.num_pages << PAGE_SHIFT;
105}
106
107static inline unsigned amdgpu_bo_ngpu_pages(struct amdgpu_bo *bo)
108{
109 return (bo->tbo.num_pages << PAGE_SHIFT) / AMDGPU_GPU_PAGE_SIZE;
110}
111
112static inline unsigned amdgpu_bo_gpu_page_alignment(struct amdgpu_bo *bo)
113{
114 return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / AMDGPU_GPU_PAGE_SIZE;
115}
116
117/**
118 * amdgpu_bo_mmap_offset - return mmap offset of bo
119 * @bo: amdgpu object for which we query the offset
120 *
121 * Returns mmap offset of the object.
122 */
123static inline u64 amdgpu_bo_mmap_offset(struct amdgpu_bo *bo)
124{
125 return drm_vma_node_offset_addr(&bo->tbo.vma_node);
126}
127
128int amdgpu_bo_create(struct amdgpu_device *adev,
129 unsigned long size, int byte_align,
130 bool kernel, u32 domain, u64 flags,
131 struct sg_table *sg,
132 struct amdgpu_bo **bo_ptr);
133int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
134 unsigned long size, int byte_align,
135 bool kernel, u32 domain, u64 flags,
136 struct sg_table *sg,
137 struct ttm_placement *placement,
138 struct amdgpu_bo **bo_ptr);
139int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr);
140void amdgpu_bo_kunmap(struct amdgpu_bo *bo);
141struct amdgpu_bo *amdgpu_bo_ref(struct amdgpu_bo *bo);
142void amdgpu_bo_unref(struct amdgpu_bo **bo);
143int amdgpu_bo_pin(struct amdgpu_bo *bo, u32 domain, u64 *gpu_addr);
144int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
145 u64 min_offset, u64 max_offset,
146 u64 *gpu_addr);
147int amdgpu_bo_unpin(struct amdgpu_bo *bo);
148int amdgpu_bo_evict_vram(struct amdgpu_device *adev);
149void amdgpu_bo_force_delete(struct amdgpu_device *adev);
150int amdgpu_bo_init(struct amdgpu_device *adev);
151void amdgpu_bo_fini(struct amdgpu_device *adev);
152int amdgpu_bo_fbdev_mmap(struct amdgpu_bo *bo,
153 struct vm_area_struct *vma);
154int amdgpu_bo_set_tiling_flags(struct amdgpu_bo *bo, u64 tiling_flags);
155void amdgpu_bo_get_tiling_flags(struct amdgpu_bo *bo, u64 *tiling_flags);
156int amdgpu_bo_set_metadata (struct amdgpu_bo *bo, void *metadata,
157 uint32_t metadata_size, uint64_t flags);
158int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,
159 size_t buffer_size, uint32_t *metadata_size,
160 uint64_t *flags);
161void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
162 struct ttm_mem_reg *new_mem);
163int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
164void amdgpu_bo_fence(struct amdgpu_bo *bo, struct amdgpu_fence *fence,
165 bool shared);
166
167/*
168 * sub allocation
169 */
170
171static inline uint64_t amdgpu_sa_bo_gpu_addr(struct amdgpu_sa_bo *sa_bo)
172{
173 return sa_bo->manager->gpu_addr + sa_bo->soffset;
174}
175
176static inline void * amdgpu_sa_bo_cpu_addr(struct amdgpu_sa_bo *sa_bo)
177{
178 return sa_bo->manager->cpu_ptr + sa_bo->soffset;
179}
180
181int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
182 struct amdgpu_sa_manager *sa_manager,
183 unsigned size, u32 align, u32 domain);
184void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
185 struct amdgpu_sa_manager *sa_manager);
186int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,
187 struct amdgpu_sa_manager *sa_manager);
188int amdgpu_sa_bo_manager_suspend(struct amdgpu_device *adev,
189 struct amdgpu_sa_manager *sa_manager);
190int amdgpu_sa_bo_new(struct amdgpu_device *adev,
191 struct amdgpu_sa_manager *sa_manager,
192 struct amdgpu_sa_bo **sa_bo,
193 unsigned size, unsigned align);
194void amdgpu_sa_bo_free(struct amdgpu_device *adev,
195 struct amdgpu_sa_bo **sa_bo,
196 struct amdgpu_fence *fence);
197#if defined(CONFIG_DEBUG_FS)
198void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
199 struct seq_file *m);
200#endif
201
202
203#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-04 18:31:36 -0400