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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_object.c47
1 files changed, 16 insertions, 31 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 1479d09bd4dd..bf79b73e1538 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -128,17 +128,6 @@ static void amdgpu_ttm_placement_init(struct amdgpu_device *adev,
128 if (flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS) 128 if (flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)
129 lpfn = adev->mc.real_vram_size >> PAGE_SHIFT; 129 lpfn = adev->mc.real_vram_size >> PAGE_SHIFT;
130 130
131 if (flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS &&
132 !(flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) &&
133 adev->mc.visible_vram_size < adev->mc.real_vram_size) {
134 places[c].fpfn = visible_pfn;
135 places[c].lpfn = lpfn;
136 places[c].flags = TTM_PL_FLAG_WC |
137 TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM |
138 TTM_PL_FLAG_TOPDOWN;
139 c++;
140 }
141
142 places[c].fpfn = 0; 131 places[c].fpfn = 0;
143 places[c].lpfn = lpfn; 132 places[c].lpfn = lpfn;
144 places[c].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | 133 places[c].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
@@ -382,39 +371,36 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
382 371
383 amdgpu_fill_placement_to_bo(bo, placement); 372 amdgpu_fill_placement_to_bo(bo, placement);
384 /* Kernel allocation are uninterruptible */ 373 /* Kernel allocation are uninterruptible */
374
375 if (!resv) {
376 bool locked;
377
378 reservation_object_init(&bo->tbo.ttm_resv);
379 locked = ww_mutex_trylock(&bo->tbo.ttm_resv.lock);
380 WARN_ON(!locked);
381 }
385 r = ttm_bo_init(&adev->mman.bdev, &bo->tbo, size, type, 382 r = ttm_bo_init(&adev->mman.bdev, &bo->tbo, size, type,
386 &bo->placement, page_align, !kernel, NULL, 383 &bo->placement, page_align, !kernel, NULL,
387 acc_size, sg, resv, &amdgpu_ttm_bo_destroy); 384 acc_size, sg, resv ? resv : &bo->tbo.ttm_resv,
388 if (unlikely(r != 0)) { 385 &amdgpu_ttm_bo_destroy);
386 if (unlikely(r != 0))
389 return r; 387 return r;
390 }
391 388
392 if (flags & AMDGPU_GEM_CREATE_VRAM_CLEARED && 389 if (flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
393 bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) { 390 bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
394 struct dma_fence *fence; 391 struct dma_fence *fence;
395 392
396 if (adev->mman.buffer_funcs_ring == NULL || 393 r = amdgpu_fill_buffer(bo, 0, bo->tbo.resv, &fence);
397 !adev->mman.buffer_funcs_ring->ready) { 394 if (unlikely(r))
398 r = -EBUSY;
399 goto fail_free;
400 }
401
402 r = amdgpu_bo_reserve(bo, false);
403 if (unlikely(r != 0))
404 goto fail_free;
405
406 amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
407 r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
408 if (unlikely(r != 0))
409 goto fail_unreserve; 395 goto fail_unreserve;
410 396
411 amdgpu_fill_buffer(bo, 0, bo->tbo.resv, &fence);
412 amdgpu_bo_fence(bo, fence, false); 397 amdgpu_bo_fence(bo, fence, false);
413 amdgpu_bo_unreserve(bo);
414 dma_fence_put(bo->tbo.moving); 398 dma_fence_put(bo->tbo.moving);
415 bo->tbo.moving = dma_fence_get(fence); 399 bo->tbo.moving = dma_fence_get(fence);
416 dma_fence_put(fence); 400 dma_fence_put(fence);
417 } 401 }
402 if (!resv)
403 ww_mutex_unlock(&bo->tbo.resv->lock);
418 *bo_ptr = bo; 404 *bo_ptr = bo;
419 405
420 trace_amdgpu_bo_create(bo); 406 trace_amdgpu_bo_create(bo);
@@ -422,8 +408,7 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
422 return 0; 408 return 0;
423 409
424fail_unreserve: 410fail_unreserve:
425 amdgpu_bo_unreserve(bo); 411 ww_mutex_unlock(&bo->tbo.resv->lock);
426fail_free:
427 amdgpu_bo_unref(&bo); 412 amdgpu_bo_unref(&bo);
428 return r; 413 return r;
429} 414}