diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c index 4fcd98e65998..83435ccbad44 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | |||
@@ -109,9 +109,26 @@ void amdgpu_gfx_parse_disable_cu(unsigned *mask, unsigned max_se, unsigned max_s | |||
109 | } | 109 | } |
110 | } | 110 | } |
111 | 111 | ||
112 | static bool amdgpu_gfx_is_multipipe_capable(struct amdgpu_device *adev) | ||
113 | { | ||
114 | if (amdgpu_compute_multipipe != -1) { | ||
115 | DRM_INFO("amdgpu: forcing compute pipe policy %d\n", | ||
116 | amdgpu_compute_multipipe); | ||
117 | return amdgpu_compute_multipipe == 1; | ||
118 | } | ||
119 | |||
120 | /* FIXME: spreading the queues across pipes causes perf regressions | ||
121 | * on POLARIS11 compute workloads */ | ||
122 | if (adev->asic_type == CHIP_POLARIS11) | ||
123 | return false; | ||
124 | |||
125 | return adev->gfx.mec.num_mec > 1; | ||
126 | } | ||
127 | |||
112 | void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev) | 128 | void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev) |
113 | { | 129 | { |
114 | int i, queue, pipe, mec; | 130 | int i, queue, pipe, mec; |
131 | bool multipipe_policy = amdgpu_gfx_is_multipipe_capable(adev); | ||
115 | 132 | ||
116 | /* policy for amdgpu compute queue ownership */ | 133 | /* policy for amdgpu compute queue ownership */ |
117 | for (i = 0; i < AMDGPU_MAX_COMPUTE_QUEUES; ++i) { | 134 | for (i = 0; i < AMDGPU_MAX_COMPUTE_QUEUES; ++i) { |
@@ -125,8 +142,7 @@ void amdgpu_gfx_compute_queue_acquire(struct amdgpu_device *adev) | |||
125 | if (mec >= adev->gfx.mec.num_mec) | 142 | if (mec >= adev->gfx.mec.num_mec) |
126 | break; | 143 | break; |
127 | 144 | ||
128 | /* FIXME: spreading the queues across pipes causes perf regressions */ | 145 | if (multipipe_policy) { |
129 | if (0) { | ||
130 | /* policy: amdgpu owns the first two queues of the first MEC */ | 146 | /* policy: amdgpu owns the first two queues of the first MEC */ |
131 | if (mec == 0 && queue < 2) | 147 | if (mec == 0 && queue < 2) |
132 | set_bit(i, adev->gfx.mec.queue_bitmap); | 148 | set_bit(i, adev->gfx.mec.queue_bitmap); |