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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index bb40d2529a30..239bf2a4b3c6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -179,8 +179,12 @@ static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev,
179 179
180 amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue); 180 amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);
181 181
182 /* Using pipes 2/3 from MEC 2 seems cause problems */ 182 /*
183 if (mec == 1 && pipe > 1) 183 * 1. Using pipes 2/3 from MEC 2 seems cause problems.
184 * 2. It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN
185 * only can be issued on queue 0.
186 */
187 if ((mec == 1 && pipe > 1) || queue != 0)
184 continue; 188 continue;
185 189
186 ring->me = mec + 1; 190 ring->me = mec + 1;