diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 50 |
1 files changed, 37 insertions, 13 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c index 46b9ea4e6103..2c8e27370284 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | |||
@@ -48,17 +48,25 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size, | |||
48 | struct drm_gem_object **obj) | 48 | struct drm_gem_object **obj) |
49 | { | 49 | { |
50 | struct amdgpu_bo *bo; | 50 | struct amdgpu_bo *bo; |
51 | struct amdgpu_bo_param bp; | ||
51 | int r; | 52 | int r; |
52 | 53 | ||
54 | memset(&bp, 0, sizeof(bp)); | ||
53 | *obj = NULL; | 55 | *obj = NULL; |
54 | /* At least align on page size */ | 56 | /* At least align on page size */ |
55 | if (alignment < PAGE_SIZE) { | 57 | if (alignment < PAGE_SIZE) { |
56 | alignment = PAGE_SIZE; | 58 | alignment = PAGE_SIZE; |
57 | } | 59 | } |
58 | 60 | ||
61 | bp.size = size; | ||
62 | bp.byte_align = alignment; | ||
63 | bp.type = type; | ||
64 | bp.resv = resv; | ||
65 | bp.preferred_domain = initial_domain; | ||
59 | retry: | 66 | retry: |
60 | r = amdgpu_bo_create(adev, size, alignment, initial_domain, | 67 | bp.flags = flags; |
61 | flags, type, resv, &bo); | 68 | bp.domain = initial_domain; |
69 | r = amdgpu_bo_create(adev, &bp, &bo); | ||
62 | if (r) { | 70 | if (r) { |
63 | if (r != -ERESTARTSYS) { | 71 | if (r != -ERESTARTSYS) { |
64 | if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) { | 72 | if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) { |
@@ -221,12 +229,7 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data, | |||
221 | return -EINVAL; | 229 | return -EINVAL; |
222 | 230 | ||
223 | /* reject invalid gem domains */ | 231 | /* reject invalid gem domains */ |
224 | if (args->in.domains & ~(AMDGPU_GEM_DOMAIN_CPU | | 232 | if (args->in.domains & ~AMDGPU_GEM_DOMAIN_MASK) |
225 | AMDGPU_GEM_DOMAIN_GTT | | ||
226 | AMDGPU_GEM_DOMAIN_VRAM | | ||
227 | AMDGPU_GEM_DOMAIN_GDS | | ||
228 | AMDGPU_GEM_DOMAIN_GWS | | ||
229 | AMDGPU_GEM_DOMAIN_OA)) | ||
230 | return -EINVAL; | 233 | return -EINVAL; |
231 | 234 | ||
232 | /* create a gem object to contain this object in */ | 235 | /* create a gem object to contain this object in */ |
@@ -771,16 +774,23 @@ int amdgpu_mode_dumb_create(struct drm_file *file_priv, | |||
771 | } | 774 | } |
772 | 775 | ||
773 | #if defined(CONFIG_DEBUG_FS) | 776 | #if defined(CONFIG_DEBUG_FS) |
777 | |||
778 | #define amdgpu_debugfs_gem_bo_print_flag(m, bo, flag) \ | ||
779 | if (bo->flags & (AMDGPU_GEM_CREATE_ ## flag)) { \ | ||
780 | seq_printf((m), " " #flag); \ | ||
781 | } | ||
782 | |||
774 | static int amdgpu_debugfs_gem_bo_info(int id, void *ptr, void *data) | 783 | static int amdgpu_debugfs_gem_bo_info(int id, void *ptr, void *data) |
775 | { | 784 | { |
776 | struct drm_gem_object *gobj = ptr; | 785 | struct drm_gem_object *gobj = ptr; |
777 | struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj); | 786 | struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj); |
778 | struct seq_file *m = data; | 787 | struct seq_file *m = data; |
779 | 788 | ||
789 | struct dma_buf_attachment *attachment; | ||
790 | struct dma_buf *dma_buf; | ||
780 | unsigned domain; | 791 | unsigned domain; |
781 | const char *placement; | 792 | const char *placement; |
782 | unsigned pin_count; | 793 | unsigned pin_count; |
783 | uint64_t offset; | ||
784 | 794 | ||
785 | domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); | 795 | domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type); |
786 | switch (domain) { | 796 | switch (domain) { |
@@ -798,13 +808,27 @@ static int amdgpu_debugfs_gem_bo_info(int id, void *ptr, void *data) | |||
798 | seq_printf(m, "\t0x%08x: %12ld byte %s", | 808 | seq_printf(m, "\t0x%08x: %12ld byte %s", |
799 | id, amdgpu_bo_size(bo), placement); | 809 | id, amdgpu_bo_size(bo), placement); |
800 | 810 | ||
801 | offset = READ_ONCE(bo->tbo.mem.start); | ||
802 | if (offset != AMDGPU_BO_INVALID_OFFSET) | ||
803 | seq_printf(m, " @ 0x%010Lx", offset); | ||
804 | |||
805 | pin_count = READ_ONCE(bo->pin_count); | 811 | pin_count = READ_ONCE(bo->pin_count); |
806 | if (pin_count) | 812 | if (pin_count) |
807 | seq_printf(m, " pin count %d", pin_count); | 813 | seq_printf(m, " pin count %d", pin_count); |
814 | |||
815 | dma_buf = READ_ONCE(bo->gem_base.dma_buf); | ||
816 | attachment = READ_ONCE(bo->gem_base.import_attach); | ||
817 | |||
818 | if (attachment) | ||
819 | seq_printf(m, " imported from %p", dma_buf); | ||
820 | else if (dma_buf) | ||
821 | seq_printf(m, " exported as %p", dma_buf); | ||
822 | |||
823 | amdgpu_debugfs_gem_bo_print_flag(m, bo, CPU_ACCESS_REQUIRED); | ||
824 | amdgpu_debugfs_gem_bo_print_flag(m, bo, NO_CPU_ACCESS); | ||
825 | amdgpu_debugfs_gem_bo_print_flag(m, bo, CPU_GTT_USWC); | ||
826 | amdgpu_debugfs_gem_bo_print_flag(m, bo, VRAM_CLEARED); | ||
827 | amdgpu_debugfs_gem_bo_print_flag(m, bo, SHADOW); | ||
828 | amdgpu_debugfs_gem_bo_print_flag(m, bo, VRAM_CONTIGUOUS); | ||
829 | amdgpu_debugfs_gem_bo_print_flag(m, bo, VM_ALWAYS_VALID); | ||
830 | amdgpu_debugfs_gem_bo_print_flag(m, bo, EXPLICIT_SYNC); | ||
831 | |||
808 | seq_printf(m, "\n"); | 832 | seq_printf(m, "\n"); |
809 | 833 | ||
810 | return 0; | 834 | return 0; |