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-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c232
1 files changed, 225 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 963578c34c47..06aede194bf8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -1,10 +1,3 @@
1/**
2 * \file amdgpu_drv.c
3 * AMD Amdgpu driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/* 1/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 2 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved. 3 * All Rights Reserved.
@@ -136,102 +129,239 @@ int amdgpu_gpu_recovery = -1; /* auto */
136int amdgpu_emu_mode = 0; 129int amdgpu_emu_mode = 0;
137uint amdgpu_smu_memory_pool_size = 0; 130uint amdgpu_smu_memory_pool_size = 0;
138 131
132/**
133 * DOC: vramlimit (int)
134 * Restrict the total amount of VRAM in MiB for testing. The default is 0 (Use full VRAM).
135 */
139MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); 136MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
140module_param_named(vramlimit, amdgpu_vram_limit, int, 0600); 137module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
141 138
139/**
140 * DOC: vis_vramlimit (int)
141 * Restrict the amount of CPU visible VRAM in MiB for testing. The default is 0 (Use full CPU visible VRAM).
142 */
142MODULE_PARM_DESC(vis_vramlimit, "Restrict visible VRAM for testing, in megabytes"); 143MODULE_PARM_DESC(vis_vramlimit, "Restrict visible VRAM for testing, in megabytes");
143module_param_named(vis_vramlimit, amdgpu_vis_vram_limit, int, 0444); 144module_param_named(vis_vramlimit, amdgpu_vis_vram_limit, int, 0444);
144 145
146/**
147 * DOC: gartsize (uint)
148 * Restrict the size of GART in Mib (32, 64, etc.) for testing. The default is -1 (The size depends on asic).
149 */
145MODULE_PARM_DESC(gartsize, "Size of GART to setup in megabytes (32, 64, etc., -1=auto)"); 150MODULE_PARM_DESC(gartsize, "Size of GART to setup in megabytes (32, 64, etc., -1=auto)");
146module_param_named(gartsize, amdgpu_gart_size, uint, 0600); 151module_param_named(gartsize, amdgpu_gart_size, uint, 0600);
147 152
153/**
154 * DOC: gttsize (int)
155 * Restrict the size of GTT domain in MiB for testing. The default is -1 (It's VRAM size if 3GB < VRAM < 3/4 RAM,
156 * otherwise 3/4 RAM size).
157 */
148MODULE_PARM_DESC(gttsize, "Size of the GTT domain in megabytes (-1 = auto)"); 158MODULE_PARM_DESC(gttsize, "Size of the GTT domain in megabytes (-1 = auto)");
149module_param_named(gttsize, amdgpu_gtt_size, int, 0600); 159module_param_named(gttsize, amdgpu_gtt_size, int, 0600);
150 160
161/**
162 * DOC: moverate (int)
163 * Set maximum buffer migration rate in MB/s. The default is -1 (8 MB/s).
164 */
151MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disabled)"); 165MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disabled)");
152module_param_named(moverate, amdgpu_moverate, int, 0600); 166module_param_named(moverate, amdgpu_moverate, int, 0600);
153 167
168/**
169 * DOC: benchmark (int)
170 * Run benchmarks. The default is 0 (Skip benchmarks).
171 */
154MODULE_PARM_DESC(benchmark, "Run benchmark"); 172MODULE_PARM_DESC(benchmark, "Run benchmark");
155module_param_named(benchmark, amdgpu_benchmarking, int, 0444); 173module_param_named(benchmark, amdgpu_benchmarking, int, 0444);
156 174
175/**
176 * DOC: test (int)
177 * Test BO GTT->VRAM and VRAM->GTT GPU copies. The default is 0 (Skip test, only set 1 to run test).
178 */
157MODULE_PARM_DESC(test, "Run tests"); 179MODULE_PARM_DESC(test, "Run tests");
158module_param_named(test, amdgpu_testing, int, 0444); 180module_param_named(test, amdgpu_testing, int, 0444);
159 181
182/**
183 * DOC: audio (int)
184 * Set HDMI/DPAudio. Only affects non-DC display handling. The default is -1 (Enabled), set 0 to disabled it.
185 */
160MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); 186MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
161module_param_named(audio, amdgpu_audio, int, 0444); 187module_param_named(audio, amdgpu_audio, int, 0444);
162 188
189/**
190 * DOC: disp_priority (int)
191 * Set display Priority (1 = normal, 2 = high). Only affects non-DC display handling. The default is 0 (auto).
192 */
163MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 193MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
164module_param_named(disp_priority, amdgpu_disp_priority, int, 0444); 194module_param_named(disp_priority, amdgpu_disp_priority, int, 0444);
165 195
196/**
197 * DOC: hw_i2c (int)
198 * To enable hw i2c engine. Only affects non-DC display handling. The default is 0 (Disabled).
199 */
166MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 200MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
167module_param_named(hw_i2c, amdgpu_hw_i2c, int, 0444); 201module_param_named(hw_i2c, amdgpu_hw_i2c, int, 0444);
168 202
203/**
204 * DOC: pcie_gen2 (int)
205 * To disable PCIE Gen2/3 mode (0 = disable, 1 = enable). The default is -1 (auto, enabled).
206 */
169MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 207MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
170module_param_named(pcie_gen2, amdgpu_pcie_gen2, int, 0444); 208module_param_named(pcie_gen2, amdgpu_pcie_gen2, int, 0444);
171 209
210/**
211 * DOC: msi (int)
212 * To disable Message Signaled Interrupts (MSI) functionality (1 = enable, 0 = disable). The default is -1 (auto, enabled).
213 */
172MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 214MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
173module_param_named(msi, amdgpu_msi, int, 0444); 215module_param_named(msi, amdgpu_msi, int, 0444);
174 216
217/**
218 * DOC: lockup_timeout (int)
219 * Set GPU scheduler timeout value in ms. Value 0 is invalidated, will be adjusted to 10000.
220 * Negative values mean 'infinite timeout' (MAX_JIFFY_OFFSET). The default is 10000.
221 */
175MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms > 0 (default 10000)"); 222MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms > 0 (default 10000)");
176module_param_named(lockup_timeout, amdgpu_lockup_timeout, int, 0444); 223module_param_named(lockup_timeout, amdgpu_lockup_timeout, int, 0444);
177 224
225/**
226 * DOC: dpm (int)
227 * Override for dynamic power management setting (1 = enable, 0 = disable). The default is -1 (auto).
228 */
178MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 229MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
179module_param_named(dpm, amdgpu_dpm, int, 0444); 230module_param_named(dpm, amdgpu_dpm, int, 0444);
180 231
232/**
233 * DOC: fw_load_type (int)
234 * Set different firmware loading type for debugging (0 = direct, 1 = SMU, 2 = PSP). The default is -1 (auto).
235 */
181MODULE_PARM_DESC(fw_load_type, "firmware loading type (0 = direct, 1 = SMU, 2 = PSP, -1 = auto)"); 236MODULE_PARM_DESC(fw_load_type, "firmware loading type (0 = direct, 1 = SMU, 2 = PSP, -1 = auto)");
182module_param_named(fw_load_type, amdgpu_fw_load_type, int, 0444); 237module_param_named(fw_load_type, amdgpu_fw_load_type, int, 0444);
183 238
239/**
240 * DOC: aspm (int)
241 * To disable ASPM (1 = enable, 0 = disable). The default is -1 (auto, enabled).
242 */
184MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 243MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
185module_param_named(aspm, amdgpu_aspm, int, 0444); 244module_param_named(aspm, amdgpu_aspm, int, 0444);
186 245
246/**
247 * DOC: runpm (int)
248 * Override for runtime power management control for dGPUs in PX/HG laptops. The amdgpu driver can dynamically power down
249 * the dGPU on PX/HG laptops when it is idle. The default is -1 (auto enable). Setting the value to 0 disables this functionality.
250 */
187MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)"); 251MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
188module_param_named(runpm, amdgpu_runtime_pm, int, 0444); 252module_param_named(runpm, amdgpu_runtime_pm, int, 0444);
189 253
254/**
255 * DOC: ip_block_mask (uint)
256 * Override what IP blocks are enabled on the GPU. Each GPU is a collection of IP blocks (gfx, display, video, etc.).
257 * Use this parameter to disable specific blocks. Note that the IP blocks do not have a fixed index. Some asics may not have
258 * some IPs or may include multiple instances of an IP so the ordering various from asic to asic. See the driver output in
259 * the kernel log for the list of IPs on the asic. The default is 0xffffffff (enable all blocks on a device).
260 */
190MODULE_PARM_DESC(ip_block_mask, "IP Block Mask (all blocks enabled (default))"); 261MODULE_PARM_DESC(ip_block_mask, "IP Block Mask (all blocks enabled (default))");
191module_param_named(ip_block_mask, amdgpu_ip_block_mask, uint, 0444); 262module_param_named(ip_block_mask, amdgpu_ip_block_mask, uint, 0444);
192 263
264/**
265 * DOC: bapm (int)
266 * Bidirectional Application Power Management (BAPM) used to dynamically share TDP between CPU and GPU. Set value 0 to disable it.
267 * The default -1 (auto, enabled)
268 */
193MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)"); 269MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
194module_param_named(bapm, amdgpu_bapm, int, 0444); 270module_param_named(bapm, amdgpu_bapm, int, 0444);
195 271
272/**
273 * DOC: deep_color (int)
274 * Set 1 to enable Deep Color support. Only affects non-DC display handling. The default is 0 (disabled).
275 */
196MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))"); 276MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
197module_param_named(deep_color, amdgpu_deep_color, int, 0444); 277module_param_named(deep_color, amdgpu_deep_color, int, 0444);
198 278
279/**
280 * DOC: vm_size (int)
281 * Override the size of the GPU's per client virtual address space in GiB. The default is -1 (automatic for each asic).
282 */
199MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 64GB)"); 283MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 64GB)");
200module_param_named(vm_size, amdgpu_vm_size, int, 0444); 284module_param_named(vm_size, amdgpu_vm_size, int, 0444);
201 285
286/**
287 * DOC: vm_fragment_size (int)
288 * Override VM fragment size in bits (4, 5, etc. 4 = 64K, 9 = 2M). The default is -1 (automatic for each asic).
289 */
202MODULE_PARM_DESC(vm_fragment_size, "VM fragment size in bits (4, 5, etc. 4 = 64K (default), Max 9 = 2M)"); 290MODULE_PARM_DESC(vm_fragment_size, "VM fragment size in bits (4, 5, etc. 4 = 64K (default), Max 9 = 2M)");
203module_param_named(vm_fragment_size, amdgpu_vm_fragment_size, int, 0444); 291module_param_named(vm_fragment_size, amdgpu_vm_fragment_size, int, 0444);
204 292
293/**
294 * DOC: vm_block_size (int)
295 * Override VM page table size in bits (default depending on vm_size and hw setup). The default is -1 (automatic for each asic).
296 */
205MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)"); 297MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
206module_param_named(vm_block_size, amdgpu_vm_block_size, int, 0444); 298module_param_named(vm_block_size, amdgpu_vm_block_size, int, 0444);
207 299
300/**
301 * DOC: vm_fault_stop (int)
302 * Stop on VM fault for debugging (0 = never, 1 = print first, 2 = always). The default is 0 (No stop).
303 */
208MODULE_PARM_DESC(vm_fault_stop, "Stop on VM fault (0 = never (default), 1 = print first, 2 = always)"); 304MODULE_PARM_DESC(vm_fault_stop, "Stop on VM fault (0 = never (default), 1 = print first, 2 = always)");
209module_param_named(vm_fault_stop, amdgpu_vm_fault_stop, int, 0444); 305module_param_named(vm_fault_stop, amdgpu_vm_fault_stop, int, 0444);
210 306
307/**
308 * DOC: vm_debug (int)
309 * Debug VM handling (0 = disabled, 1 = enabled). The default is 0 (Disabled).
310 */
211MODULE_PARM_DESC(vm_debug, "Debug VM handling (0 = disabled (default), 1 = enabled)"); 311MODULE_PARM_DESC(vm_debug, "Debug VM handling (0 = disabled (default), 1 = enabled)");
212module_param_named(vm_debug, amdgpu_vm_debug, int, 0644); 312module_param_named(vm_debug, amdgpu_vm_debug, int, 0644);
213 313
314/**
315 * DOC: vm_update_mode (int)
316 * Override VM update mode. VM updated by using CPU (0 = never, 1 = Graphics only, 2 = Compute only, 3 = Both). The default
317 * is -1 (Only in large BAR(LB) systems Compute VM tables will be updated by CPU, otherwise 0, never).
318 */
214MODULE_PARM_DESC(vm_update_mode, "VM update using CPU (0 = never (default except for large BAR(LB)), 1 = Graphics only, 2 = Compute only (default for LB), 3 = Both"); 319MODULE_PARM_DESC(vm_update_mode, "VM update using CPU (0 = never (default except for large BAR(LB)), 1 = Graphics only, 2 = Compute only (default for LB), 3 = Both");
215module_param_named(vm_update_mode, amdgpu_vm_update_mode, int, 0444); 320module_param_named(vm_update_mode, amdgpu_vm_update_mode, int, 0444);
216 321
322/**
323 * DOC: vram_page_split (int)
324 * Override the number of pages after we split VRAM allocations (default 512, -1 = disable). The default is 512.
325 */
217MODULE_PARM_DESC(vram_page_split, "Number of pages after we split VRAM allocations (default 512, -1 = disable)"); 326MODULE_PARM_DESC(vram_page_split, "Number of pages after we split VRAM allocations (default 512, -1 = disable)");
218module_param_named(vram_page_split, amdgpu_vram_page_split, int, 0444); 327module_param_named(vram_page_split, amdgpu_vram_page_split, int, 0444);
219 328
329/**
330 * DOC: exp_hw_support (int)
331 * Enable experimental hw support (1 = enable). The default is 0 (disabled).
332 */
220MODULE_PARM_DESC(exp_hw_support, "experimental hw support (1 = enable, 0 = disable (default))"); 333MODULE_PARM_DESC(exp_hw_support, "experimental hw support (1 = enable, 0 = disable (default))");
221module_param_named(exp_hw_support, amdgpu_exp_hw_support, int, 0444); 334module_param_named(exp_hw_support, amdgpu_exp_hw_support, int, 0444);
222 335
336/**
337 * DOC: dc (int)
338 * Disable/Enable Display Core driver for debugging (1 = enable, 0 = disable). The default is -1 (automatic for each asic).
339 */
223MODULE_PARM_DESC(dc, "Display Core driver (1 = enable, 0 = disable, -1 = auto (default))"); 340MODULE_PARM_DESC(dc, "Display Core driver (1 = enable, 0 = disable, -1 = auto (default))");
224module_param_named(dc, amdgpu_dc, int, 0444); 341module_param_named(dc, amdgpu_dc, int, 0444);
225 342
226MODULE_PARM_DESC(dc_log, "Display Core Log Level (0 = minimal (default), 1 = chatty"); 343MODULE_PARM_DESC(dc_log, "Display Core Log Level (0 = minimal (default), 1 = chatty");
227module_param_named(dc_log, amdgpu_dc_log, int, 0444); 344module_param_named(dc_log, amdgpu_dc_log, int, 0444);
228 345
346/**
347 * DOC: sched_jobs (int)
348 * Override the max number of jobs supported in the sw queue. The default is 32.
349 */
229MODULE_PARM_DESC(sched_jobs, "the max number of jobs supported in the sw queue (default 32)"); 350MODULE_PARM_DESC(sched_jobs, "the max number of jobs supported in the sw queue (default 32)");
230module_param_named(sched_jobs, amdgpu_sched_jobs, int, 0444); 351module_param_named(sched_jobs, amdgpu_sched_jobs, int, 0444);
231 352
353/**
354 * DOC: sched_hw_submission (int)
355 * Override the max number of HW submissions. The default is 2.
356 */
232MODULE_PARM_DESC(sched_hw_submission, "the max number of HW submissions (default 2)"); 357MODULE_PARM_DESC(sched_hw_submission, "the max number of HW submissions (default 2)");
233module_param_named(sched_hw_submission, amdgpu_sched_hw_submission, int, 0444); 358module_param_named(sched_hw_submission, amdgpu_sched_hw_submission, int, 0444);
234 359
360/**
361 * DOC: ppfeaturemask (uint)
362 * Override power features enabled. See enum PP_FEATURE_MASK in drivers/gpu/drm/amd/include/amd_shared.h.
363 * The default is the current set of stable power features.
364 */
235MODULE_PARM_DESC(ppfeaturemask, "all power features enabled (default))"); 365MODULE_PARM_DESC(ppfeaturemask, "all power features enabled (default))");
236module_param_named(ppfeaturemask, amdgpu_pp_feature_mask, uint, 0444); 366module_param_named(ppfeaturemask, amdgpu_pp_feature_mask, uint, 0444);
237 367
@@ -241,58 +371,135 @@ module_param_named(no_evict, amdgpu_no_evict, int, 0444);
241MODULE_PARM_DESC(direct_gma_size, "Direct GMA size in megabytes (max 96MB)"); 371MODULE_PARM_DESC(direct_gma_size, "Direct GMA size in megabytes (max 96MB)");
242module_param_named(direct_gma_size, amdgpu_direct_gma_size, int, 0444); 372module_param_named(direct_gma_size, amdgpu_direct_gma_size, int, 0444);
243 373
374/**
375 * DOC: pcie_gen_cap (uint)
376 * Override PCIE gen speed capabilities. See the CAIL flags in drivers/gpu/drm/amd/include/amd_pcie.h.
377 * The default is 0 (automatic for each asic).
378 */
244MODULE_PARM_DESC(pcie_gen_cap, "PCIE Gen Caps (0: autodetect (default))"); 379MODULE_PARM_DESC(pcie_gen_cap, "PCIE Gen Caps (0: autodetect (default))");
245module_param_named(pcie_gen_cap, amdgpu_pcie_gen_cap, uint, 0444); 380module_param_named(pcie_gen_cap, amdgpu_pcie_gen_cap, uint, 0444);
246 381
382/**
383 * DOC: pcie_lane_cap (uint)
384 * Override PCIE lanes capabilities. See the CAIL flags in drivers/gpu/drm/amd/include/amd_pcie.h.
385 * The default is 0 (automatic for each asic).
386 */
247MODULE_PARM_DESC(pcie_lane_cap, "PCIE Lane Caps (0: autodetect (default))"); 387MODULE_PARM_DESC(pcie_lane_cap, "PCIE Lane Caps (0: autodetect (default))");
248module_param_named(pcie_lane_cap, amdgpu_pcie_lane_cap, uint, 0444); 388module_param_named(pcie_lane_cap, amdgpu_pcie_lane_cap, uint, 0444);
249 389
390/**
391 * DOC: cg_mask (uint)
392 * Override Clockgating features enabled on GPU (0 = disable clock gating). See the AMD_CG_SUPPORT flags in
393 * drivers/gpu/drm/amd/include/amd_shared.h. The default is 0xffffffff (all enabled).
394 */
250MODULE_PARM_DESC(cg_mask, "Clockgating flags mask (0 = disable clock gating)"); 395MODULE_PARM_DESC(cg_mask, "Clockgating flags mask (0 = disable clock gating)");
251module_param_named(cg_mask, amdgpu_cg_mask, uint, 0444); 396module_param_named(cg_mask, amdgpu_cg_mask, uint, 0444);
252 397
398/**
399 * DOC: pg_mask (uint)
400 * Override Powergating features enabled on GPU (0 = disable power gating). See the AMD_PG_SUPPORT flags in
401 * drivers/gpu/drm/amd/include/amd_shared.h. The default is 0xffffffff (all enabled).
402 */
253MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power gating)"); 403MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power gating)");
254module_param_named(pg_mask, amdgpu_pg_mask, uint, 0444); 404module_param_named(pg_mask, amdgpu_pg_mask, uint, 0444);
255 405
406/**
407 * DOC: sdma_phase_quantum (uint)
408 * Override SDMA context switch phase quantum (x 1K GPU clock cycles, 0 = no change). The default is 32.
409 */
256MODULE_PARM_DESC(sdma_phase_quantum, "SDMA context switch phase quantum (x 1K GPU clock cycles, 0 = no change (default 32))"); 410MODULE_PARM_DESC(sdma_phase_quantum, "SDMA context switch phase quantum (x 1K GPU clock cycles, 0 = no change (default 32))");
257module_param_named(sdma_phase_quantum, amdgpu_sdma_phase_quantum, uint, 0444); 411module_param_named(sdma_phase_quantum, amdgpu_sdma_phase_quantum, uint, 0444);
258 412
413/**
414 * DOC: disable_cu (charp)
415 * Set to disable CUs (It's set like se.sh.cu,...). The default is NULL.
416 */
259MODULE_PARM_DESC(disable_cu, "Disable CUs (se.sh.cu,...)"); 417MODULE_PARM_DESC(disable_cu, "Disable CUs (se.sh.cu,...)");
260module_param_named(disable_cu, amdgpu_disable_cu, charp, 0444); 418module_param_named(disable_cu, amdgpu_disable_cu, charp, 0444);
261 419
420/**
421 * DOC: virtual_display (charp)
422 * Set to enable virtual display feature. This feature provides a virtual display hardware on headless boards
423 * or in virtualized environments. It will be set like xxxx:xx:xx.x,x;xxxx:xx:xx.x,x. It's the pci address of
424 * the device, plus the number of crtcs to expose. E.g., 0000:26:00.0,4 would enable 4 virtual crtcs on the pci
425 * device at 26:00.0. The default is NULL.
426 */
262MODULE_PARM_DESC(virtual_display, 427MODULE_PARM_DESC(virtual_display,
263 "Enable virtual display feature (the virtual_display will be set like xxxx:xx:xx.x,x;xxxx:xx:xx.x,x)"); 428 "Enable virtual display feature (the virtual_display will be set like xxxx:xx:xx.x,x;xxxx:xx:xx.x,x)");
264module_param_named(virtual_display, amdgpu_virtual_display, charp, 0444); 429module_param_named(virtual_display, amdgpu_virtual_display, charp, 0444);
265 430
431/**
432 * DOC: ngg (int)
433 * Set to enable Next Generation Graphics (1 = enable). The default is 0 (disabled).
434 */
266MODULE_PARM_DESC(ngg, "Next Generation Graphics (1 = enable, 0 = disable(default depending on gfx))"); 435MODULE_PARM_DESC(ngg, "Next Generation Graphics (1 = enable, 0 = disable(default depending on gfx))");
267module_param_named(ngg, amdgpu_ngg, int, 0444); 436module_param_named(ngg, amdgpu_ngg, int, 0444);
268 437
438/**
439 * DOC: prim_buf_per_se (int)
440 * Override the size of Primitive Buffer per Shader Engine in Byte. The default is 0 (depending on gfx).
441 */
269MODULE_PARM_DESC(prim_buf_per_se, "the size of Primitive Buffer per Shader Engine (default depending on gfx)"); 442MODULE_PARM_DESC(prim_buf_per_se, "the size of Primitive Buffer per Shader Engine (default depending on gfx)");
270module_param_named(prim_buf_per_se, amdgpu_prim_buf_per_se, int, 0444); 443module_param_named(prim_buf_per_se, amdgpu_prim_buf_per_se, int, 0444);
271 444
445/**
446 * DOC: pos_buf_per_se (int)
447 * Override the size of Position Buffer per Shader Engine in Byte. The default is 0 (depending on gfx).
448 */
272MODULE_PARM_DESC(pos_buf_per_se, "the size of Position Buffer per Shader Engine (default depending on gfx)"); 449MODULE_PARM_DESC(pos_buf_per_se, "the size of Position Buffer per Shader Engine (default depending on gfx)");
273module_param_named(pos_buf_per_se, amdgpu_pos_buf_per_se, int, 0444); 450module_param_named(pos_buf_per_se, amdgpu_pos_buf_per_se, int, 0444);
274 451
452/**
453 * DOC: cntl_sb_buf_per_se (int)
454 * Override the size of Control Sideband per Shader Engine in Byte. The default is 0 (depending on gfx).
455 */
275MODULE_PARM_DESC(cntl_sb_buf_per_se, "the size of Control Sideband per Shader Engine (default depending on gfx)"); 456MODULE_PARM_DESC(cntl_sb_buf_per_se, "the size of Control Sideband per Shader Engine (default depending on gfx)");
276module_param_named(cntl_sb_buf_per_se, amdgpu_cntl_sb_buf_per_se, int, 0444); 457module_param_named(cntl_sb_buf_per_se, amdgpu_cntl_sb_buf_per_se, int, 0444);
277 458
459/**
460 * DOC: param_buf_per_se (int)
461 * Override the size of Off-Chip Pramater Cache per Shader Engine in Byte. The default is 0 (depending on gfx).
462 */
278MODULE_PARM_DESC(param_buf_per_se, "the size of Off-Chip Pramater Cache per Shader Engine (default depending on gfx)"); 463MODULE_PARM_DESC(param_buf_per_se, "the size of Off-Chip Pramater Cache per Shader Engine (default depending on gfx)");
279module_param_named(param_buf_per_se, amdgpu_param_buf_per_se, int, 0444); 464module_param_named(param_buf_per_se, amdgpu_param_buf_per_se, int, 0444);
280 465
466/**
467 * DOC: job_hang_limit (int)
468 * Set how much time allow a job hang and not drop it. The default is 0.
469 */
281MODULE_PARM_DESC(job_hang_limit, "how much time allow a job hang and not drop it (default 0)"); 470MODULE_PARM_DESC(job_hang_limit, "how much time allow a job hang and not drop it (default 0)");
282module_param_named(job_hang_limit, amdgpu_job_hang_limit, int ,0444); 471module_param_named(job_hang_limit, amdgpu_job_hang_limit, int ,0444);
283 472
473/**
474 * DOC: lbpw (int)
475 * Override Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable). The default is -1 (auto, enabled).
476 */
284MODULE_PARM_DESC(lbpw, "Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable, -1 = auto)"); 477MODULE_PARM_DESC(lbpw, "Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable, -1 = auto)");
285module_param_named(lbpw, amdgpu_lbpw, int, 0444); 478module_param_named(lbpw, amdgpu_lbpw, int, 0444);
286 479
287MODULE_PARM_DESC(compute_multipipe, "Force compute queues to be spread across pipes (1 = enable, 0 = disable, -1 = auto)"); 480MODULE_PARM_DESC(compute_multipipe, "Force compute queues to be spread across pipes (1 = enable, 0 = disable, -1 = auto)");
288module_param_named(compute_multipipe, amdgpu_compute_multipipe, int, 0444); 481module_param_named(compute_multipipe, amdgpu_compute_multipipe, int, 0444);
289 482
483/**
484 * DOC: gpu_recovery (int)
485 * Set to enable GPU recovery mechanism (1 = enable, 0 = disable). The default is -1 (auto, disabled except SRIOV).
486 */
290MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable, 0 = disable, -1 = auto)"); 487MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable, 0 = disable, -1 = auto)");
291module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444); 488module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444);
292 489
490/**
491 * DOC: emu_mode (int)
492 * Set value 1 to enable emulation mode. This is only needed when running on an emulator. The default is 0 (disabled).
493 */
293MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)"); 494MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
294module_param_named(emu_mode, amdgpu_emu_mode, int, 0444); 495module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);
295 496
497/**
498 * DOC: si_support (int)
499 * Set SI support driver. This parameter works after set config CONFIG_DRM_AMDGPU_SI. For SI asic, when radeon driver is enabled,
500 * set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using radeon driver when it available,
501 * otherwise using amdgpu driver.
502 */
296#ifdef CONFIG_DRM_AMDGPU_SI 503#ifdef CONFIG_DRM_AMDGPU_SI
297 504
298#if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE) 505#if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
@@ -306,6 +513,12 @@ MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)")
306module_param_named(si_support, amdgpu_si_support, int, 0444); 513module_param_named(si_support, amdgpu_si_support, int, 0444);
307#endif 514#endif
308 515
516/**
517 * DOC: cik_support (int)
518 * Set CIK support driver. This parameter works after set config CONFIG_DRM_AMDGPU_CIK. For CIK asic, when radeon driver is enabled,
519 * set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using radeon driver when it available,
520 * otherwise using amdgpu driver.
521 */
309#ifdef CONFIG_DRM_AMDGPU_CIK 522#ifdef CONFIG_DRM_AMDGPU_CIK
310 523
311#if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE) 524#if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
@@ -319,6 +532,11 @@ MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)
319module_param_named(cik_support, amdgpu_cik_support, int, 0444); 532module_param_named(cik_support, amdgpu_cik_support, int, 0444);
320#endif 533#endif
321 534
535/**
536 * DOC: smu_memory_pool_size (uint)
537 * It is used to reserve gtt for smu debug usage, setting value 0 to disable it. The actual size is value * 256MiB.
538 * E.g. 0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte. The default is 0 (disabled).
539 */
322MODULE_PARM_DESC(smu_memory_pool_size, 540MODULE_PARM_DESC(smu_memory_pool_size,
323 "reserve gtt for smu debug usage, 0 = disable," 541 "reserve gtt for smu debug usage, 0 = disable,"
324 "0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte"); 542 "0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte");