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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c52
1 files changed, 35 insertions, 17 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 50afcf65181a..0b19482b36b8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -73,9 +73,11 @@
73 * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl 73 * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
74 * - 3.22.0 - Add DRM_AMDGPU_SCHED ioctl 74 * - 3.22.0 - Add DRM_AMDGPU_SCHED ioctl
75 * - 3.23.0 - Add query for VRAM lost counter 75 * - 3.23.0 - Add query for VRAM lost counter
76 * - 3.24.0 - Add high priority compute support for gfx9
77 * - 3.25.0 - Add support for sensor query info (stable pstate sclk/mclk).
76 */ 78 */
77#define KMS_DRIVER_MAJOR 3 79#define KMS_DRIVER_MAJOR 3
78#define KMS_DRIVER_MINOR 23 80#define KMS_DRIVER_MINOR 25
79#define KMS_DRIVER_PATCHLEVEL 0 81#define KMS_DRIVER_PATCHLEVEL 0
80 82
81int amdgpu_vram_limit = 0; 83int amdgpu_vram_limit = 0;
@@ -119,7 +121,7 @@ uint amdgpu_pg_mask = 0xffffffff;
119uint amdgpu_sdma_phase_quantum = 32; 121uint amdgpu_sdma_phase_quantum = 32;
120char *amdgpu_disable_cu = NULL; 122char *amdgpu_disable_cu = NULL;
121char *amdgpu_virtual_display = NULL; 123char *amdgpu_virtual_display = NULL;
122uint amdgpu_pp_feature_mask = 0xffffffff; 124uint amdgpu_pp_feature_mask = 0xffffbfff;
123int amdgpu_ngg = 0; 125int amdgpu_ngg = 0;
124int amdgpu_prim_buf_per_se = 0; 126int amdgpu_prim_buf_per_se = 0;
125int amdgpu_pos_buf_per_se = 0; 127int amdgpu_pos_buf_per_se = 0;
@@ -129,6 +131,7 @@ int amdgpu_job_hang_limit = 0;
129int amdgpu_lbpw = -1; 131int amdgpu_lbpw = -1;
130int amdgpu_compute_multipipe = -1; 132int amdgpu_compute_multipipe = -1;
131int amdgpu_gpu_recovery = -1; /* auto */ 133int amdgpu_gpu_recovery = -1; /* auto */
134int amdgpu_emu_mode = 0;
132 135
133MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); 136MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
134module_param_named(vramlimit, amdgpu_vram_limit, int, 0600); 137module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
@@ -281,9 +284,12 @@ module_param_named(lbpw, amdgpu_lbpw, int, 0444);
281MODULE_PARM_DESC(compute_multipipe, "Force compute queues to be spread across pipes (1 = enable, 0 = disable, -1 = auto)"); 284MODULE_PARM_DESC(compute_multipipe, "Force compute queues to be spread across pipes (1 = enable, 0 = disable, -1 = auto)");
282module_param_named(compute_multipipe, amdgpu_compute_multipipe, int, 0444); 285module_param_named(compute_multipipe, amdgpu_compute_multipipe, int, 0444);
283 286
284MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable, 0 = disable, -1 = auto"); 287MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable, 0 = disable, -1 = auto)");
285module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444); 288module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444);
286 289
290MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
291module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);
292
287#ifdef CONFIG_DRM_AMDGPU_SI 293#ifdef CONFIG_DRM_AMDGPU_SI
288 294
289#if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE) 295#if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)
@@ -538,6 +544,12 @@ static const struct pci_device_id pciidlist[] = {
538 {0x1002, 0x6868, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10}, 544 {0x1002, 0x6868, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
539 {0x1002, 0x686c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10}, 545 {0x1002, 0x686c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
540 {0x1002, 0x687f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10}, 546 {0x1002, 0x687f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
547 /* Vega 12 */
548 {0x1002, 0x69A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
549 {0x1002, 0x69A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
550 {0x1002, 0x69A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
551 {0x1002, 0x69A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
552 {0x1002, 0x69AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
541 /* Raven */ 553 /* Raven */
542 {0x1002, 0x15dd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN|AMD_IS_APU}, 554 {0x1002, 0x15dd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN|AMD_IS_APU},
543 555
@@ -576,6 +588,11 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
576 struct drm_device *dev; 588 struct drm_device *dev;
577 unsigned long flags = ent->driver_data; 589 unsigned long flags = ent->driver_data;
578 int ret, retry = 0; 590 int ret, retry = 0;
591 bool supports_atomic = false;
592
593 if (!amdgpu_virtual_display &&
594 amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK))
595 supports_atomic = true;
579 596
580 if ((flags & AMD_EXP_HW_SUPPORT) && !amdgpu_exp_hw_support) { 597 if ((flags & AMD_EXP_HW_SUPPORT) && !amdgpu_exp_hw_support) {
581 DRM_INFO("This hardware requires experimental hardware support.\n" 598 DRM_INFO("This hardware requires experimental hardware support.\n"
@@ -596,6 +613,13 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
596 if (ret) 613 if (ret)
597 return ret; 614 return ret;
598 615
616 /* warn the user if they mix atomic and non-atomic capable GPUs */
617 if ((kms_driver.driver_features & DRIVER_ATOMIC) && !supports_atomic)
618 DRM_ERROR("Mixing atomic and non-atomic capable GPUs!\n");
619 /* support atomic early so the atomic debugfs stuff gets created */
620 if (supports_atomic)
621 kms_driver.driver_features |= DRIVER_ATOMIC;
622
599 dev = drm_dev_alloc(&kms_driver, &pdev->dev); 623 dev = drm_dev_alloc(&kms_driver, &pdev->dev);
600 if (IS_ERR(dev)) 624 if (IS_ERR(dev))
601 return PTR_ERR(dev); 625 return PTR_ERR(dev);
@@ -720,7 +744,6 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev)
720 744
721 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 745 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
722 drm_kms_helper_poll_disable(drm_dev); 746 drm_kms_helper_poll_disable(drm_dev);
723 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
724 747
725 ret = amdgpu_device_suspend(drm_dev, false, false); 748 ret = amdgpu_device_suspend(drm_dev, false, false);
726 pci_save_state(pdev); 749 pci_save_state(pdev);
@@ -757,7 +780,6 @@ static int amdgpu_pmops_runtime_resume(struct device *dev)
757 780
758 ret = amdgpu_device_resume(drm_dev, false, false); 781 ret = amdgpu_device_resume(drm_dev, false, false);
759 drm_kms_helper_poll_enable(drm_dev); 782 drm_kms_helper_poll_enable(drm_dev);
760 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
761 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 783 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
762 return 0; 784 return 0;
763} 785}
@@ -835,8 +857,8 @@ amdgpu_get_crtc_scanout_position(struct drm_device *dev, unsigned int pipe,
835 ktime_t *stime, ktime_t *etime, 857 ktime_t *stime, ktime_t *etime,
836 const struct drm_display_mode *mode) 858 const struct drm_display_mode *mode)
837{ 859{
838 return amdgpu_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos, 860 return amdgpu_display_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos,
839 stime, etime, mode); 861 stime, etime, mode);
840} 862}
841 863
842static struct drm_driver kms_driver = { 864static struct drm_driver kms_driver = {
@@ -854,9 +876,6 @@ static struct drm_driver kms_driver = {
854 .disable_vblank = amdgpu_disable_vblank_kms, 876 .disable_vblank = amdgpu_disable_vblank_kms,
855 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos, 877 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
856 .get_scanout_position = amdgpu_get_crtc_scanout_position, 878 .get_scanout_position = amdgpu_get_crtc_scanout_position,
857 .irq_preinstall = amdgpu_irq_preinstall,
858 .irq_postinstall = amdgpu_irq_postinstall,
859 .irq_uninstall = amdgpu_irq_uninstall,
860 .irq_handler = amdgpu_irq_handler, 879 .irq_handler = amdgpu_irq_handler,
861 .ioctls = amdgpu_ioctls_kms, 880 .ioctls = amdgpu_ioctls_kms,
862 .gem_free_object_unlocked = amdgpu_gem_object_free, 881 .gem_free_object_unlocked = amdgpu_gem_object_free,
@@ -869,9 +888,7 @@ static struct drm_driver kms_driver = {
869 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 888 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
870 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 889 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
871 .gem_prime_export = amdgpu_gem_prime_export, 890 .gem_prime_export = amdgpu_gem_prime_export,
872 .gem_prime_import = drm_gem_prime_import, 891 .gem_prime_import = amdgpu_gem_prime_import,
873 .gem_prime_pin = amdgpu_gem_prime_pin,
874 .gem_prime_unpin = amdgpu_gem_prime_unpin,
875 .gem_prime_res_obj = amdgpu_gem_prime_res_obj, 892 .gem_prime_res_obj = amdgpu_gem_prime_res_obj,
876 .gem_prime_get_sg_table = amdgpu_gem_prime_get_sg_table, 893 .gem_prime_get_sg_table = amdgpu_gem_prime_get_sg_table,
877 .gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table, 894 .gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
@@ -905,6 +922,11 @@ static int __init amdgpu_init(void)
905{ 922{
906 int r; 923 int r;
907 924
925 if (vgacon_text_force()) {
926 DRM_ERROR("VGACON disables amdgpu kernel modesetting.\n");
927 return -EINVAL;
928 }
929
908 r = amdgpu_sync_init(); 930 r = amdgpu_sync_init();
909 if (r) 931 if (r)
910 goto error_sync; 932 goto error_sync;
@@ -913,10 +935,6 @@ static int __init amdgpu_init(void)
913 if (r) 935 if (r)
914 goto error_fence; 936 goto error_fence;
915 937
916 if (vgacon_text_force()) {
917 DRM_ERROR("VGACON disables amdgpu kernel modesetting.\n");
918 return -EINVAL;
919 }
920 DRM_INFO("amdgpu kernel modesetting enabled.\n"); 938 DRM_INFO("amdgpu kernel modesetting enabled.\n");
921 driver = &kms_driver; 939 driver = &kms_driver;
922 pdriver = &amdgpu_kms_pci_driver; 940 pdriver = &amdgpu_kms_pci_driver;