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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c16
1 files changed, 13 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
index 14f57d9915e3..6ca0333ca4c0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
@@ -553,9 +553,10 @@ int amdgpu_parse_extended_power_table(struct amdgpu_device *adev)
553 entry = (ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record *) 553 entry = (ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record *)
554 ((u8 *)entry + sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record)); 554 ((u8 *)entry + sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record));
555 } 555 }
556 for (i = 0; i < states->numEntries; i++) { 556 adev->pm.dpm.num_of_vce_states =
557 if (i >= AMDGPU_MAX_VCE_LEVELS) 557 states->numEntries > AMD_MAX_VCE_LEVELS ?
558 break; 558 AMD_MAX_VCE_LEVELS : states->numEntries;
559 for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
559 vce_clk = (VCEClockInfo *) 560 vce_clk = (VCEClockInfo *)
560 ((u8 *)&array->entries[0] + 561 ((u8 *)&array->entries[0] +
561 (state_entry->ucVCEClockInfoIndex * sizeof(VCEClockInfo))); 562 (state_entry->ucVCEClockInfoIndex * sizeof(VCEClockInfo)));
@@ -955,3 +956,12 @@ u8 amdgpu_encode_pci_lane_width(u32 lanes)
955 956
956 return encoded_lanes[lanes]; 957 return encoded_lanes[lanes];
957} 958}
959
960struct amd_vce_state*
961amdgpu_get_vce_clock_state(struct amdgpu_device *adev, unsigned idx)
962{
963 if (idx < adev->pm.dpm.num_of_vce_states)
964 return &adev->pm.dpm.vce_states[idx];
965
966 return NULL;
967}