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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_display.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_display.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 083e2b429872..c7bc2b3c1b97 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -68,9 +68,9 @@ static void amdgpu_flip_work_func(struct work_struct *__work)
68 struct amdgpu_flip_work *work = 68 struct amdgpu_flip_work *work =
69 container_of(delayed_work, struct amdgpu_flip_work, flip_work); 69 container_of(delayed_work, struct amdgpu_flip_work, flip_work);
70 struct amdgpu_device *adev = work->adev; 70 struct amdgpu_device *adev = work->adev;
71 struct amdgpu_crtc *amdgpuCrtc = adev->mode_info.crtcs[work->crtc_id]; 71 struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[work->crtc_id];
72 72
73 struct drm_crtc *crtc = &amdgpuCrtc->base; 73 struct drm_crtc *crtc = &amdgpu_crtc->base;
74 unsigned long flags; 74 unsigned long flags;
75 unsigned i; 75 unsigned i;
76 int vpos, hpos; 76 int vpos, hpos;
@@ -85,14 +85,14 @@ static void amdgpu_flip_work_func(struct work_struct *__work)
85 /* Wait until we're out of the vertical blank period before the one 85 /* Wait until we're out of the vertical blank period before the one
86 * targeted by the flip 86 * targeted by the flip
87 */ 87 */
88 if (amdgpuCrtc->enabled && 88 if (amdgpu_crtc->enabled &&
89 (amdgpu_get_crtc_scanoutpos(adev->ddev, work->crtc_id, 0, 89 (amdgpu_get_crtc_scanoutpos(adev->ddev, work->crtc_id, 0,
90 &vpos, &hpos, NULL, NULL, 90 &vpos, &hpos, NULL, NULL,
91 &crtc->hwmode) 91 &crtc->hwmode)
92 & (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK)) == 92 & (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK)) ==
93 (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK) && 93 (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK) &&
94 (int)(work->target_vblank - 94 (int)(work->target_vblank -
95 amdgpu_get_vblank_counter_kms(adev->ddev, amdgpuCrtc->crtc_id)) > 0) { 95 amdgpu_get_vblank_counter_kms(adev->ddev, amdgpu_crtc->crtc_id)) > 0) {
96 schedule_delayed_work(&work->flip_work, usecs_to_jiffies(1000)); 96 schedule_delayed_work(&work->flip_work, usecs_to_jiffies(1000));
97 return; 97 return;
98 } 98 }
@@ -104,12 +104,12 @@ static void amdgpu_flip_work_func(struct work_struct *__work)
104 adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base, work->async); 104 adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base, work->async);
105 105
106 /* Set the flip status */ 106 /* Set the flip status */
107 amdgpuCrtc->pflip_status = AMDGPU_FLIP_SUBMITTED; 107 amdgpu_crtc->pflip_status = AMDGPU_FLIP_SUBMITTED;
108 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); 108 spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
109 109
110 110
111 DRM_DEBUG_DRIVER("crtc:%d[%p], pflip_stat:AMDGPU_FLIP_SUBMITTED, work: %p,\n", 111 DRM_DEBUG_DRIVER("crtc:%d[%p], pflip_stat:AMDGPU_FLIP_SUBMITTED, work: %p,\n",
112 amdgpuCrtc->crtc_id, amdgpuCrtc, work); 112 amdgpu_crtc->crtc_id, amdgpu_crtc, work);
113 113
114} 114}
115 115