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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_display.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_display.c25
1 files changed, 11 insertions, 14 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 6c9e0902a414..e173a5a02f0d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -47,11 +47,8 @@ static void amdgpu_flip_wait_fence(struct amdgpu_device *adev,
47 fence = to_amdgpu_fence(*f); 47 fence = to_amdgpu_fence(*f);
48 if (fence) { 48 if (fence) {
49 r = fence_wait(&fence->base, false); 49 r = fence_wait(&fence->base, false);
50 if (r == -EDEADLK) { 50 if (r == -EDEADLK)
51 up_read(&adev->exclusive_lock);
52 r = amdgpu_gpu_reset(adev); 51 r = amdgpu_gpu_reset(adev);
53 down_read(&adev->exclusive_lock);
54 }
55 } else 52 } else
56 r = fence_wait(*f, false); 53 r = fence_wait(*f, false);
57 54
@@ -77,7 +74,6 @@ static void amdgpu_flip_work_func(struct work_struct *__work)
77 unsigned long flags; 74 unsigned long flags;
78 unsigned i; 75 unsigned i;
79 76
80 down_read(&adev->exclusive_lock);
81 amdgpu_flip_wait_fence(adev, &work->excl); 77 amdgpu_flip_wait_fence(adev, &work->excl);
82 for (i = 0; i < work->shared_count; ++i) 78 for (i = 0; i < work->shared_count; ++i)
83 amdgpu_flip_wait_fence(adev, &work->shared[i]); 79 amdgpu_flip_wait_fence(adev, &work->shared[i]);
@@ -91,7 +87,6 @@ static void amdgpu_flip_work_func(struct work_struct *__work)
91 amdgpuCrtc->pflip_status = AMDGPU_FLIP_SUBMITTED; 87 amdgpuCrtc->pflip_status = AMDGPU_FLIP_SUBMITTED;
92 88
93 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); 89 spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
94 up_read(&adev->exclusive_lock);
95} 90}
96 91
97/* 92/*
@@ -715,7 +710,7 @@ bool amdgpu_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
715 * an optional accurate timestamp of when query happened. 710 * an optional accurate timestamp of when query happened.
716 * 711 *
717 * \param dev Device to query. 712 * \param dev Device to query.
718 * \param crtc Crtc to query. 713 * \param pipe Crtc to query.
719 * \param flags Flags from caller (DRM_CALLED_FROM_VBLIRQ or 0). 714 * \param flags Flags from caller (DRM_CALLED_FROM_VBLIRQ or 0).
720 * \param *vpos Location where vertical scanout position should be stored. 715 * \param *vpos Location where vertical scanout position should be stored.
721 * \param *hpos Location where horizontal scanout position should go. 716 * \param *hpos Location where horizontal scanout position should go.
@@ -738,8 +733,10 @@ bool amdgpu_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
738 * unknown small number of scanlines wrt. real scanout position. 733 * unknown small number of scanlines wrt. real scanout position.
739 * 734 *
740 */ 735 */
741int amdgpu_get_crtc_scanoutpos(struct drm_device *dev, int crtc, unsigned int flags, 736int amdgpu_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe,
742 int *vpos, int *hpos, ktime_t *stime, ktime_t *etime) 737 unsigned int flags, int *vpos, int *hpos,
738 ktime_t *stime, ktime_t *etime,
739 const struct drm_display_mode *mode)
743{ 740{
744 u32 vbl = 0, position = 0; 741 u32 vbl = 0, position = 0;
745 int vbl_start, vbl_end, vtotal, ret = 0; 742 int vbl_start, vbl_end, vtotal, ret = 0;
@@ -753,7 +750,7 @@ int amdgpu_get_crtc_scanoutpos(struct drm_device *dev, int crtc, unsigned int fl
753 if (stime) 750 if (stime)
754 *stime = ktime_get(); 751 *stime = ktime_get();
755 752
756 if (amdgpu_display_page_flip_get_scanoutpos(adev, crtc, &vbl, &position) == 0) 753 if (amdgpu_display_page_flip_get_scanoutpos(adev, pipe, &vbl, &position) == 0)
757 ret |= DRM_SCANOUTPOS_VALID; 754 ret |= DRM_SCANOUTPOS_VALID;
758 755
759 /* Get optional system timestamp after query. */ 756 /* Get optional system timestamp after query. */
@@ -775,7 +772,7 @@ int amdgpu_get_crtc_scanoutpos(struct drm_device *dev, int crtc, unsigned int fl
775 } 772 }
776 else { 773 else {
777 /* No: Fake something reasonable which gives at least ok results. */ 774 /* No: Fake something reasonable which gives at least ok results. */
778 vbl_start = adev->mode_info.crtcs[crtc]->base.hwmode.crtc_vdisplay; 775 vbl_start = mode->crtc_vdisplay;
779 vbl_end = 0; 776 vbl_end = 0;
780 } 777 }
781 778
@@ -791,7 +788,7 @@ int amdgpu_get_crtc_scanoutpos(struct drm_device *dev, int crtc, unsigned int fl
791 788
792 /* Inside "upper part" of vblank area? Apply corrective offset if so: */ 789 /* Inside "upper part" of vblank area? Apply corrective offset if so: */
793 if (in_vbl && (*vpos >= vbl_start)) { 790 if (in_vbl && (*vpos >= vbl_start)) {
794 vtotal = adev->mode_info.crtcs[crtc]->base.hwmode.crtc_vtotal; 791 vtotal = mode->crtc_vtotal;
795 *vpos = *vpos - vtotal; 792 *vpos = *vpos - vtotal;
796 } 793 }
797 794
@@ -813,8 +810,8 @@ int amdgpu_get_crtc_scanoutpos(struct drm_device *dev, int crtc, unsigned int fl
813 * We only do this if DRM_CALLED_FROM_VBLIRQ. 810 * We only do this if DRM_CALLED_FROM_VBLIRQ.
814 */ 811 */
815 if ((flags & DRM_CALLED_FROM_VBLIRQ) && !in_vbl) { 812 if ((flags & DRM_CALLED_FROM_VBLIRQ) && !in_vbl) {
816 vbl_start = adev->mode_info.crtcs[crtc]->base.hwmode.crtc_vdisplay; 813 vbl_start = mode->crtc_vdisplay;
817 vtotal = adev->mode_info.crtcs[crtc]->base.hwmode.crtc_vtotal; 814 vtotal = mode->crtc_vtotal;
818 815
819 if (vbl_start - *vpos < vtotal / 100) { 816 if (vbl_start - *vpos < vtotal / 100) {
820 *vpos -= vtotal; 817 *vpos -= vtotal;