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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_device.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_device.c127
1 files changed, 12 insertions, 115 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 6279956e92a4..a6f6cb0f2e02 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -336,51 +336,16 @@ static void amdgpu_block_invalid_wreg(struct amdgpu_device *adev,
336 336
337static int amdgpu_vram_scratch_init(struct amdgpu_device *adev) 337static int amdgpu_vram_scratch_init(struct amdgpu_device *adev)
338{ 338{
339 int r; 339 return amdgpu_bo_create_kernel(adev, AMDGPU_GPU_PAGE_SIZE,
340 340 PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
341 if (adev->vram_scratch.robj == NULL) { 341 &adev->vram_scratch.robj,
342 r = amdgpu_bo_create(adev, AMDGPU_GPU_PAGE_SIZE, 342 &adev->vram_scratch.gpu_addr,
343 PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_VRAM, 343 (void **)&adev->vram_scratch.ptr);
344 AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
345 AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
346 NULL, NULL, &adev->vram_scratch.robj);
347 if (r) {
348 return r;
349 }
350 }
351
352 r = amdgpu_bo_reserve(adev->vram_scratch.robj, false);
353 if (unlikely(r != 0))
354 return r;
355 r = amdgpu_bo_pin(adev->vram_scratch.robj,
356 AMDGPU_GEM_DOMAIN_VRAM, &adev->vram_scratch.gpu_addr);
357 if (r) {
358 amdgpu_bo_unreserve(adev->vram_scratch.robj);
359 return r;
360 }
361 r = amdgpu_bo_kmap(adev->vram_scratch.robj,
362 (void **)&adev->vram_scratch.ptr);
363 if (r)
364 amdgpu_bo_unpin(adev->vram_scratch.robj);
365 amdgpu_bo_unreserve(adev->vram_scratch.robj);
366
367 return r;
368} 344}
369 345
370static void amdgpu_vram_scratch_fini(struct amdgpu_device *adev) 346static void amdgpu_vram_scratch_fini(struct amdgpu_device *adev)
371{ 347{
372 int r; 348 amdgpu_bo_free_kernel(&adev->vram_scratch.robj, NULL, NULL);
373
374 if (adev->vram_scratch.robj == NULL) {
375 return;
376 }
377 r = amdgpu_bo_reserve(adev->vram_scratch.robj, true);
378 if (likely(r == 0)) {
379 amdgpu_bo_kunmap(adev->vram_scratch.robj);
380 amdgpu_bo_unpin(adev->vram_scratch.robj);
381 amdgpu_bo_unreserve(adev->vram_scratch.robj);
382 }
383 amdgpu_bo_unref(&adev->vram_scratch.robj);
384} 349}
385 350
386/** 351/**
@@ -539,7 +504,8 @@ static int amdgpu_wb_init(struct amdgpu_device *adev)
539 int r; 504 int r;
540 505
541 if (adev->wb.wb_obj == NULL) { 506 if (adev->wb.wb_obj == NULL) {
542 r = amdgpu_bo_create_kernel(adev, AMDGPU_MAX_WB * sizeof(uint32_t), 507 /* AMDGPU_MAX_WB * sizeof(uint32_t) * 8 = AMDGPU_MAX_WB 256bit slots */
508 r = amdgpu_bo_create_kernel(adev, AMDGPU_MAX_WB * sizeof(uint32_t) * 8,
543 PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT, 509 PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,
544 &adev->wb.wb_obj, &adev->wb.gpu_addr, 510 &adev->wb.wb_obj, &adev->wb.gpu_addr,
545 (void **)&adev->wb.wb); 511 (void **)&adev->wb.wb);
@@ -570,47 +536,10 @@ static int amdgpu_wb_init(struct amdgpu_device *adev)
570int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb) 536int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb)
571{ 537{
572 unsigned long offset = find_first_zero_bit(adev->wb.used, adev->wb.num_wb); 538 unsigned long offset = find_first_zero_bit(adev->wb.used, adev->wb.num_wb);
573 if (offset < adev->wb.num_wb) {
574 __set_bit(offset, adev->wb.used);
575 *wb = offset;
576 return 0;
577 } else {
578 return -EINVAL;
579 }
580}
581 539
582/** 540 if (offset < adev->wb.num_wb) {
583 * amdgpu_wb_get_64bit - Allocate a wb entry
584 *
585 * @adev: amdgpu_device pointer
586 * @wb: wb index
587 *
588 * Allocate a wb slot for use by the driver (all asics).
589 * Returns 0 on success or -EINVAL on failure.
590 */
591int amdgpu_wb_get_64bit(struct amdgpu_device *adev, u32 *wb)
592{
593 unsigned long offset = bitmap_find_next_zero_area_off(adev->wb.used,
594 adev->wb.num_wb, 0, 2, 7, 0);
595 if ((offset + 1) < adev->wb.num_wb) {
596 __set_bit(offset, adev->wb.used); 541 __set_bit(offset, adev->wb.used);
597 __set_bit(offset + 1, adev->wb.used); 542 *wb = offset * 8; /* convert to dw offset */
598 *wb = offset;
599 return 0;
600 } else {
601 return -EINVAL;
602 }
603}
604
605int amdgpu_wb_get_256Bit(struct amdgpu_device *adev, u32 *wb)
606{
607 int i = 0;
608 unsigned long offset = bitmap_find_next_zero_area_off(adev->wb.used,
609 adev->wb.num_wb, 0, 8, 63, 0);
610 if ((offset + 7) < adev->wb.num_wb) {
611 for (i = 0; i < 8; i++)
612 __set_bit(offset + i, adev->wb.used);
613 *wb = offset;
614 return 0; 543 return 0;
615 } else { 544 } else {
616 return -EINVAL; 545 return -EINVAL;
@@ -632,39 +561,6 @@ void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb)
632} 561}
633 562
634/** 563/**
635 * amdgpu_wb_free_64bit - Free a wb entry
636 *
637 * @adev: amdgpu_device pointer
638 * @wb: wb index
639 *
640 * Free a wb slot allocated for use by the driver (all asics)
641 */
642void amdgpu_wb_free_64bit(struct amdgpu_device *adev, u32 wb)
643{
644 if ((wb + 1) < adev->wb.num_wb) {
645 __clear_bit(wb, adev->wb.used);
646 __clear_bit(wb + 1, adev->wb.used);
647 }
648}
649
650/**
651 * amdgpu_wb_free_256bit - Free a wb entry
652 *
653 * @adev: amdgpu_device pointer
654 * @wb: wb index
655 *
656 * Free a wb slot allocated for use by the driver (all asics)
657 */
658void amdgpu_wb_free_256bit(struct amdgpu_device *adev, u32 wb)
659{
660 int i = 0;
661
662 if ((wb + 7) < adev->wb.num_wb)
663 for (i = 0; i < 8; i++)
664 __clear_bit(wb + i, adev->wb.used);
665}
666
667/**
668 * amdgpu_vram_location - try to find VRAM location 564 * amdgpu_vram_location - try to find VRAM location
669 * @adev: amdgpu device structure holding all necessary informations 565 * @adev: amdgpu device structure holding all necessary informations
670 * @mc: memory controller structure holding memory informations 566 * @mc: memory controller structure holding memory informations
@@ -1948,7 +1844,8 @@ static int amdgpu_sriov_reinit_late(struct amdgpu_device *adev)
1948 AMD_IP_BLOCK_TYPE_DCE, 1844 AMD_IP_BLOCK_TYPE_DCE,
1949 AMD_IP_BLOCK_TYPE_GFX, 1845 AMD_IP_BLOCK_TYPE_GFX,
1950 AMD_IP_BLOCK_TYPE_SDMA, 1846 AMD_IP_BLOCK_TYPE_SDMA,
1951 AMD_IP_BLOCK_TYPE_VCE, 1847 AMD_IP_BLOCK_TYPE_UVD,
1848 AMD_IP_BLOCK_TYPE_VCE
1952 }; 1849 };
1953 1850
1954 for (i = 0; i < ARRAY_SIZE(ip_order); i++) { 1851 for (i = 0; i < ARRAY_SIZE(ip_order); i++) {