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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c62
1 files changed, 33 insertions, 29 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 57abf7abd7a9..4cea9ab237ac 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -90,6 +90,12 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
90 goto free_chunk; 90 goto free_chunk;
91 } 91 }
92 92
93 /* skip guilty context job */
94 if (atomic_read(&p->ctx->guilty) == 1) {
95 ret = -ECANCELED;
96 goto free_chunk;
97 }
98
93 mutex_lock(&p->ctx->lock); 99 mutex_lock(&p->ctx->lock);
94 100
95 /* get chunks */ 101 /* get chunks */
@@ -337,7 +343,7 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
337 struct amdgpu_bo *bo) 343 struct amdgpu_bo *bo)
338{ 344{
339 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); 345 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
340 u64 initial_bytes_moved, bytes_moved; 346 struct ttm_operation_ctx ctx = { true, false };
341 uint32_t domain; 347 uint32_t domain;
342 int r; 348 int r;
343 349
@@ -367,15 +373,13 @@ static int amdgpu_cs_bo_validate(struct amdgpu_cs_parser *p,
367 373
368retry: 374retry:
369 amdgpu_ttm_placement_from_domain(bo, domain); 375 amdgpu_ttm_placement_from_domain(bo, domain);
370 initial_bytes_moved = atomic64_read(&adev->num_bytes_moved); 376 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
371 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false); 377
372 bytes_moved = atomic64_read(&adev->num_bytes_moved) - 378 p->bytes_moved += ctx.bytes_moved;
373 initial_bytes_moved;
374 p->bytes_moved += bytes_moved;
375 if (adev->mc.visible_vram_size < adev->mc.real_vram_size && 379 if (adev->mc.visible_vram_size < adev->mc.real_vram_size &&
376 bo->tbo.mem.mem_type == TTM_PL_VRAM && 380 bo->tbo.mem.mem_type == TTM_PL_VRAM &&
377 bo->tbo.mem.start < adev->mc.visible_vram_size >> PAGE_SHIFT) 381 bo->tbo.mem.start < adev->mc.visible_vram_size >> PAGE_SHIFT)
378 p->bytes_moved_vis += bytes_moved; 382 p->bytes_moved_vis += ctx.bytes_moved;
379 383
380 if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) { 384 if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) {
381 domain = bo->allowed_domains; 385 domain = bo->allowed_domains;
@@ -390,6 +394,7 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
390 struct amdgpu_bo *validated) 394 struct amdgpu_bo *validated)
391{ 395{
392 uint32_t domain = validated->allowed_domains; 396 uint32_t domain = validated->allowed_domains;
397 struct ttm_operation_ctx ctx = { true, false };
393 int r; 398 int r;
394 399
395 if (!p->evictable) 400 if (!p->evictable)
@@ -431,7 +436,7 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
431 bo->tbo.mem.mem_type == TTM_PL_VRAM && 436 bo->tbo.mem.mem_type == TTM_PL_VRAM &&
432 bo->tbo.mem.start < adev->mc.visible_vram_size >> PAGE_SHIFT; 437 bo->tbo.mem.start < adev->mc.visible_vram_size >> PAGE_SHIFT;
433 initial_bytes_moved = atomic64_read(&adev->num_bytes_moved); 438 initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);
434 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false); 439 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
435 bytes_moved = atomic64_read(&adev->num_bytes_moved) - 440 bytes_moved = atomic64_read(&adev->num_bytes_moved) -
436 initial_bytes_moved; 441 initial_bytes_moved;
437 p->bytes_moved += bytes_moved; 442 p->bytes_moved += bytes_moved;
@@ -470,6 +475,7 @@ static int amdgpu_cs_validate(void *param, struct amdgpu_bo *bo)
470static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p, 475static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
471 struct list_head *validated) 476 struct list_head *validated)
472{ 477{
478 struct ttm_operation_ctx ctx = { true, false };
473 struct amdgpu_bo_list_entry *lobj; 479 struct amdgpu_bo_list_entry *lobj;
474 int r; 480 int r;
475 481
@@ -487,8 +493,7 @@ static int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
487 lobj->user_pages) { 493 lobj->user_pages) {
488 amdgpu_ttm_placement_from_domain(bo, 494 amdgpu_ttm_placement_from_domain(bo,
489 AMDGPU_GEM_DOMAIN_CPU); 495 AMDGPU_GEM_DOMAIN_CPU);
490 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, 496 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
491 false);
492 if (r) 497 if (r)
493 return r; 498 return r;
494 amdgpu_ttm_tt_set_user_pages(bo->tbo.ttm, 499 amdgpu_ttm_tt_set_user_pages(bo->tbo.ttm,
@@ -678,7 +683,7 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
678 if (!r && p->uf_entry.robj) { 683 if (!r && p->uf_entry.robj) {
679 struct amdgpu_bo *uf = p->uf_entry.robj; 684 struct amdgpu_bo *uf = p->uf_entry.robj;
680 685
681 r = amdgpu_ttm_bind(&uf->tbo, &uf->tbo.mem); 686 r = amdgpu_ttm_alloc_gart(&uf->tbo);
682 p->job->uf_addr += amdgpu_bo_gpu_offset(uf); 687 p->job->uf_addr += amdgpu_bo_gpu_offset(uf);
683 } 688 }
684 689
@@ -781,7 +786,7 @@ static int amdgpu_bo_vm_update_pte(struct amdgpu_cs_parser *p)
781 return r; 786 return r;
782 787
783 r = amdgpu_sync_fence(adev, &p->job->sync, 788 r = amdgpu_sync_fence(adev, &p->job->sync,
784 fpriv->prt_va->last_pt_update); 789 fpriv->prt_va->last_pt_update, false);
785 if (r) 790 if (r)
786 return r; 791 return r;
787 792
@@ -795,7 +800,7 @@ static int amdgpu_bo_vm_update_pte(struct amdgpu_cs_parser *p)
795 return r; 800 return r;
796 801
797 f = bo_va->last_pt_update; 802 f = bo_va->last_pt_update;
798 r = amdgpu_sync_fence(adev, &p->job->sync, f); 803 r = amdgpu_sync_fence(adev, &p->job->sync, f, false);
799 if (r) 804 if (r)
800 return r; 805 return r;
801 } 806 }
@@ -818,7 +823,7 @@ static int amdgpu_bo_vm_update_pte(struct amdgpu_cs_parser *p)
818 return r; 823 return r;
819 824
820 f = bo_va->last_pt_update; 825 f = bo_va->last_pt_update;
821 r = amdgpu_sync_fence(adev, &p->job->sync, f); 826 r = amdgpu_sync_fence(adev, &p->job->sync, f, false);
822 if (r) 827 if (r)
823 return r; 828 return r;
824 } 829 }
@@ -829,7 +834,7 @@ static int amdgpu_bo_vm_update_pte(struct amdgpu_cs_parser *p)
829 if (r) 834 if (r)
830 return r; 835 return r;
831 836
832 r = amdgpu_sync_fence(adev, &p->job->sync, vm->last_update); 837 r = amdgpu_sync_fence(adev, &p->job->sync, vm->last_update, false);
833 if (r) 838 if (r)
834 return r; 839 return r;
835 840
@@ -865,8 +870,8 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
865 struct amdgpu_bo_va_mapping *m; 870 struct amdgpu_bo_va_mapping *m;
866 struct amdgpu_bo *aobj = NULL; 871 struct amdgpu_bo *aobj = NULL;
867 struct amdgpu_cs_chunk *chunk; 872 struct amdgpu_cs_chunk *chunk;
873 uint64_t offset, va_start;
868 struct amdgpu_ib *ib; 874 struct amdgpu_ib *ib;
869 uint64_t offset;
870 uint8_t *kptr; 875 uint8_t *kptr;
871 876
872 chunk = &p->chunks[i]; 877 chunk = &p->chunks[i];
@@ -876,14 +881,14 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
876 if (chunk->chunk_id != AMDGPU_CHUNK_ID_IB) 881 if (chunk->chunk_id != AMDGPU_CHUNK_ID_IB)
877 continue; 882 continue;
878 883
879 r = amdgpu_cs_find_mapping(p, chunk_ib->va_start, 884 va_start = chunk_ib->va_start & AMDGPU_VA_HOLE_MASK;
880 &aobj, &m); 885 r = amdgpu_cs_find_mapping(p, va_start, &aobj, &m);
881 if (r) { 886 if (r) {
882 DRM_ERROR("IB va_start is invalid\n"); 887 DRM_ERROR("IB va_start is invalid\n");
883 return r; 888 return r;
884 } 889 }
885 890
886 if ((chunk_ib->va_start + chunk_ib->ib_bytes) > 891 if ((va_start + chunk_ib->ib_bytes) >
887 (m->last + 1) * AMDGPU_GPU_PAGE_SIZE) { 892 (m->last + 1) * AMDGPU_GPU_PAGE_SIZE) {
888 DRM_ERROR("IB va_start+ib_bytes is invalid\n"); 893 DRM_ERROR("IB va_start+ib_bytes is invalid\n");
889 return -EINVAL; 894 return -EINVAL;
@@ -896,7 +901,7 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
896 } 901 }
897 902
898 offset = m->start * AMDGPU_GPU_PAGE_SIZE; 903 offset = m->start * AMDGPU_GPU_PAGE_SIZE;
899 kptr += chunk_ib->va_start - offset; 904 kptr += va_start - offset;
900 905
901 memcpy(ib->ptr, kptr, chunk_ib->ib_bytes); 906 memcpy(ib->ptr, kptr, chunk_ib->ib_bytes);
902 amdgpu_bo_kunmap(aobj); 907 amdgpu_bo_kunmap(aobj);
@@ -1033,8 +1038,8 @@ static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p,
1033 amdgpu_ctx_put(ctx); 1038 amdgpu_ctx_put(ctx);
1034 return r; 1039 return r;
1035 } else if (fence) { 1040 } else if (fence) {
1036 r = amdgpu_sync_fence(p->adev, &p->job->sync, 1041 r = amdgpu_sync_fence(p->adev, &p->job->sync, fence,
1037 fence); 1042 true);
1038 dma_fence_put(fence); 1043 dma_fence_put(fence);
1039 amdgpu_ctx_put(ctx); 1044 amdgpu_ctx_put(ctx);
1040 if (r) 1045 if (r)
@@ -1053,7 +1058,7 @@ static int amdgpu_syncobj_lookup_and_add_to_sync(struct amdgpu_cs_parser *p,
1053 if (r) 1058 if (r)
1054 return r; 1059 return r;
1055 1060
1056 r = amdgpu_sync_fence(p->adev, &p->job->sync, fence); 1061 r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true);
1057 dma_fence_put(fence); 1062 dma_fence_put(fence);
1058 1063
1059 return r; 1064 return r;
@@ -1194,11 +1199,10 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
1194 job->uf_sequence = seq; 1199 job->uf_sequence = seq;
1195 1200
1196 amdgpu_job_free_resources(job); 1201 amdgpu_job_free_resources(job);
1197 amdgpu_ring_priority_get(job->ring, 1202 amdgpu_ring_priority_get(job->ring, job->base.s_priority);
1198 amd_sched_get_job_priority(&job->base));
1199 1203
1200 trace_amdgpu_cs_ioctl(job); 1204 trace_amdgpu_cs_ioctl(job);
1201 amd_sched_entity_push_job(&job->base); 1205 amd_sched_entity_push_job(&job->base, entity);
1202 1206
1203 ttm_eu_fence_buffer_objects(&p->ticket, &p->validated, p->fence); 1207 ttm_eu_fence_buffer_objects(&p->ticket, &p->validated, p->fence);
1204 amdgpu_mn_unlock(p->mn); 1208 amdgpu_mn_unlock(p->mn);
@@ -1570,6 +1574,7 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
1570 struct amdgpu_bo_va_mapping **map) 1574 struct amdgpu_bo_va_mapping **map)
1571{ 1575{
1572 struct amdgpu_fpriv *fpriv = parser->filp->driver_priv; 1576 struct amdgpu_fpriv *fpriv = parser->filp->driver_priv;
1577 struct ttm_operation_ctx ctx = { false, false };
1573 struct amdgpu_vm *vm = &fpriv->vm; 1578 struct amdgpu_vm *vm = &fpriv->vm;
1574 struct amdgpu_bo_va_mapping *mapping; 1579 struct amdgpu_bo_va_mapping *mapping;
1575 int r; 1580 int r;
@@ -1590,11 +1595,10 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
1590 if (!((*bo)->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)) { 1595 if (!((*bo)->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)) {
1591 (*bo)->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS; 1596 (*bo)->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
1592 amdgpu_ttm_placement_from_domain(*bo, (*bo)->allowed_domains); 1597 amdgpu_ttm_placement_from_domain(*bo, (*bo)->allowed_domains);
1593 r = ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, false, 1598 r = ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, &ctx);
1594 false);
1595 if (r) 1599 if (r)
1596 return r; 1600 return r;
1597 } 1601 }
1598 1602
1599 return amdgpu_ttm_bind(&(*bo)->tbo, &(*bo)->tbo.mem); 1603 return amdgpu_ttm_alloc_gart(&(*bo)->tbo);
1600} 1604}