diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 95 |
1 files changed, 13 insertions, 82 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c index 8e6bf548d689..56a86dd5789e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | |||
@@ -1115,49 +1115,6 @@ int amdgpu_atombios_get_memory_pll_dividers(struct amdgpu_device *adev, | |||
1115 | return 0; | 1115 | return 0; |
1116 | } | 1116 | } |
1117 | 1117 | ||
1118 | uint32_t amdgpu_atombios_get_engine_clock(struct amdgpu_device *adev) | ||
1119 | { | ||
1120 | GET_ENGINE_CLOCK_PS_ALLOCATION args; | ||
1121 | int index = GetIndexIntoMasterTable(COMMAND, GetEngineClock); | ||
1122 | |||
1123 | amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); | ||
1124 | return le32_to_cpu(args.ulReturnEngineClock); | ||
1125 | } | ||
1126 | |||
1127 | uint32_t amdgpu_atombios_get_memory_clock(struct amdgpu_device *adev) | ||
1128 | { | ||
1129 | GET_MEMORY_CLOCK_PS_ALLOCATION args; | ||
1130 | int index = GetIndexIntoMasterTable(COMMAND, GetMemoryClock); | ||
1131 | |||
1132 | amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); | ||
1133 | return le32_to_cpu(args.ulReturnMemoryClock); | ||
1134 | } | ||
1135 | |||
1136 | void amdgpu_atombios_set_engine_clock(struct amdgpu_device *adev, | ||
1137 | uint32_t eng_clock) | ||
1138 | { | ||
1139 | SET_ENGINE_CLOCK_PS_ALLOCATION args; | ||
1140 | int index = GetIndexIntoMasterTable(COMMAND, SetEngineClock); | ||
1141 | |||
1142 | args.ulTargetEngineClock = cpu_to_le32(eng_clock); /* 10 khz */ | ||
1143 | |||
1144 | amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); | ||
1145 | } | ||
1146 | |||
1147 | void amdgpu_atombios_set_memory_clock(struct amdgpu_device *adev, | ||
1148 | uint32_t mem_clock) | ||
1149 | { | ||
1150 | SET_MEMORY_CLOCK_PS_ALLOCATION args; | ||
1151 | int index = GetIndexIntoMasterTable(COMMAND, SetMemoryClock); | ||
1152 | |||
1153 | if (adev->flags & AMD_IS_APU) | ||
1154 | return; | ||
1155 | |||
1156 | args.ulTargetMemoryClock = cpu_to_le32(mem_clock); /* 10 khz */ | ||
1157 | |||
1158 | amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); | ||
1159 | } | ||
1160 | |||
1161 | void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev, | 1118 | void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev, |
1162 | u32 eng_clock, u32 mem_clock) | 1119 | u32 eng_clock, u32 mem_clock) |
1163 | { | 1120 | { |
@@ -1256,45 +1213,6 @@ int amdgpu_atombios_get_leakage_vddc_based_on_leakage_idx(struct amdgpu_device * | |||
1256 | return amdgpu_atombios_get_max_vddc(adev, VOLTAGE_TYPE_VDDC, leakage_idx, voltage); | 1213 | return amdgpu_atombios_get_max_vddc(adev, VOLTAGE_TYPE_VDDC, leakage_idx, voltage); |
1257 | } | 1214 | } |
1258 | 1215 | ||
1259 | void amdgpu_atombios_set_voltage(struct amdgpu_device *adev, | ||
1260 | u16 voltage_level, | ||
1261 | u8 voltage_type) | ||
1262 | { | ||
1263 | union set_voltage args; | ||
1264 | int index = GetIndexIntoMasterTable(COMMAND, SetVoltage); | ||
1265 | u8 frev, crev, volt_index = voltage_level; | ||
1266 | |||
1267 | if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev)) | ||
1268 | return; | ||
1269 | |||
1270 | /* 0xff01 is a flag rather then an actual voltage */ | ||
1271 | if (voltage_level == 0xff01) | ||
1272 | return; | ||
1273 | |||
1274 | switch (crev) { | ||
1275 | case 1: | ||
1276 | args.v1.ucVoltageType = voltage_type; | ||
1277 | args.v1.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_ALL_SOURCE; | ||
1278 | args.v1.ucVoltageIndex = volt_index; | ||
1279 | break; | ||
1280 | case 2: | ||
1281 | args.v2.ucVoltageType = voltage_type; | ||
1282 | args.v2.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_SET_VOLTAGE; | ||
1283 | args.v2.usVoltageLevel = cpu_to_le16(voltage_level); | ||
1284 | break; | ||
1285 | case 3: | ||
1286 | args.v3.ucVoltageType = voltage_type; | ||
1287 | args.v3.ucVoltageMode = ATOM_SET_VOLTAGE; | ||
1288 | args.v3.usVoltageLevel = cpu_to_le16(voltage_level); | ||
1289 | break; | ||
1290 | default: | ||
1291 | DRM_ERROR("Unknown table version %d, %d\n", frev, crev); | ||
1292 | return; | ||
1293 | } | ||
1294 | |||
1295 | amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); | ||
1296 | } | ||
1297 | |||
1298 | int amdgpu_atombios_get_leakage_id_from_vbios(struct amdgpu_device *adev, | 1216 | int amdgpu_atombios_get_leakage_id_from_vbios(struct amdgpu_device *adev, |
1299 | u16 *leakage_id) | 1217 | u16 *leakage_id) |
1300 | { | 1218 | { |
@@ -1784,6 +1702,19 @@ void amdgpu_atombios_scratch_regs_restore(struct amdgpu_device *adev) | |||
1784 | WREG32(mmBIOS_SCRATCH_0 + i, adev->bios_scratch[i]); | 1702 | WREG32(mmBIOS_SCRATCH_0 + i, adev->bios_scratch[i]); |
1785 | } | 1703 | } |
1786 | 1704 | ||
1705 | void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev, | ||
1706 | bool hung) | ||
1707 | { | ||
1708 | u32 tmp = RREG32(mmBIOS_SCRATCH_3); | ||
1709 | |||
1710 | if (hung) | ||
1711 | tmp |= ATOM_S3_ASIC_GUI_ENGINE_HUNG; | ||
1712 | else | ||
1713 | tmp &= ~ATOM_S3_ASIC_GUI_ENGINE_HUNG; | ||
1714 | |||
1715 | WREG32(mmBIOS_SCRATCH_3, tmp); | ||
1716 | } | ||
1717 | |||
1787 | /* Atom needs data in little endian format | 1718 | /* Atom needs data in little endian format |
1788 | * so swap as appropriate when copying data to | 1719 | * so swap as appropriate when copying data to |
1789 | * or from atom. Note that atom operates on | 1720 | * or from atom. Note that atom operates on |