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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu.h
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h49
1 files changed, 21 insertions, 28 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index c05b39438663..d0102cfc8efb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -81,6 +81,23 @@
81#include "amdgpu_bo_list.h" 81#include "amdgpu_bo_list.h"
82#include "amdgpu_gem.h" 82#include "amdgpu_gem.h"
83 83
84#define MAX_GPU_INSTANCE 16
85
86struct amdgpu_gpu_instance
87{
88 struct amdgpu_device *adev;
89 int mgpu_fan_enabled;
90};
91
92struct amdgpu_mgpu_info
93{
94 struct amdgpu_gpu_instance gpu_ins[MAX_GPU_INSTANCE];
95 struct mutex mutex;
96 uint32_t num_gpu;
97 uint32_t num_dgpu;
98 uint32_t num_apu;
99};
100
84/* 101/*
85 * Modules parameters. 102 * Modules parameters.
86 */ 103 */
@@ -134,6 +151,7 @@ extern int amdgpu_compute_multipipe;
134extern int amdgpu_gpu_recovery; 151extern int amdgpu_gpu_recovery;
135extern int amdgpu_emu_mode; 152extern int amdgpu_emu_mode;
136extern uint amdgpu_smu_memory_pool_size; 153extern uint amdgpu_smu_memory_pool_size;
154extern struct amdgpu_mgpu_info mgpu_info;
137 155
138#ifdef CONFIG_DRM_AMDGPU_SI 156#ifdef CONFIG_DRM_AMDGPU_SI
139extern int amdgpu_si_support; 157extern int amdgpu_si_support;
@@ -598,31 +616,6 @@ void amdgpu_benchmark(struct amdgpu_device *adev, int test_number);
598 */ 616 */
599void amdgpu_test_moves(struct amdgpu_device *adev); 617void amdgpu_test_moves(struct amdgpu_device *adev);
600 618
601
602/*
603 * amdgpu smumgr functions
604 */
605struct amdgpu_smumgr_funcs {
606 int (*check_fw_load_finish)(struct amdgpu_device *adev, uint32_t fwtype);
607 int (*request_smu_load_fw)(struct amdgpu_device *adev);
608 int (*request_smu_specific_fw)(struct amdgpu_device *adev, uint32_t fwtype);
609};
610
611/*
612 * amdgpu smumgr
613 */
614struct amdgpu_smumgr {
615 struct amdgpu_bo *toc_buf;
616 struct amdgpu_bo *smu_buf;
617 /* asic priv smu data */
618 void *priv;
619 spinlock_t smu_lock;
620 /* smumgr functions */
621 const struct amdgpu_smumgr_funcs *smumgr_funcs;
622 /* ucode loading complete flag */
623 uint32_t fw_flags;
624};
625
626/* 619/*
627 * ASIC specific register table accessible by UMD 620 * ASIC specific register table accessible by UMD
628 */ 621 */
@@ -958,9 +951,6 @@ struct amdgpu_device {
958 u32 cg_flags; 951 u32 cg_flags;
959 u32 pg_flags; 952 u32 pg_flags;
960 953
961 /* amdgpu smumgr */
962 struct amdgpu_smumgr smu;
963
964 /* gfx */ 954 /* gfx */
965 struct amdgpu_gfx gfx; 955 struct amdgpu_gfx gfx;
966 956
@@ -1025,6 +1015,9 @@ struct amdgpu_device {
1025 bool has_hw_reset; 1015 bool has_hw_reset;
1026 u8 reset_magic[AMDGPU_RESET_MAGIC_NUM]; 1016 u8 reset_magic[AMDGPU_RESET_MAGIC_NUM];
1027 1017
1018 /* s3/s4 mask */
1019 bool in_suspend;
1020
1028 /* record last mm index being written through WREG32*/ 1021 /* record last mm index being written through WREG32*/
1029 unsigned long last_mm_index; 1022 unsigned long last_mm_index;
1030 bool in_gpu_reset; 1023 bool in_gpu_reset;