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path: root/drivers/cpufreq/intel_pstate.c
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Diffstat (limited to 'drivers/cpufreq/intel_pstate.c')
-rw-r--r--drivers/cpufreq/intel_pstate.c34
1 files changed, 11 insertions, 23 deletions
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 0d159b513469..fe9dc17ea873 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -372,26 +372,9 @@ static bool intel_pstate_get_ppc_enable_status(void)
372 return acpi_ppc; 372 return acpi_ppc;
373} 373}
374 374
375/*
376 * The max target pstate ratio is a 8 bit value in both PLATFORM_INFO MSR and
377 * in TURBO_RATIO_LIMIT MSR, which pstate driver stores in max_pstate and
378 * max_turbo_pstate fields. The PERF_CTL MSR contains 16 bit value for P state
379 * ratio, out of it only high 8 bits are used. For example 0x1700 is setting
380 * target ratio 0x17. The _PSS control value stores in a format which can be
381 * directly written to PERF_CTL MSR. But in intel_pstate driver this shift
382 * occurs during write to PERF_CTL (E.g. for cores core_set_pstate()).
383 * This function converts the _PSS control value to intel pstate driver format
384 * for comparison and assignment.
385 */
386static int convert_to_native_pstate_format(struct cpudata *cpu, int index)
387{
388 return cpu->acpi_perf_data.states[index].control >> 8;
389}
390
391static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy *policy) 375static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy *policy)
392{ 376{
393 struct cpudata *cpu; 377 struct cpudata *cpu;
394 int turbo_pss_ctl;
395 int ret; 378 int ret;
396 int i; 379 int i;
397 380
@@ -441,11 +424,10 @@ static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy *policy)
441 * max frequency, which will cause a reduced performance as 424 * max frequency, which will cause a reduced performance as
442 * this driver uses real max turbo frequency as the max 425 * this driver uses real max turbo frequency as the max
443 * frequency. So correct this frequency in _PSS table to 426 * frequency. So correct this frequency in _PSS table to
444 * correct max turbo frequency based on the turbo ratio. 427 * correct max turbo frequency based on the turbo state.
445 * Also need to convert to MHz as _PSS freq is in MHz. 428 * Also need to convert to MHz as _PSS freq is in MHz.
446 */ 429 */
447 turbo_pss_ctl = convert_to_native_pstate_format(cpu, 0); 430 if (!limits->turbo_disabled)
448 if (turbo_pss_ctl > cpu->pstate.max_pstate)
449 cpu->acpi_perf_data.states[0].core_frequency = 431 cpu->acpi_perf_data.states[0].core_frequency =
450 policy->cpuinfo.max_freq / 1000; 432 policy->cpuinfo.max_freq / 1000;
451 cpu->valid_pss_table = true; 433 cpu->valid_pss_table = true;
@@ -1460,6 +1442,9 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy)
1460 1442
1461 intel_pstate_clear_update_util_hook(policy->cpu); 1443 intel_pstate_clear_update_util_hook(policy->cpu);
1462 1444
1445 pr_debug("set_policy cpuinfo.max %u policy->max %u\n",
1446 policy->cpuinfo.max_freq, policy->max);
1447
1463 cpu = all_cpu_data[0]; 1448 cpu = all_cpu_data[0];
1464 if (cpu->pstate.max_pstate_physical > cpu->pstate.max_pstate && 1449 if (cpu->pstate.max_pstate_physical > cpu->pstate.max_pstate &&
1465 policy->max < policy->cpuinfo.max_freq && 1450 policy->max < policy->cpuinfo.max_freq &&
@@ -1495,13 +1480,13 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy)
1495 limits->max_sysfs_pct); 1480 limits->max_sysfs_pct);
1496 limits->max_perf_pct = max(limits->min_policy_pct, 1481 limits->max_perf_pct = max(limits->min_policy_pct,
1497 limits->max_perf_pct); 1482 limits->max_perf_pct);
1498 limits->max_perf = round_up(limits->max_perf, FRAC_BITS);
1499 1483
1500 /* Make sure min_perf_pct <= max_perf_pct */ 1484 /* Make sure min_perf_pct <= max_perf_pct */
1501 limits->min_perf_pct = min(limits->max_perf_pct, limits->min_perf_pct); 1485 limits->min_perf_pct = min(limits->max_perf_pct, limits->min_perf_pct);
1502 1486
1503 limits->min_perf = div_fp(limits->min_perf_pct, 100); 1487 limits->min_perf = div_fp(limits->min_perf_pct, 100);
1504 limits->max_perf = div_fp(limits->max_perf_pct, 100); 1488 limits->max_perf = div_fp(limits->max_perf_pct, 100);
1489 limits->max_perf = round_up(limits->max_perf, FRAC_BITS);
1505 1490
1506 out: 1491 out:
1507 intel_pstate_set_update_util_hook(policy->cpu); 1492 intel_pstate_set_update_util_hook(policy->cpu);
@@ -1558,8 +1543,11 @@ static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
1558 1543
1559 /* cpuinfo and default policy values */ 1544 /* cpuinfo and default policy values */
1560 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * cpu->pstate.scaling; 1545 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * cpu->pstate.scaling;
1561 policy->cpuinfo.max_freq = 1546 update_turbo_state();
1562 cpu->pstate.turbo_pstate * cpu->pstate.scaling; 1547 policy->cpuinfo.max_freq = limits->turbo_disabled ?
1548 cpu->pstate.max_pstate : cpu->pstate.turbo_pstate;
1549 policy->cpuinfo.max_freq *= cpu->pstate.scaling;
1550
1563 intel_pstate_init_acpi_perf_limits(policy); 1551 intel_pstate_init_acpi_perf_limits(policy);
1564 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 1552 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
1565 cpumask_set_cpu(policy->cpu, policy->cpus); 1553 cpumask_set_cpu(policy->cpu, policy->cpus);