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path: root/drivers/clocksource/timer-npcm7xx.c
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Diffstat (limited to 'drivers/clocksource/timer-npcm7xx.c')
-rw-r--r--drivers/clocksource/timer-npcm7xx.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/clocksource/timer-npcm7xx.c b/drivers/clocksource/timer-npcm7xx.c
index 8a30da7f083b..9780ffd8010e 100644
--- a/drivers/clocksource/timer-npcm7xx.c
+++ b/drivers/clocksource/timer-npcm7xx.c
@@ -32,7 +32,7 @@
32#define NPCM7XX_Tx_INTEN BIT(29) 32#define NPCM7XX_Tx_INTEN BIT(29)
33#define NPCM7XX_Tx_COUNTEN BIT(30) 33#define NPCM7XX_Tx_COUNTEN BIT(30)
34#define NPCM7XX_Tx_ONESHOT 0x0 34#define NPCM7XX_Tx_ONESHOT 0x0
35#define NPCM7XX_Tx_OPER GENMASK(27, 3) 35#define NPCM7XX_Tx_OPER GENMASK(28, 27)
36#define NPCM7XX_Tx_MIN_PRESCALE 0x1 36#define NPCM7XX_Tx_MIN_PRESCALE 0x1
37#define NPCM7XX_Tx_TDR_MASK_BITS 24 37#define NPCM7XX_Tx_TDR_MASK_BITS 24
38#define NPCM7XX_Tx_MAX_CNT 0xFFFFFF 38#define NPCM7XX_Tx_MAX_CNT 0xFFFFFF
@@ -84,8 +84,6 @@ static int npcm7xx_timer_oneshot(struct clock_event_device *evt)
84 84
85 val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0); 85 val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
86 val &= ~NPCM7XX_Tx_OPER; 86 val &= ~NPCM7XX_Tx_OPER;
87
88 val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
89 val |= NPCM7XX_START_ONESHOT_Tx; 87 val |= NPCM7XX_START_ONESHOT_Tx;
90 writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0); 88 writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0);
91 89
@@ -97,12 +95,11 @@ static int npcm7xx_timer_periodic(struct clock_event_device *evt)
97 struct timer_of *to = to_timer_of(evt); 95 struct timer_of *to = to_timer_of(evt);
98 u32 val; 96 u32 val;
99 97
98 writel(timer_of_period(to), timer_of_base(to) + NPCM7XX_REG_TICR0);
99
100 val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0); 100 val = readl(timer_of_base(to) + NPCM7XX_REG_TCSR0);
101 val &= ~NPCM7XX_Tx_OPER; 101 val &= ~NPCM7XX_Tx_OPER;
102
103 writel(timer_of_period(to), timer_of_base(to) + NPCM7XX_REG_TICR0);
104 val |= NPCM7XX_START_PERIODIC_Tx; 102 val |= NPCM7XX_START_PERIODIC_Tx;
105
106 writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0); 103 writel(val, timer_of_base(to) + NPCM7XX_REG_TCSR0);
107 104
108 return 0; 105 return 0;