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-rw-r--r--arch/arc/Kconfig21
-rw-r--r--arch/arc/configs/vdk_hs38_smp_defconfig2
-rw-r--r--arch/arc/include/asm/arcregs.h3
-rw-r--r--arch/arc/include/asm/irqflags-arcv2.h7
-rw-r--r--arch/arc/include/asm/mcip.h4
-rw-r--r--arch/arc/include/asm/pgtable.h45
-rw-r--r--arch/arc/kernel/entry-arcv2.S19
-rw-r--r--arch/arc/kernel/intc-arcv2.c41
-rw-r--r--arch/arc/kernel/mcip.c10
-rw-r--r--arch/arc/kernel/setup.c20
-rw-r--r--arch/arc/kernel/time.c8
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi1
-rw-r--r--arch/arm/boot/dts/am4372.dtsi5
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts4
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts2
-rw-r--r--arch/arm/boot/dts/am57xx-cl-som-am57x.dts12
-rw-r--r--arch/arm/boot/dts/am57xx-sbc-am57x.dts8
-rw-r--r--arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts1
-rw-r--r--arch/arm/boot/dts/at91-sama5d2_xplained.dts12
-rw-r--r--arch/arm/boot/dts/at91-sama5d4_xplained.dts8
-rw-r--r--arch/arm/boot/dts/at91-sama5d4ek.dts11
-rw-r--r--arch/arm/boot/dts/at91sam9n12ek.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-lswvl.dts25
-rw-r--r--arch/arm/boot/dts/kirkwood-lswxl.dts31
-rw-r--r--arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts1
-rw-r--r--arch/arm/boot/dts/logicpd-torpedo-som.dtsi9
-rw-r--r--arch/arm/boot/dts/omap5-board-common.dtsi33
-rw-r--r--arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts8
-rw-r--r--arch/arm/boot/dts/sama5d4.dtsi2
-rw-r--r--arch/arm/boot/dts/ste-nomadik-stn8815.dtsi37
-rw-r--r--arch/arm/common/icst.c9
-rw-r--r--arch/arm/configs/multi_v7_defconfig1
-rw-r--r--arch/arm/configs/omap2plus_defconfig43
-rw-r--r--arch/arm/mach-omap2/devices.c28
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c23
-rw-r--r--arch/arm/mach-omap2/sleep34xx.S61
-rw-r--r--arch/arm/mach-omap2/sleep44xx.S25
-rw-r--r--arch/arm/mach-realview/Kconfig3
-rw-r--r--arch/arm/mach-realview/platsmp-dt.c2
-rw-r--r--arch/arm/mach-tango/Kconfig3
-rw-r--r--arch/arm/mach-tango/platsmp.c2
-rw-r--r--arch/arm64/boot/dts/arm/juno-base.dtsi1
-rw-r--r--arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi19
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra132-norrin.dts2
-rw-r--r--arch/arm64/include/asm/arch_gicv3.h1
-rw-r--r--arch/arm64/include/asm/futex.h2
-rw-r--r--arch/arm64/include/asm/kvm_arm.h1
-rw-r--r--arch/arm64/include/asm/kvm_emulate.h8
-rw-r--r--arch/arm64/include/asm/page.h1
-rw-r--r--arch/arm64/kvm/hyp/switch.c8
-rw-r--r--arch/arm64/kvm/inject_fault.c38
-rw-r--r--arch/arm64/kvm/sys_regs.c9
-rw-r--r--arch/arm64/mm/pageattr.c23
-rw-r--r--arch/m32r/Kconfig1
-rw-r--r--arch/mips/Kconfig2
-rw-r--r--arch/mips/boot/dts/brcm/bcm6328.dtsi1
-rw-r--r--arch/mips/boot/dts/brcm/bcm7125.dtsi1
-rw-r--r--arch/mips/boot/dts/brcm/bcm7346.dtsi1
-rw-r--r--arch/mips/boot/dts/brcm/bcm7358.dtsi1
-rw-r--r--arch/mips/boot/dts/brcm/bcm7360.dtsi1
-rw-r--r--arch/mips/boot/dts/brcm/bcm7362.dtsi1
-rw-r--r--arch/mips/boot/dts/brcm/bcm7420.dtsi1
-rw-r--r--arch/mips/boot/dts/brcm/bcm7425.dtsi1
-rw-r--r--arch/mips/boot/dts/brcm/bcm7435.dtsi1
-rw-r--r--arch/mips/include/asm/elf.h9
-rw-r--r--arch/mips/include/asm/fpu.h4
-rw-r--r--arch/mips/include/asm/octeon/octeon-feature.h3
-rw-r--r--arch/mips/include/asm/processor.h2
-rw-r--r--arch/mips/include/asm/stackframe.h4
-rw-r--r--arch/mips/include/asm/syscall.h4
-rw-r--r--arch/mips/include/uapi/asm/unistd.h15
-rw-r--r--arch/mips/kernel/binfmt_elfn32.c2
-rw-r--r--arch/mips/kernel/binfmt_elfo32.c2
-rw-r--r--arch/mips/kernel/process.c6
-rw-r--r--arch/mips/kernel/scall32-o32.S1
-rw-r--r--arch/mips/kernel/scall64-64.S1
-rw-r--r--arch/mips/kernel/scall64-n32.S1
-rw-r--r--arch/mips/kernel/scall64-o32.S1
-rw-r--r--arch/mips/kernel/setup.c1
-rw-r--r--arch/mips/kernel/traps.c25
-rw-r--r--arch/mips/mm/sc-mips.c10
-rw-r--r--arch/mips/mti-malta/malta-init.c8
-rw-r--r--arch/mips/pci/pci-mt7620.c8
-rw-r--r--arch/um/include/asm/page.h23
-rw-r--r--arch/x86/Kconfig1
-rw-r--r--arch/x86/crypto/chacha20-ssse3-x86_64.S6
-rw-r--r--arch/x86/include/asm/processor.h2
-rw-r--r--arch/x86/mm/hugetlbpage.c4
-rw-r--r--arch/x86/mm/numa.c2
89 files changed, 527 insertions, 335 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 76dde9db7934..0655495470ad 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -338,6 +338,19 @@ config ARC_PAGE_SIZE_4K
338 338
339endchoice 339endchoice
340 340
341choice
342 prompt "MMU Super Page Size"
343 depends on ISA_ARCV2 && TRANSPARENT_HUGEPAGE
344 default ARC_HUGEPAGE_2M
345
346config ARC_HUGEPAGE_2M
347 bool "2MB"
348
349config ARC_HUGEPAGE_16M
350 bool "16MB"
351
352endchoice
353
341if ISA_ARCOMPACT 354if ISA_ARCOMPACT
342 355
343config ARC_COMPACT_IRQ_LEVELS 356config ARC_COMPACT_IRQ_LEVELS
@@ -410,7 +423,7 @@ config ARC_HAS_RTC
410 default n 423 default n
411 depends on !SMP 424 depends on !SMP
412 425
413config ARC_HAS_GRTC 426config ARC_HAS_GFRC
414 bool "SMP synchronized 64-bit cycle counter" 427 bool "SMP synchronized 64-bit cycle counter"
415 default y 428 default y
416 depends on SMP 429 depends on SMP
@@ -566,6 +579,12 @@ endmenu
566endmenu # "ARC Architecture Configuration" 579endmenu # "ARC Architecture Configuration"
567 580
568source "mm/Kconfig" 581source "mm/Kconfig"
582
583config FORCE_MAX_ZONEORDER
584 int "Maximum zone order"
585 default "12" if ARC_HUGEPAGE_16M
586 default "11"
587
569source "net/Kconfig" 588source "net/Kconfig"
570source "drivers/Kconfig" 589source "drivers/Kconfig"
571source "fs/Kconfig" 590source "fs/Kconfig"
diff --git a/arch/arc/configs/vdk_hs38_smp_defconfig b/arch/arc/configs/vdk_hs38_smp_defconfig
index f36c047b33ca..735985974a31 100644
--- a/arch/arc/configs/vdk_hs38_smp_defconfig
+++ b/arch/arc/configs/vdk_hs38_smp_defconfig
@@ -16,7 +16,7 @@ CONFIG_ARC_PLAT_AXS10X=y
16CONFIG_AXS103=y 16CONFIG_AXS103=y
17CONFIG_ISA_ARCV2=y 17CONFIG_ISA_ARCV2=y
18CONFIG_SMP=y 18CONFIG_SMP=y
19# CONFIG_ARC_HAS_GRTC is not set 19# CONFIG_ARC_HAS_GFRC is not set
20CONFIG_ARC_UBOOT_SUPPORT=y 20CONFIG_ARC_UBOOT_SUPPORT=y
21CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp" 21CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp"
22CONFIG_PREEMPT=y 22CONFIG_PREEMPT=y
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 7fac7d85ed6a..fdc5be5b1029 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -349,14 +349,13 @@ struct cpuinfo_arc {
349 struct cpuinfo_arc_bpu bpu; 349 struct cpuinfo_arc_bpu bpu;
350 struct bcr_identity core; 350 struct bcr_identity core;
351 struct bcr_isa isa; 351 struct bcr_isa isa;
352 struct bcr_timer timers;
353 unsigned int vec_base; 352 unsigned int vec_base;
354 struct cpuinfo_arc_ccm iccm, dccm; 353 struct cpuinfo_arc_ccm iccm, dccm;
355 struct { 354 struct {
356 unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, pad1:3, 355 unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, pad1:3,
357 fpu_sp:1, fpu_dp:1, pad2:6, 356 fpu_sp:1, fpu_dp:1, pad2:6,
358 debug:1, ap:1, smart:1, rtt:1, pad3:4, 357 debug:1, ap:1, smart:1, rtt:1, pad3:4,
359 pad4:8; 358 timer0:1, timer1:1, rtc:1, gfrc:1, pad4:4;
360 } extn; 359 } extn;
361 struct bcr_mpy extn_mpy; 360 struct bcr_mpy extn_mpy;
362 struct bcr_extn_xymem extn_xymem; 361 struct bcr_extn_xymem extn_xymem;
diff --git a/arch/arc/include/asm/irqflags-arcv2.h b/arch/arc/include/asm/irqflags-arcv2.h
index 258b0e5ad332..1fc18ee06cf2 100644
--- a/arch/arc/include/asm/irqflags-arcv2.h
+++ b/arch/arc/include/asm/irqflags-arcv2.h
@@ -30,8 +30,11 @@
30/* Was Intr taken in User Mode */ 30/* Was Intr taken in User Mode */
31#define AUX_IRQ_ACT_BIT_U 31 31#define AUX_IRQ_ACT_BIT_U 31
32 32
33/* 0 is highest level, but taken by FIRQs, if present in design */ 33/*
34#define ARCV2_IRQ_DEF_PRIO 0 34 * User space should be interruptable even by lowest prio interrupt
35 * Safe even if actual interrupt priorities is fewer or even one
36 */
37#define ARCV2_IRQ_DEF_PRIO 15
35 38
36/* seed value for status register */ 39/* seed value for status register */
37#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \ 40#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \
diff --git a/arch/arc/include/asm/mcip.h b/arch/arc/include/asm/mcip.h
index 46f4e5351b2a..847e3bbe387f 100644
--- a/arch/arc/include/asm/mcip.h
+++ b/arch/arc/include/asm/mcip.h
@@ -39,8 +39,8 @@ struct mcip_cmd {
39#define CMD_DEBUG_SET_MASK 0x34 39#define CMD_DEBUG_SET_MASK 0x34
40#define CMD_DEBUG_SET_SELECT 0x36 40#define CMD_DEBUG_SET_SELECT 0x36
41 41
42#define CMD_GRTC_READ_LO 0x42 42#define CMD_GFRC_READ_LO 0x42
43#define CMD_GRTC_READ_HI 0x43 43#define CMD_GFRC_READ_HI 0x43
44 44
45#define CMD_IDU_ENABLE 0x71 45#define CMD_IDU_ENABLE 0x71
46#define CMD_IDU_DISABLE 0x72 46#define CMD_IDU_DISABLE 0x72
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h
index 57af2f05ae84..d426d4215513 100644
--- a/arch/arc/include/asm/pgtable.h
+++ b/arch/arc/include/asm/pgtable.h
@@ -179,37 +179,44 @@
179#define __S111 PAGE_U_X_W_R 179#define __S111 PAGE_U_X_W_R
180 180
181/**************************************************************** 181/****************************************************************
182 * Page Table Lookup split 182 * 2 tier (PGD:PTE) software page walker
183 * 183 *
184 * We implement 2 tier paging and since this is all software, we are free 184 * [31] 32 bit virtual address [0]
185 * to customize the span of a PGD / PTE entry to suit us
186 *
187 * 32 bit virtual address
188 * ------------------------------------------------------- 185 * -------------------------------------------------------
189 * | BITS_FOR_PGD | BITS_FOR_PTE | BITS_IN_PAGE | 186 * | | <------------ PGDIR_SHIFT ----------> |
187 * | | |
188 * | BITS_FOR_PGD | BITS_FOR_PTE | <-- PAGE_SHIFT --> |
190 * ------------------------------------------------------- 189 * -------------------------------------------------------
191 * | | | 190 * | | |
192 * | | --> off in page frame 191 * | | --> off in page frame
193 * | |
194 * | ---> index into Page Table 192 * | ---> index into Page Table
195 * |
196 * ----> index into Page Directory 193 * ----> index into Page Directory
194 *
195 * In a single page size configuration, only PAGE_SHIFT is fixed
196 * So both PGD and PTE sizing can be tweaked
197 * e.g. 8K page (PAGE_SHIFT 13) can have
198 * - PGDIR_SHIFT 21 -> 11:8:13 address split
199 * - PGDIR_SHIFT 24 -> 8:11:13 address split
200 *
201 * If Super Page is configured, PGDIR_SHIFT becomes fixed too,
202 * so the sizing flexibility is gone.
197 */ 203 */
198 204
199#define BITS_IN_PAGE PAGE_SHIFT 205#if defined(CONFIG_ARC_HUGEPAGE_16M)
200 206#define PGDIR_SHIFT 24
201/* Optimal Sizing of Pg Tbl - based on MMU page size */ 207#elif defined(CONFIG_ARC_HUGEPAGE_2M)
202#if defined(CONFIG_ARC_PAGE_SIZE_8K) 208#define PGDIR_SHIFT 21
203#define BITS_FOR_PTE 8 /* 11:8:13 */ 209#else
204#elif defined(CONFIG_ARC_PAGE_SIZE_16K) 210/*
205#define BITS_FOR_PTE 8 /* 10:8:14 */ 211 * Only Normal page support so "hackable" (see comment above)
206#elif defined(CONFIG_ARC_PAGE_SIZE_4K) 212 * Default value provides 11:8:13 (8K), 11:9:12 (4K)
207#define BITS_FOR_PTE 9 /* 11:9:12 */ 213 */
214#define PGDIR_SHIFT 21
208#endif 215#endif
209 216
210#define BITS_FOR_PGD (32 - BITS_FOR_PTE - BITS_IN_PAGE) 217#define BITS_FOR_PTE (PGDIR_SHIFT - PAGE_SHIFT)
218#define BITS_FOR_PGD (32 - PGDIR_SHIFT)
211 219
212#define PGDIR_SHIFT (32 - BITS_FOR_PGD)
213#define PGDIR_SIZE (1UL << PGDIR_SHIFT) /* vaddr span, not PDG sz */ 220#define PGDIR_SIZE (1UL << PGDIR_SHIFT) /* vaddr span, not PDG sz */
214#define PGDIR_MASK (~(PGDIR_SIZE-1)) 221#define PGDIR_MASK (~(PGDIR_SIZE-1))
215 222
diff --git a/arch/arc/kernel/entry-arcv2.S b/arch/arc/kernel/entry-arcv2.S
index cbfec79137bf..b17830294706 100644
--- a/arch/arc/kernel/entry-arcv2.S
+++ b/arch/arc/kernel/entry-arcv2.S
@@ -211,7 +211,11 @@ debug_marker_syscall:
211; (since IRQ NOT allowed in DS in ARCv2, this can only happen if orig 211; (since IRQ NOT allowed in DS in ARCv2, this can only happen if orig
212; entry was via Exception in DS which got preempted in kernel). 212; entry was via Exception in DS which got preempted in kernel).
213; 213;
214; IRQ RTIE won't reliably restore DE bit and/or BTA, needs handling 214; IRQ RTIE won't reliably restore DE bit and/or BTA, needs workaround
215;
216; Solution is return from Intr w/o any delay slot quirks into a kernel trampoline
217; and from pure kernel mode return to delay slot which handles DS bit/BTA correctly
218
215.Lintr_ret_to_delay_slot: 219.Lintr_ret_to_delay_slot:
216debug_marker_ds: 220debug_marker_ds:
217 221
@@ -222,18 +226,23 @@ debug_marker_ds:
222 ld r2, [sp, PT_ret] 226 ld r2, [sp, PT_ret]
223 ld r3, [sp, PT_status32] 227 ld r3, [sp, PT_status32]
224 228
229 ; STAT32 for Int return created from scratch
230 ; (No delay dlot, disable Further intr in trampoline)
231
225 bic r0, r3, STATUS_U_MASK|STATUS_DE_MASK|STATUS_IE_MASK|STATUS_L_MASK 232 bic r0, r3, STATUS_U_MASK|STATUS_DE_MASK|STATUS_IE_MASK|STATUS_L_MASK
226 st r0, [sp, PT_status32] 233 st r0, [sp, PT_status32]
227 234
228 mov r1, .Lintr_ret_to_delay_slot_2 235 mov r1, .Lintr_ret_to_delay_slot_2
229 st r1, [sp, PT_ret] 236 st r1, [sp, PT_ret]
230 237
238 ; Orig exception PC/STAT32 safekept @orig_r0 and @event stack slots
231 st r2, [sp, 0] 239 st r2, [sp, 0]
232 st r3, [sp, 4] 240 st r3, [sp, 4]
233 241
234 b .Lisr_ret_fast_path 242 b .Lisr_ret_fast_path
235 243
236.Lintr_ret_to_delay_slot_2: 244.Lintr_ret_to_delay_slot_2:
245 ; Trampoline to restore orig exception PC/STAT32/BTA/AUX_USER_SP
237 sub sp, sp, SZ_PT_REGS 246 sub sp, sp, SZ_PT_REGS
238 st r9, [sp, -4] 247 st r9, [sp, -4]
239 248
@@ -243,11 +252,19 @@ debug_marker_ds:
243 ld r9, [sp, 4] 252 ld r9, [sp, 4]
244 sr r9, [erstatus] 253 sr r9, [erstatus]
245 254
255 ; restore AUX_USER_SP if returning to U mode
256 bbit0 r9, STATUS_U_BIT, 1f
257 ld r9, [sp, PT_sp]
258 sr r9, [AUX_USER_SP]
259
2601:
246 ld r9, [sp, 8] 261 ld r9, [sp, 8]
247 sr r9, [erbta] 262 sr r9, [erbta]
248 263
249 ld r9, [sp, -4] 264 ld r9, [sp, -4]
250 add sp, sp, SZ_PT_REGS 265 add sp, sp, SZ_PT_REGS
266
267 ; return from pure kernel mode to delay slot
251 rtie 268 rtie
252 269
253END(ret_from_exception) 270END(ret_from_exception)
diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c
index 0394f9f61b46..942526322ae7 100644
--- a/arch/arc/kernel/intc-arcv2.c
+++ b/arch/arc/kernel/intc-arcv2.c
@@ -14,6 +14,8 @@
14#include <linux/irqchip.h> 14#include <linux/irqchip.h>
15#include <asm/irq.h> 15#include <asm/irq.h>
16 16
17static int irq_prio;
18
17/* 19/*
18 * Early Hardware specific Interrupt setup 20 * Early Hardware specific Interrupt setup
19 * -Called very early (start_kernel -> setup_arch -> setup_processor) 21 * -Called very early (start_kernel -> setup_arch -> setup_processor)
@@ -24,6 +26,14 @@ void arc_init_IRQ(void)
24{ 26{
25 unsigned int tmp; 27 unsigned int tmp;
26 28
29 struct irq_build {
30#ifdef CONFIG_CPU_BIG_ENDIAN
31 unsigned int pad:3, firq:1, prio:4, exts:8, irqs:8, ver:8;
32#else
33 unsigned int ver:8, irqs:8, exts:8, prio:4, firq:1, pad:3;
34#endif
35 } irq_bcr;
36
27 struct aux_irq_ctrl { 37 struct aux_irq_ctrl {
28#ifdef CONFIG_CPU_BIG_ENDIAN 38#ifdef CONFIG_CPU_BIG_ENDIAN
29 unsigned int res3:18, save_idx_regs:1, res2:1, 39 unsigned int res3:18, save_idx_regs:1, res2:1,
@@ -46,28 +56,25 @@ void arc_init_IRQ(void)
46 56
47 WRITE_AUX(AUX_IRQ_CTRL, ictrl); 57 WRITE_AUX(AUX_IRQ_CTRL, ictrl);
48 58
49 /* setup status32, don't enable intr yet as kernel doesn't want */
50 tmp = read_aux_reg(0xa);
51 tmp |= ISA_INIT_STATUS_BITS;
52 tmp &= ~STATUS_IE_MASK;
53 asm volatile("flag %0 \n"::"r"(tmp));
54
55 /* 59 /*
56 * ARCv2 core intc provides multiple interrupt priorities (upto 16). 60 * ARCv2 core intc provides multiple interrupt priorities (upto 16).
57 * Typical builds though have only two levels (0-high, 1-low) 61 * Typical builds though have only two levels (0-high, 1-low)
58 * Linux by default uses lower prio 1 for most irqs, reserving 0 for 62 * Linux by default uses lower prio 1 for most irqs, reserving 0 for
59 * NMI style interrupts in future (say perf) 63 * NMI style interrupts in future (say perf)
60 *
61 * Read the intc BCR to confirm that Linux default priority is avail
62 * in h/w
63 *
64 * Note:
65 * IRQ_BCR[27..24] contains N-1 (for N priority levels) and prio level
66 * is 0 based.
67 */ 64 */
68 tmp = (read_aux_reg(ARC_REG_IRQ_BCR) >> 24 ) & 0xF; 65
69 if (ARCV2_IRQ_DEF_PRIO > tmp) 66 READ_BCR(ARC_REG_IRQ_BCR, irq_bcr);
70 panic("Linux default irq prio incorrect\n"); 67
68 irq_prio = irq_bcr.prio; /* Encoded as N-1 for N levels */
69 pr_info("archs-intc\t: %d priority levels (default %d)%s\n",
70 irq_prio + 1, irq_prio,
71 irq_bcr.firq ? " FIRQ (not used)":"");
72
73 /* setup status32, don't enable intr yet as kernel doesn't want */
74 tmp = read_aux_reg(0xa);
75 tmp |= STATUS_AD_MASK | (irq_prio << 1);
76 tmp &= ~STATUS_IE_MASK;
77 asm volatile("flag %0 \n"::"r"(tmp));
71} 78}
72 79
73static void arcv2_irq_mask(struct irq_data *data) 80static void arcv2_irq_mask(struct irq_data *data)
@@ -86,7 +93,7 @@ void arcv2_irq_enable(struct irq_data *data)
86{ 93{
87 /* set default priority */ 94 /* set default priority */
88 write_aux_reg(AUX_IRQ_SELECT, data->irq); 95 write_aux_reg(AUX_IRQ_SELECT, data->irq);
89 write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO); 96 write_aux_reg(AUX_IRQ_PRIORITY, irq_prio);
90 97
91 /* 98 /*
92 * hw auto enables (linux unmask) all by default 99 * hw auto enables (linux unmask) all by default
diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index bd237acdf4f2..bc771f58fefb 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -96,13 +96,13 @@ static void mcip_probe_n_setup(void)
96#ifdef CONFIG_CPU_BIG_ENDIAN 96#ifdef CONFIG_CPU_BIG_ENDIAN
97 unsigned int pad3:8, 97 unsigned int pad3:8,
98 idu:1, llm:1, num_cores:6, 98 idu:1, llm:1, num_cores:6,
99 iocoh:1, grtc:1, dbg:1, pad2:1, 99 iocoh:1, gfrc:1, dbg:1, pad2:1,
100 msg:1, sem:1, ipi:1, pad:1, 100 msg:1, sem:1, ipi:1, pad:1,
101 ver:8; 101 ver:8;
102#else 102#else
103 unsigned int ver:8, 103 unsigned int ver:8,
104 pad:1, ipi:1, sem:1, msg:1, 104 pad:1, ipi:1, sem:1, msg:1,
105 pad2:1, dbg:1, grtc:1, iocoh:1, 105 pad2:1, dbg:1, gfrc:1, iocoh:1,
106 num_cores:6, llm:1, idu:1, 106 num_cores:6, llm:1, idu:1,
107 pad3:8; 107 pad3:8;
108#endif 108#endif
@@ -116,7 +116,7 @@ static void mcip_probe_n_setup(void)
116 IS_AVAIL1(mp.ipi, "IPI "), 116 IS_AVAIL1(mp.ipi, "IPI "),
117 IS_AVAIL1(mp.idu, "IDU "), 117 IS_AVAIL1(mp.idu, "IDU "),
118 IS_AVAIL1(mp.dbg, "DEBUG "), 118 IS_AVAIL1(mp.dbg, "DEBUG "),
119 IS_AVAIL1(mp.grtc, "GRTC")); 119 IS_AVAIL1(mp.gfrc, "GFRC"));
120 120
121 idu_detected = mp.idu; 121 idu_detected = mp.idu;
122 122
@@ -125,8 +125,8 @@ static void mcip_probe_n_setup(void)
125 __mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf); 125 __mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf);
126 } 126 }
127 127
128 if (IS_ENABLED(CONFIG_ARC_HAS_GRTC) && !mp.grtc) 128 if (IS_ENABLED(CONFIG_ARC_HAS_GFRC) && !mp.gfrc)
129 panic("kernel trying to use non-existent GRTC\n"); 129 panic("kernel trying to use non-existent GFRC\n");
130} 130}
131 131
132struct plat_smp_ops plat_smp_ops = { 132struct plat_smp_ops plat_smp_ops = {
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index e1b87444ea9a..a7edceba5f84 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -45,6 +45,7 @@ struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
45static void read_arc_build_cfg_regs(void) 45static void read_arc_build_cfg_regs(void)
46{ 46{
47 struct bcr_perip uncached_space; 47 struct bcr_perip uncached_space;
48 struct bcr_timer timer;
48 struct bcr_generic bcr; 49 struct bcr_generic bcr;
49 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 50 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
50 unsigned long perip_space; 51 unsigned long perip_space;
@@ -53,7 +54,11 @@ static void read_arc_build_cfg_regs(void)
53 READ_BCR(AUX_IDENTITY, cpu->core); 54 READ_BCR(AUX_IDENTITY, cpu->core);
54 READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa); 55 READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
55 56
56 READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers); 57 READ_BCR(ARC_REG_TIMERS_BCR, timer);
58 cpu->extn.timer0 = timer.t0;
59 cpu->extn.timer1 = timer.t1;
60 cpu->extn.rtc = timer.rtc;
61
57 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE); 62 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
58 63
59 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space); 64 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
@@ -208,9 +213,9 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
208 (unsigned int)(arc_get_core_freq() / 10000) % 100); 213 (unsigned int)(arc_get_core_freq() / 10000) % 100);
209 214
210 n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ", 215 n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
211 IS_AVAIL1(cpu->timers.t0, "Timer0 "), 216 IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
212 IS_AVAIL1(cpu->timers.t1, "Timer1 "), 217 IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
213 IS_AVAIL2(cpu->timers.rtc, "64-bit RTC ", 218 IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ",
214 CONFIG_ARC_HAS_RTC)); 219 CONFIG_ARC_HAS_RTC));
215 220
216 n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s", 221 n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
@@ -293,13 +298,13 @@ static void arc_chk_core_config(void)
293 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 298 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
294 int fpu_enabled; 299 int fpu_enabled;
295 300
296 if (!cpu->timers.t0) 301 if (!cpu->extn.timer0)
297 panic("Timer0 is not present!\n"); 302 panic("Timer0 is not present!\n");
298 303
299 if (!cpu->timers.t1) 304 if (!cpu->extn.timer1)
300 panic("Timer1 is not present!\n"); 305 panic("Timer1 is not present!\n");
301 306
302 if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->timers.rtc) 307 if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->extn.rtc)
303 panic("RTC is not present\n"); 308 panic("RTC is not present\n");
304 309
305#ifdef CONFIG_ARC_HAS_DCCM 310#ifdef CONFIG_ARC_HAS_DCCM
@@ -334,6 +339,7 @@ static void arc_chk_core_config(void)
334 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n"); 339 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
335 340
336 if (is_isa_arcv2() && IS_ENABLED(CONFIG_SMP) && cpu->isa.atomic && 341 if (is_isa_arcv2() && IS_ENABLED(CONFIG_SMP) && cpu->isa.atomic &&
342 IS_ENABLED(CONFIG_ARC_HAS_LLSC) &&
337 !IS_ENABLED(CONFIG_ARC_STAR_9000923308)) 343 !IS_ENABLED(CONFIG_ARC_STAR_9000923308))
338 panic("llock/scond livelock workaround missing\n"); 344 panic("llock/scond livelock workaround missing\n");
339} 345}
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index dfad287f1db1..156d9833ff84 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -62,7 +62,7 @@
62 62
63/********** Clock Source Device *********/ 63/********** Clock Source Device *********/
64 64
65#ifdef CONFIG_ARC_HAS_GRTC 65#ifdef CONFIG_ARC_HAS_GFRC
66 66
67static int arc_counter_setup(void) 67static int arc_counter_setup(void)
68{ 68{
@@ -83,10 +83,10 @@ static cycle_t arc_counter_read(struct clocksource *cs)
83 83
84 local_irq_save(flags); 84 local_irq_save(flags);
85 85
86 __mcip_cmd(CMD_GRTC_READ_LO, 0); 86 __mcip_cmd(CMD_GFRC_READ_LO, 0);
87 stamp.l = read_aux_reg(ARC_REG_MCIP_READBACK); 87 stamp.l = read_aux_reg(ARC_REG_MCIP_READBACK);
88 88
89 __mcip_cmd(CMD_GRTC_READ_HI, 0); 89 __mcip_cmd(CMD_GFRC_READ_HI, 0);
90 stamp.h = read_aux_reg(ARC_REG_MCIP_READBACK); 90 stamp.h = read_aux_reg(ARC_REG_MCIP_READBACK);
91 91
92 local_irq_restore(flags); 92 local_irq_restore(flags);
@@ -95,7 +95,7 @@ static cycle_t arc_counter_read(struct clocksource *cs)
95} 95}
96 96
97static struct clocksource arc_counter = { 97static struct clocksource arc_counter = {
98 .name = "ARConnect GRTC", 98 .name = "ARConnect GFRC",
99 .rating = 400, 99 .rating = 400,
100 .read = arc_counter_read, 100 .read = arc_counter_read,
101 .mask = CLOCKSOURCE_MASK(64), 101 .mask = CLOCKSOURCE_MASK(64),
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 04885f9f959e..1fafaad516ba 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -439,6 +439,7 @@
439 ti,mbox-num-users = <4>; 439 ti,mbox-num-users = <4>;
440 ti,mbox-num-fifos = <8>; 440 ti,mbox-num-fifos = <8>;
441 mbox_wkupm3: wkup_m3 { 441 mbox_wkupm3: wkup_m3 {
442 ti,mbox-send-noirq;
442 ti,mbox-tx = <0 0 0>; 443 ti,mbox-tx = <0 0 0>;
443 ti,mbox-rx = <0 0 3>; 444 ti,mbox-rx = <0 0 3>;
444 }; 445 };
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index df955ba4dc62..92068fbf8b57 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -73,7 +73,7 @@
73 global_timer: timer@48240200 { 73 global_timer: timer@48240200 {
74 compatible = "arm,cortex-a9-global-timer"; 74 compatible = "arm,cortex-a9-global-timer";
75 reg = <0x48240200 0x100>; 75 reg = <0x48240200 0x100>;
76 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; 76 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
77 interrupt-parent = <&gic>; 77 interrupt-parent = <&gic>;
78 clocks = <&mpu_periphclk>; 78 clocks = <&mpu_periphclk>;
79 }; 79 };
@@ -81,7 +81,7 @@
81 local_timer: timer@48240600 { 81 local_timer: timer@48240600 {
82 compatible = "arm,cortex-a9-twd-timer"; 82 compatible = "arm,cortex-a9-twd-timer";
83 reg = <0x48240600 0x100>; 83 reg = <0x48240600 0x100>;
84 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; 84 interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
85 interrupt-parent = <&gic>; 85 interrupt-parent = <&gic>;
86 clocks = <&mpu_periphclk>; 86 clocks = <&mpu_periphclk>;
87 }; 87 };
@@ -290,6 +290,7 @@
290 ti,mbox-num-users = <4>; 290 ti,mbox-num-users = <4>;
291 ti,mbox-num-fifos = <8>; 291 ti,mbox-num-fifos = <8>;
292 mbox_wkupm3: wkup_m3 { 292 mbox_wkupm3: wkup_m3 {
293 ti,mbox-send-noirq;
293 ti,mbox-tx = <0 0 0>; 294 ti,mbox-tx = <0 0 0>;
294 ti,mbox-rx = <0 0 3>; 295 ti,mbox-rx = <0 0 3>;
295 }; 296 };
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 64d43325bcbc..ecd09ab6d581 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -590,8 +590,6 @@
590 pinctrl-names = "default"; 590 pinctrl-names = "default";
591 pinctrl-0 = <&pixcir_ts_pins>; 591 pinctrl-0 = <&pixcir_ts_pins>;
592 reg = <0x5c>; 592 reg = <0x5c>;
593 interrupt-parent = <&gpio3>;
594 interrupts = <22 0>;
595 593
596 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 594 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
597 595
@@ -599,7 +597,7 @@
599 * 0x264 represents the offset of padconf register of 597 * 0x264 represents the offset of padconf register of
600 * gpio3_22 from am43xx_pinmux base. 598 * gpio3_22 from am43xx_pinmux base.
601 */ 599 */
602 interrupts-extended = <&gpio3 22 IRQ_TYPE_NONE>, 600 interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
603 <&am43xx_pinmux 0x264>; 601 <&am43xx_pinmux 0x264>;
604 interrupt-names = "tsc", "wakeup"; 602 interrupt-names = "tsc", "wakeup";
605 603
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 746fd2b17958..d580e2b70f9a 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -491,7 +491,7 @@
491 pinctrl-0 = <&pixcir_ts_pins>; 491 pinctrl-0 = <&pixcir_ts_pins>;
492 reg = <0x5c>; 492 reg = <0x5c>;
493 interrupt-parent = <&gpio1>; 493 interrupt-parent = <&gpio1>;
494 interrupts = <17 0>; 494 interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
495 495
496 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>; 496 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
497 497
diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
index c53882643ae9..8d93882dc8d5 100644
--- a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
+++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts
@@ -167,7 +167,7 @@
167 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ 167 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
168 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ 168 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
169 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ 169 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
170 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ 170 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
171 >; 171 >;
172 }; 172 };
173 173
@@ -492,14 +492,14 @@
492 pinctrl-names = "default"; 492 pinctrl-names = "default";
493 pinctrl-0 = <&qspi1_pins>; 493 pinctrl-0 = <&qspi1_pins>;
494 494
495 spi-max-frequency = <20000000>; 495 spi-max-frequency = <48000000>;
496 496
497 spi_flash: spi_flash@0 { 497 spi_flash: spi_flash@0 {
498 #address-cells = <1>; 498 #address-cells = <1>;
499 #size-cells = <1>; 499 #size-cells = <1>;
500 compatible = "spansion,m25p80", "jedec,spi-nor"; 500 compatible = "spansion,m25p80", "jedec,spi-nor";
501 reg = <0>; /* CS0 */ 501 reg = <0>; /* CS0 */
502 spi-max-frequency = <20000000>; 502 spi-max-frequency = <48000000>;
503 503
504 partition@0 { 504 partition@0 {
505 label = "uboot"; 505 label = "uboot";
@@ -559,13 +559,13 @@
559 559
560&cpsw_emac0 { 560&cpsw_emac0 {
561 phy_id = <&davinci_mdio>, <0>; 561 phy_id = <&davinci_mdio>, <0>;
562 phy-mode = "rgmii"; 562 phy-mode = "rgmii-txid";
563 dual_emac_res_vlan = <0>; 563 dual_emac_res_vlan = <0>;
564}; 564};
565 565
566&cpsw_emac1 { 566&cpsw_emac1 {
567 phy_id = <&davinci_mdio>, <1>; 567 phy_id = <&davinci_mdio>, <1>;
568 phy-mode = "rgmii"; 568 phy-mode = "rgmii-txid";
569 dual_emac_res_vlan = <1>; 569 dual_emac_res_vlan = <1>;
570}; 570};
571 571
@@ -588,7 +588,7 @@
588}; 588};
589 589
590&usb2 { 590&usb2 {
591 dr_mode = "peripheral"; 591 dr_mode = "host";
592}; 592};
593 593
594&mcasp3 { 594&mcasp3 {
diff --git a/arch/arm/boot/dts/am57xx-sbc-am57x.dts b/arch/arm/boot/dts/am57xx-sbc-am57x.dts
index 77bb8e17401a..988e99632d49 100644
--- a/arch/arm/boot/dts/am57xx-sbc-am57x.dts
+++ b/arch/arm/boot/dts/am57xx-sbc-am57x.dts
@@ -25,8 +25,8 @@
25&dra7_pmx_core { 25&dra7_pmx_core {
26 uart3_pins_default: uart3_pins_default { 26 uart3_pins_default: uart3_pins_default {
27 pinctrl-single,pins = < 27 pinctrl-single,pins = <
28 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */ 28 DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
29 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */ 29 DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
30 >; 30 >;
31 }; 31 };
32 32
@@ -108,9 +108,9 @@
108 pinctrl-0 = <&i2c5_pins_default>; 108 pinctrl-0 = <&i2c5_pins_default>;
109 clock-frequency = <400000>; 109 clock-frequency = <400000>;
110 110
111 eeprom_base: atmel@50 { 111 eeprom_base: atmel@54 {
112 compatible = "atmel,24c08"; 112 compatible = "atmel,24c08";
113 reg = <0x50>; 113 reg = <0x54>;
114 pagesize = <16>; 114 pagesize = <16>;
115 }; 115 };
116 116
diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
index 13cf69a8d0fb..fb9e1bbf2338 100644
--- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
@@ -152,6 +152,7 @@
152 nand-on-flash-bbt; 152 nand-on-flash-bbt;
153 153
154 partitions { 154 partitions {
155 compatible = "fixed-partitions";
155 #address-cells = <1>; 156 #address-cells = <1>;
156 #size-cells = <1>; 157 #size-cells = <1>;
157 158
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
index 77ddff036409..e683856c507c 100644
--- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts
@@ -114,9 +114,15 @@
114 114
115 macb0: ethernet@f8008000 { 115 macb0: ethernet@f8008000 {
116 pinctrl-names = "default"; 116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_macb0_default>; 117 pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>;
118 phy-mode = "rmii"; 118 phy-mode = "rmii";
119 status = "okay"; 119 status = "okay";
120
121 ethernet-phy@1 {
122 reg = <0x1>;
123 interrupt-parent = <&pioA>;
124 interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
125 };
120 }; 126 };
121 127
122 pdmic@f8018000 { 128 pdmic@f8018000 {
@@ -300,6 +306,10 @@
300 bias-disable; 306 bias-disable;
301 }; 307 };
302 308
309 pinctrl_macb0_phy_irq: macb0_phy_irq {
310 pinmux = <PIN_PC9__GPIO>;
311 };
312
303 pinctrl_pdmic_default: pdmic_default { 313 pinctrl_pdmic_default: pdmic_default {
304 pinmux = <PIN_PB26__PDMIC_DAT>, 314 pinmux = <PIN_PB26__PDMIC_DAT>,
305 <PIN_PB27__PDMIC_CLK>; 315 <PIN_PB27__PDMIC_CLK>;
diff --git a/arch/arm/boot/dts/at91-sama5d4_xplained.dts b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
index 131614f28e75..569026e8f96c 100644
--- a/arch/arm/boot/dts/at91-sama5d4_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
@@ -86,10 +86,12 @@
86 macb0: ethernet@f8020000 { 86 macb0: ethernet@f8020000 {
87 phy-mode = "rmii"; 87 phy-mode = "rmii";
88 status = "okay"; 88 status = "okay";
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
89 91
90 phy0: ethernet-phy@1 { 92 phy0: ethernet-phy@1 {
91 interrupt-parent = <&pioE>; 93 interrupt-parent = <&pioE>;
92 interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 94 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
93 reg = <1>; 95 reg = <1>;
94 }; 96 };
95 }; 97 };
@@ -152,6 +154,10 @@
152 atmel,pins = 154 atmel,pins =
153 <AT91_PIOE 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 155 <AT91_PIOE 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
154 }; 156 };
157 pinctrl_macb0_phy_irq: macb0_phy_irq_0 {
158 atmel,pins =
159 <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
160 };
155 }; 161 };
156 }; 162 };
157 }; 163 };
diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts b/arch/arm/boot/dts/at91-sama5d4ek.dts
index 2d4a33100af6..4e98cda97403 100644
--- a/arch/arm/boot/dts/at91-sama5d4ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d4ek.dts
@@ -160,8 +160,15 @@
160 }; 160 };
161 161
162 macb0: ethernet@f8020000 { 162 macb0: ethernet@f8020000 {
163 pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
163 phy-mode = "rmii"; 164 phy-mode = "rmii";
164 status = "okay"; 165 status = "okay";
166
167 ethernet-phy@1 {
168 reg = <0x1>;
169 interrupt-parent = <&pioE>;
170 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
171 };
165 }; 172 };
166 173
167 mmc1: mmc@fc000000 { 174 mmc1: mmc@fc000000 {
@@ -193,6 +200,10 @@
193 200
194 pinctrl@fc06a000 { 201 pinctrl@fc06a000 {
195 board { 202 board {
203 pinctrl_macb0_phy_irq: macb0_phy_irq {
204 atmel,pins =
205 <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
206 };
196 pinctrl_mmc0_cd: mmc0_cd { 207 pinctrl_mmc0_cd: mmc0_cd {
197 atmel,pins = 208 atmel,pins =
198 <AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 209 <AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index ca4ddf86817a..626c67d66626 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -215,7 +215,7 @@
215 }; 215 };
216 216
217 panel: panel { 217 panel: panel {
218 compatible = "qd,qd43003c0-40", "simple-panel"; 218 compatible = "qiaodian,qd43003c0-40", "simple-panel";
219 backlight = <&backlight>; 219 backlight = <&backlight>;
220 power-supply = <&panel_reg>; 220 power-supply = <&panel_reg>;
221 #address-cells = <1>; 221 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/kirkwood-lswvl.dts b/arch/arm/boot/dts/kirkwood-lswvl.dts
index 09eed3cea0af..36eec7392ab4 100644
--- a/arch/arm/boot/dts/kirkwood-lswvl.dts
+++ b/arch/arm/boot/dts/kirkwood-lswvl.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree file for Buffalo Linkstation LS-WVL/VL 2 * Device Tree file for Buffalo Linkstation LS-WVL/VL
3 * 3 *
4 * Copyright (C) 2015, rogershimizu@gmail.com 4 * Copyright (C) 2015, 2016
5 * Roger Shimizu <rogershimizu@gmail.com>
5 * 6 *
6 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License 8 * modify it under the terms of the GNU General Public License
@@ -156,21 +157,21 @@
156 button@1 { 157 button@1 {
157 label = "Function Button"; 158 label = "Function Button";
158 linux,code = <KEY_OPTION>; 159 linux,code = <KEY_OPTION>;
159 gpios = <&gpio0 45 GPIO_ACTIVE_LOW>; 160 gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
160 }; 161 };
161 162
162 button@2 { 163 button@2 {
163 label = "Power-on Switch"; 164 label = "Power-on Switch";
164 linux,code = <KEY_RESERVED>; 165 linux,code = <KEY_RESERVED>;
165 linux,input-type = <5>; 166 linux,input-type = <5>;
166 gpios = <&gpio0 46 GPIO_ACTIVE_LOW>; 167 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
167 }; 168 };
168 169
169 button@3 { 170 button@3 {
170 label = "Power-auto Switch"; 171 label = "Power-auto Switch";
171 linux,code = <KEY_ESC>; 172 linux,code = <KEY_ESC>;
172 linux,input-type = <5>; 173 linux,input-type = <5>;
173 gpios = <&gpio0 47 GPIO_ACTIVE_LOW>; 174 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
174 }; 175 };
175 }; 176 };
176 177
@@ -185,38 +186,38 @@
185 186
186 led@1 { 187 led@1 {
187 label = "lswvl:red:alarm"; 188 label = "lswvl:red:alarm";
188 gpios = <&gpio0 36 GPIO_ACTIVE_LOW>; 189 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
189 }; 190 };
190 191
191 led@2 { 192 led@2 {
192 label = "lswvl:red:func"; 193 label = "lswvl:red:func";
193 gpios = <&gpio0 37 GPIO_ACTIVE_LOW>; 194 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
194 }; 195 };
195 196
196 led@3 { 197 led@3 {
197 label = "lswvl:amber:info"; 198 label = "lswvl:amber:info";
198 gpios = <&gpio0 38 GPIO_ACTIVE_LOW>; 199 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
199 }; 200 };
200 201
201 led@4 { 202 led@4 {
202 label = "lswvl:blue:func"; 203 label = "lswvl:blue:func";
203 gpios = <&gpio0 39 GPIO_ACTIVE_LOW>; 204 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
204 }; 205 };
205 206
206 led@5 { 207 led@5 {
207 label = "lswvl:blue:power"; 208 label = "lswvl:blue:power";
208 gpios = <&gpio0 40 GPIO_ACTIVE_LOW>; 209 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
209 default-state = "keep"; 210 default-state = "keep";
210 }; 211 };
211 212
212 led@6 { 213 led@6 {
213 label = "lswvl:red:hdderr0"; 214 label = "lswvl:red:hdderr0";
214 gpios = <&gpio0 34 GPIO_ACTIVE_LOW>; 215 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
215 }; 216 };
216 217
217 led@7 { 218 led@7 {
218 label = "lswvl:red:hdderr1"; 219 label = "lswvl:red:hdderr1";
219 gpios = <&gpio0 35 GPIO_ACTIVE_LOW>; 220 gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
220 }; 221 };
221 }; 222 };
222 223
@@ -233,7 +234,7 @@
233 3250 1 234 3250 1
234 5000 0>; 235 5000 0>;
235 236
236 alarm-gpios = <&gpio0 43 GPIO_ACTIVE_HIGH>; 237 alarm-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
237 }; 238 };
238 239
239 restart_poweroff { 240 restart_poweroff {
diff --git a/arch/arm/boot/dts/kirkwood-lswxl.dts b/arch/arm/boot/dts/kirkwood-lswxl.dts
index f5db16a08597..b13ec20a7088 100644
--- a/arch/arm/boot/dts/kirkwood-lswxl.dts
+++ b/arch/arm/boot/dts/kirkwood-lswxl.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree file for Buffalo Linkstation LS-WXL/WSXL 2 * Device Tree file for Buffalo Linkstation LS-WXL/WSXL
3 * 3 *
4 * Copyright (C) 2015, rogershimizu@gmail.com 4 * Copyright (C) 2015, 2016
5 * Roger Shimizu <rogershimizu@gmail.com>
5 * 6 *
6 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License 8 * modify it under the terms of the GNU General Public License
@@ -156,21 +157,21 @@
156 button@1 { 157 button@1 {
157 label = "Function Button"; 158 label = "Function Button";
158 linux,code = <KEY_OPTION>; 159 linux,code = <KEY_OPTION>;
159 gpios = <&gpio1 41 GPIO_ACTIVE_LOW>; 160 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
160 }; 161 };
161 162
162 button@2 { 163 button@2 {
163 label = "Power-on Switch"; 164 label = "Power-on Switch";
164 linux,code = <KEY_RESERVED>; 165 linux,code = <KEY_RESERVED>;
165 linux,input-type = <5>; 166 linux,input-type = <5>;
166 gpios = <&gpio1 42 GPIO_ACTIVE_LOW>; 167 gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
167 }; 168 };
168 169
169 button@3 { 170 button@3 {
170 label = "Power-auto Switch"; 171 label = "Power-auto Switch";
171 linux,code = <KEY_ESC>; 172 linux,code = <KEY_ESC>;
172 linux,input-type = <5>; 173 linux,input-type = <5>;
173 gpios = <&gpio1 43 GPIO_ACTIVE_LOW>; 174 gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
174 }; 175 };
175 }; 176 };
176 177
@@ -185,12 +186,12 @@
185 186
186 led@1 { 187 led@1 {
187 label = "lswxl:blue:func"; 188 label = "lswxl:blue:func";
188 gpios = <&gpio1 36 GPIO_ACTIVE_LOW>; 189 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
189 }; 190 };
190 191
191 led@2 { 192 led@2 {
192 label = "lswxl:red:alarm"; 193 label = "lswxl:red:alarm";
193 gpios = <&gpio1 49 GPIO_ACTIVE_LOW>; 194 gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
194 }; 195 };
195 196
196 led@3 { 197 led@3 {
@@ -200,23 +201,23 @@
200 201
201 led@4 { 202 led@4 {
202 label = "lswxl:blue:power"; 203 label = "lswxl:blue:power";
203 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; 204 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
205 default-state = "keep";
204 }; 206 };
205 207
206 led@5 { 208 led@5 {
207 label = "lswxl:red:func"; 209 label = "lswxl:red:func";
208 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; 210 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
209 default-state = "keep";
210 }; 211 };
211 212
212 led@6 { 213 led@6 {
213 label = "lswxl:red:hdderr0"; 214 label = "lswxl:red:hdderr0";
214 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 215 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
215 }; 216 };
216 217
217 led@7 { 218 led@7 {
218 label = "lswxl:red:hdderr1"; 219 label = "lswxl:red:hdderr1";
219 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; 220 gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
220 }; 221 };
221 }; 222 };
222 223
@@ -225,15 +226,15 @@
225 pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>; 226 pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
226 pinctrl-names = "default"; 227 pinctrl-names = "default";
227 228
228 gpios = <&gpio0 47 GPIO_ACTIVE_LOW 229 gpios = <&gpio1 16 GPIO_ACTIVE_LOW
229 &gpio0 48 GPIO_ACTIVE_LOW>; 230 &gpio1 15 GPIO_ACTIVE_LOW>;
230 231
231 gpio-fan,speed-map = <0 3 232 gpio-fan,speed-map = <0 3
232 1500 2 233 1500 2
233 3250 1 234 3250 1
234 5000 0>; 235 5000 0>;
235 236
236 alarm-gpios = <&gpio1 49 GPIO_ACTIVE_HIGH>; 237 alarm-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
237 }; 238 };
238 239
239 restart_poweroff { 240 restart_poweroff {
@@ -256,7 +257,7 @@
256 enable-active-high; 257 enable-active-high;
257 regulator-always-on; 258 regulator-always-on;
258 regulator-boot-on; 259 regulator-boot-on;
259 gpio = <&gpio0 37 GPIO_ACTIVE_HIGH>; 260 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
260 }; 261 };
261 hdd_power0: regulator@2 { 262 hdd_power0: regulator@2 {
262 compatible = "regulator-fixed"; 263 compatible = "regulator-fixed";
diff --git a/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts b/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
index 1db6f2c506cc..8082d64266a3 100644
--- a/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
+++ b/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
@@ -131,6 +131,7 @@
131 chip-delay = <40>; 131 chip-delay = <40>;
132 status = "okay"; 132 status = "okay";
133 partitions { 133 partitions {
134 compatible = "fixed-partitions";
134 #address-cells = <1>; 135 #address-cells = <1>;
135 #size-cells = <1>; 136 #size-cells = <1>;
136 137
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 7fed0bd4f3de..00805322367e 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -112,14 +112,6 @@
112 clock-frequency = <400000>; 112 clock-frequency = <400000>;
113}; 113};
114 114
115&i2c2 {
116 clock-frequency = <400000>;
117};
118
119&i2c3 {
120 clock-frequency = <400000>;
121};
122
123/* 115/*
124 * Only found on the wireless SOM. For the SOM without wireless, the pins for 116 * Only found on the wireless SOM. For the SOM without wireless, the pins for
125 * MMC3 can be routed with jumpers to the second MMC slot on the devkit and 117 * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
@@ -143,6 +135,7 @@
143 interrupt-parent = <&gpio5>; 135 interrupt-parent = <&gpio5>;
144 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */ 136 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
145 ref-clock-frequency = <26000000>; 137 ref-clock-frequency = <26000000>;
138 tcxo-clock-frequency = <26000000>;
146 }; 139 };
147}; 140};
148 141
diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi
index 888412c63f97..902657d6713b 100644
--- a/arch/arm/boot/dts/omap5-board-common.dtsi
+++ b/arch/arm/boot/dts/omap5-board-common.dtsi
@@ -130,6 +130,16 @@
130 }; 130 };
131}; 131};
132 132
133&gpio8 {
134 /* TI trees use GPIO instead of msecure, see also muxing */
135 p234 {
136 gpio-hog;
137 gpios = <10 GPIO_ACTIVE_HIGH>;
138 output-high;
139 line-name = "gpio8_234/msecure";
140 };
141};
142
133&omap5_pmx_core { 143&omap5_pmx_core {
134 pinctrl-names = "default"; 144 pinctrl-names = "default";
135 pinctrl-0 = < 145 pinctrl-0 = <
@@ -213,6 +223,13 @@
213 >; 223 >;
214 }; 224 };
215 225
226 /* TI trees use GPIO mode; msecure mode does not work reliably? */
227 palmas_msecure_pins: palmas_msecure_pins {
228 pinctrl-single,pins = <
229 OMAP5_IOPAD(0x180, PIN_OUTPUT | MUX_MODE6) /* gpio8_234 */
230 >;
231 };
232
216 usbhost_pins: pinmux_usbhost_pins { 233 usbhost_pins: pinmux_usbhost_pins {
217 pinctrl-single,pins = < 234 pinctrl-single,pins = <
218 OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */ 235 OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
@@ -278,6 +295,12 @@
278 &usbhost_wkup_pins 295 &usbhost_wkup_pins
279 >; 296 >;
280 297
298 palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
299 pinctrl-single,pins = <
300 OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */
301 >;
302 };
303
281 usbhost_wkup_pins: pinmux_usbhost_wkup_pins { 304 usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
282 pinctrl-single,pins = < 305 pinctrl-single,pins = <
283 OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */ 306 OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
@@ -345,6 +368,8 @@
345 interrupt-controller; 368 interrupt-controller;
346 #interrupt-cells = <2>; 369 #interrupt-cells = <2>;
347 ti,system-power-controller; 370 ti,system-power-controller;
371 pinctrl-names = "default";
372 pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;
348 373
349 extcon_usb3: palmas_usb { 374 extcon_usb3: palmas_usb {
350 compatible = "ti,palmas-usb-vid"; 375 compatible = "ti,palmas-usb-vid";
@@ -358,6 +383,14 @@
358 #clock-cells = <0>; 383 #clock-cells = <0>;
359 }; 384 };
360 385
386 rtc {
387 compatible = "ti,palmas-rtc";
388 interrupt-parent = <&palmas>;
389 interrupts = <8 IRQ_TYPE_NONE>;
390 ti,backup-battery-chargeable;
391 ti,backup-battery-charge-high-current;
392 };
393
361 palmas_pmic { 394 palmas_pmic {
362 compatible = "ti,palmas-pmic"; 395 compatible = "ti,palmas-pmic";
363 interrupt-parent = <&palmas>; 396 interrupt-parent = <&palmas>;
diff --git a/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts b/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts
index 3daec912b4bf..420788229e6f 100644
--- a/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts
+++ b/arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts
@@ -1,7 +1,8 @@
1/* 1/*
2 * Device Tree file for Buffalo Linkstation LS-WTGL 2 * Device Tree file for Buffalo Linkstation LS-WTGL
3 * 3 *
4 * Copyright (C) 2015, Roger Shimizu <rogershimizu@gmail.com> 4 * Copyright (C) 2015, 2016
5 * Roger Shimizu <rogershimizu@gmail.com>
5 * 6 *
6 * This file is dual-licensed: you can use it either under the terms 7 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual 8 * of the GPL or the X11 license, at your option. Note that this dual
@@ -69,8 +70,6 @@
69 70
70 internal-regs { 71 internal-regs {
71 pinctrl: pinctrl@10000 { 72 pinctrl: pinctrl@10000 {
72 pinctrl-0 = <&pmx_usb_power &pmx_power_hdd
73 &pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
74 pinctrl-names = "default"; 73 pinctrl-names = "default";
75 74
76 pmx_led_power: pmx-leds { 75 pmx_led_power: pmx-leds {
@@ -162,6 +161,7 @@
162 led@1 { 161 led@1 {
163 label = "lswtgl:blue:power"; 162 label = "lswtgl:blue:power";
164 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; 163 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
164 default-state = "keep";
165 }; 165 };
166 166
167 led@2 { 167 led@2 {
@@ -188,7 +188,7 @@
188 3250 1 188 3250 1
189 5000 0>; 189 5000 0>;
190 190
191 alarm-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; 191 alarm-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
192 }; 192 };
193 193
194 restart_poweroff { 194 restart_poweroff {
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index b8032bca4621..db1151c18466 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -1342,7 +1342,7 @@
1342 dbgu: serial@fc069000 { 1342 dbgu: serial@fc069000 {
1343 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 1343 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
1344 reg = <0xfc069000 0x200>; 1344 reg = <0xfc069000 0x200>;
1345 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; 1345 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
1346 pinctrl-names = "default"; 1346 pinctrl-names = "default";
1347 pinctrl-0 = <&pinctrl_dbgu>; 1347 pinctrl-0 = <&pinctrl_dbgu>;
1348 clocks = <&dbgu_clk>; 1348 clocks = <&dbgu_clk>;
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
index d0c743853318..27a333eb8987 100644
--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -127,22 +127,14 @@
127 }; 127 };
128 mmcsd_default_mode: mmcsd_default { 128 mmcsd_default_mode: mmcsd_default {
129 mmcsd_default_cfg1 { 129 mmcsd_default_cfg1 {
130 /* MCCLK */ 130 /*
131 pins = "GPIO8_B10"; 131 * MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2
132 ste,output = <0>; 132 * MCCMD, MCDAT3-0, MCMSFBCLK
133 }; 133 */
134 mmcsd_default_cfg2 { 134 pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11",
135 /* MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 */ 135 "GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12",
136 pins = "GPIO10_C11", "GPIO15_A12", 136 "GPIO16_C13", "GPIO23_D15", "GPIO24_C15";
137 "GPIO16_C13", "GPIO23_D15"; 137 ste,output = <2>;
138 ste,output = <1>;
139 };
140 mmcsd_default_cfg3 {
141 /* MCCMD, MCDAT3-0, MCMSFBCLK */
142 pins = "GPIO9_A10", "GPIO11_B11",
143 "GPIO12_A11", "GPIO13_C12",
144 "GPIO14_B12", "GPIO24_C15";
145 ste,input = <1>;
146 }; 138 };
147 }; 139 };
148 }; 140 };
@@ -802,10 +794,21 @@
802 clock-names = "mclk", "apb_pclk"; 794 clock-names = "mclk", "apb_pclk";
803 interrupt-parent = <&vica>; 795 interrupt-parent = <&vica>;
804 interrupts = <22>; 796 interrupts = <22>;
805 max-frequency = <48000000>; 797 max-frequency = <400000>;
806 bus-width = <4>; 798 bus-width = <4>;
807 cap-mmc-highspeed; 799 cap-mmc-highspeed;
808 cap-sd-highspeed; 800 cap-sd-highspeed;
801 full-pwr-cycle;
802 /*
803 * The STw4811 circuit used with the Nomadik strictly
804 * requires that all of these signal direction pins be
805 * routed and used for its 4-bit levelshifter.
806 */
807 st,sig-dir-dat0;
808 st,sig-dir-dat2;
809 st,sig-dir-dat31;
810 st,sig-dir-cmd;
811 st,sig-pin-fbclk;
809 pinctrl-names = "default"; 812 pinctrl-names = "default";
810 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>; 813 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
811 vmmc-supply = <&vmmc_regulator>; 814 vmmc-supply = <&vmmc_regulator>;
diff --git a/arch/arm/common/icst.c b/arch/arm/common/icst.c
index 2dc6da70ae59..d7ed252708c5 100644
--- a/arch/arm/common/icst.c
+++ b/arch/arm/common/icst.c
@@ -16,7 +16,7 @@
16 */ 16 */
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19 19#include <asm/div64.h>
20#include <asm/hardware/icst.h> 20#include <asm/hardware/icst.h>
21 21
22/* 22/*
@@ -29,7 +29,11 @@ EXPORT_SYMBOL(icst525_s2div);
29 29
30unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco) 30unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco)
31{ 31{
32 return p->ref * 2 * (vco.v + 8) / ((vco.r + 2) * p->s2div[vco.s]); 32 u64 dividend = p->ref * 2 * (u64)(vco.v + 8);
33 u32 divisor = (vco.r + 2) * p->s2div[vco.s];
34
35 do_div(dividend, divisor);
36 return (unsigned long)dividend;
33} 37}
34 38
35EXPORT_SYMBOL(icst_hz); 39EXPORT_SYMBOL(icst_hz);
@@ -58,6 +62,7 @@ icst_hz_to_vco(const struct icst_params *p, unsigned long freq)
58 62
59 if (f > p->vco_min && f <= p->vco_max) 63 if (f > p->vco_min && f <= p->vco_max)
60 break; 64 break;
65 i++;
61 } while (i < 8); 66 } while (i < 8);
62 67
63 if (i >= 8) 68 if (i >= 8)
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 314f6be2dca2..8e8b2ace9b7c 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -426,6 +426,7 @@ CONFIG_SUNXI_WATCHDOG=y
426CONFIG_IMX2_WDT=y 426CONFIG_IMX2_WDT=y
427CONFIG_TEGRA_WATCHDOG=m 427CONFIG_TEGRA_WATCHDOG=m
428CONFIG_MESON_WATCHDOG=y 428CONFIG_MESON_WATCHDOG=y
429CONFIG_DW_WATCHDOG=y
429CONFIG_DIGICOLOR_WATCHDOG=y 430CONFIG_DIGICOLOR_WATCHDOG=y
430CONFIG_MFD_AS3711=y 431CONFIG_MFD_AS3711=y
431CONFIG_MFD_AS3722=y 432CONFIG_MFD_AS3722=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index c5e1943e5427..d18d6b42fcf5 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -50,6 +50,7 @@ CONFIG_SOC_AM33XX=y
50CONFIG_SOC_AM43XX=y 50CONFIG_SOC_AM43XX=y
51CONFIG_SOC_DRA7XX=y 51CONFIG_SOC_DRA7XX=y
52CONFIG_ARM_THUMBEE=y 52CONFIG_ARM_THUMBEE=y
53CONFIG_ARM_KERNMEM_PERMS=y
53CONFIG_ARM_ERRATA_411920=y 54CONFIG_ARM_ERRATA_411920=y
54CONFIG_ARM_ERRATA_430973=y 55CONFIG_ARM_ERRATA_430973=y
55CONFIG_SMP=y 56CONFIG_SMP=y
@@ -177,6 +178,7 @@ CONFIG_TI_CPTS=y
177CONFIG_AT803X_PHY=y 178CONFIG_AT803X_PHY=y
178CONFIG_SMSC_PHY=y 179CONFIG_SMSC_PHY=y
179CONFIG_USB_USBNET=m 180CONFIG_USB_USBNET=m
181CONFIG_USB_NET_SMSC75XX=m
180CONFIG_USB_NET_SMSC95XX=m 182CONFIG_USB_NET_SMSC95XX=m
181CONFIG_USB_ALI_M5632=y 183CONFIG_USB_ALI_M5632=y
182CONFIG_USB_AN2720=y 184CONFIG_USB_AN2720=y
@@ -290,24 +292,23 @@ CONFIG_FB=y
290CONFIG_FIRMWARE_EDID=y 292CONFIG_FIRMWARE_EDID=y
291CONFIG_FB_MODE_HELPERS=y 293CONFIG_FB_MODE_HELPERS=y
292CONFIG_FB_TILEBLITTING=y 294CONFIG_FB_TILEBLITTING=y
293CONFIG_OMAP2_DSS=m 295CONFIG_FB_OMAP5_DSS_HDMI=y
294CONFIG_OMAP5_DSS_HDMI=y 296CONFIG_FB_OMAP2_DSS_SDI=y
295CONFIG_OMAP2_DSS_SDI=y 297CONFIG_FB_OMAP2_DSS_DSI=y
296CONFIG_OMAP2_DSS_DSI=y
297CONFIG_FB_OMAP2=m 298CONFIG_FB_OMAP2=m
298CONFIG_DISPLAY_ENCODER_TFP410=m 299CONFIG_FB_OMAP2_ENCODER_TFP410=m
299CONFIG_DISPLAY_ENCODER_TPD12S015=m 300CONFIG_FB_OMAP2_ENCODER_TPD12S015=m
300CONFIG_DISPLAY_CONNECTOR_DVI=m 301CONFIG_FB_OMAP2_CONNECTOR_DVI=m
301CONFIG_DISPLAY_CONNECTOR_HDMI=m 302CONFIG_FB_OMAP2_CONNECTOR_HDMI=m
302CONFIG_DISPLAY_CONNECTOR_ANALOG_TV=m 303CONFIG_FB_OMAP2_CONNECTOR_ANALOG_TV=m
303CONFIG_DISPLAY_PANEL_DPI=m 304CONFIG_FB_OMAP2_PANEL_DPI=m
304CONFIG_DISPLAY_PANEL_DSI_CM=m 305CONFIG_FB_OMAP2_PANEL_DSI_CM=m
305CONFIG_DISPLAY_PANEL_SONY_ACX565AKM=m 306CONFIG_FB_OMAP2_PANEL_SONY_ACX565AKM=m
306CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02=m 307CONFIG_FB_OMAP2_PANEL_LGPHILIPS_LB035Q02=m
307CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01=m 308CONFIG_FB_OMAP2_PANEL_SHARP_LS037V7DW01=m
308CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1=m 309CONFIG_FB_OMAP2_PANEL_TPO_TD028TTEC1=m
309CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1=m 310CONFIG_FB_OMAP2_PANEL_TPO_TD043MTEA1=m
310CONFIG_DISPLAY_PANEL_NEC_NL8048HL11=m 311CONFIG_FB_OMAP2_PANEL_NEC_NL8048HL11=m
311CONFIG_BACKLIGHT_LCD_SUPPORT=y 312CONFIG_BACKLIGHT_LCD_SUPPORT=y
312CONFIG_LCD_CLASS_DEVICE=y 313CONFIG_LCD_CLASS_DEVICE=y
313CONFIG_LCD_PLATFORM=y 314CONFIG_LCD_PLATFORM=y
@@ -354,6 +355,11 @@ CONFIG_USB_MUSB_DSPS=m
354CONFIG_USB_INVENTRA_DMA=y 355CONFIG_USB_INVENTRA_DMA=y
355CONFIG_USB_TI_CPPI41_DMA=y 356CONFIG_USB_TI_CPPI41_DMA=y
356CONFIG_USB_DWC3=m 357CONFIG_USB_DWC3=m
358CONFIG_USB_SERIAL=m
359CONFIG_USB_SERIAL_GENERIC=y
360CONFIG_USB_SERIAL_SIMPLE=m
361CONFIG_USB_SERIAL_FTDI_SIO=m
362CONFIG_USB_SERIAL_PL2303=m
357CONFIG_USB_TEST=m 363CONFIG_USB_TEST=m
358CONFIG_AM335X_PHY_USB=y 364CONFIG_AM335X_PHY_USB=y
359CONFIG_USB_GADGET=m 365CONFIG_USB_GADGET=m
@@ -387,6 +393,7 @@ CONFIG_NEW_LEDS=y
387CONFIG_LEDS_CLASS=m 393CONFIG_LEDS_CLASS=m
388CONFIG_LEDS_GPIO=m 394CONFIG_LEDS_GPIO=m
389CONFIG_LEDS_PWM=m 395CONFIG_LEDS_PWM=m
396CONFIG_LEDS_PCA963X=m
390CONFIG_LEDS_TRIGGERS=y 397CONFIG_LEDS_TRIGGERS=y
391CONFIG_LEDS_TRIGGER_TIMER=m 398CONFIG_LEDS_TRIGGER_TIMER=m
392CONFIG_LEDS_TRIGGER_ONESHOT=m 399CONFIG_LEDS_TRIGGER_ONESHOT=m
@@ -449,6 +456,8 @@ CONFIG_NLS_CODEPAGE_437=y
449CONFIG_NLS_ISO8859_1=y 456CONFIG_NLS_ISO8859_1=y
450CONFIG_PRINTK_TIME=y 457CONFIG_PRINTK_TIME=y
451CONFIG_DEBUG_INFO=y 458CONFIG_DEBUG_INFO=y
459CONFIG_DEBUG_INFO_SPLIT=y
460CONFIG_DEBUG_INFO_DWARF4=y
452CONFIG_MAGIC_SYSRQ=y 461CONFIG_MAGIC_SYSRQ=y
453CONFIG_SCHEDSTATS=y 462CONFIG_SCHEDSTATS=y
454CONFIG_TIMER_STATS=y 463CONFIG_TIMER_STATS=y
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 9cda974a3009..d7f1d69daf6d 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -18,7 +18,6 @@
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/of.h> 19#include <linux/of.h>
20#include <linux/pinctrl/machine.h> 20#include <linux/pinctrl/machine.h>
21#include <linux/platform_data/mailbox-omap.h>
22 21
23#include <asm/mach-types.h> 22#include <asm/mach-types.h>
24#include <asm/mach/map.h> 23#include <asm/mach/map.h>
@@ -66,32 +65,6 @@ static int __init omap3_l3_init(void)
66} 65}
67omap_postcore_initcall(omap3_l3_init); 66omap_postcore_initcall(omap3_l3_init);
68 67
69#if defined(CONFIG_OMAP2PLUS_MBOX) || defined(CONFIG_OMAP2PLUS_MBOX_MODULE)
70static inline void __init omap_init_mbox(void)
71{
72 struct omap_hwmod *oh;
73 struct platform_device *pdev;
74 struct omap_mbox_pdata *pdata;
75
76 oh = omap_hwmod_lookup("mailbox");
77 if (!oh) {
78 pr_err("%s: unable to find hwmod\n", __func__);
79 return;
80 }
81 if (!oh->dev_attr) {
82 pr_err("%s: hwmod doesn't have valid attrs\n", __func__);
83 return;
84 }
85
86 pdata = (struct omap_mbox_pdata *)oh->dev_attr;
87 pdev = omap_device_build("omap-mailbox", -1, oh, pdata, sizeof(*pdata));
88 WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
89 __func__, PTR_ERR(pdev));
90}
91#else
92static inline void omap_init_mbox(void) { }
93#endif /* CONFIG_OMAP2PLUS_MBOX */
94
95static inline void omap_init_sti(void) {} 68static inline void omap_init_sti(void) {}
96 69
97#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) 70#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
@@ -229,7 +202,6 @@ static int __init omap2_init_devices(void)
229 * please keep these calls, and their implementations above, 202 * please keep these calls, and their implementations above,
230 * in alphabetical order so they're easier to sort through. 203 * in alphabetical order so they're easier to sort through.
231 */ 204 */
232 omap_init_mbox();
233 omap_init_mcspi(); 205 omap_init_mcspi();
234 omap_init_sham(); 206 omap_init_sham();
235 omap_init_aes(); 207 omap_init_aes();
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index e781e4fae13a..a935d28443da 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -23,6 +23,8 @@
23#include <linux/platform_data/pinctrl-single.h> 23#include <linux/platform_data/pinctrl-single.h>
24#include <linux/platform_data/iommu-omap.h> 24#include <linux/platform_data/iommu-omap.h>
25#include <linux/platform_data/wkup_m3.h> 25#include <linux/platform_data/wkup_m3.h>
26#include <linux/platform_data/pwm_omap_dmtimer.h>
27#include <plat/dmtimer.h>
26 28
27#include "common.h" 29#include "common.h"
28#include "common-board-devices.h" 30#include "common-board-devices.h"
@@ -449,6 +451,24 @@ void omap_auxdata_legacy_init(struct device *dev)
449 dev->platform_data = &twl_gpio_auxdata; 451 dev->platform_data = &twl_gpio_auxdata;
450} 452}
451 453
454/* Dual mode timer PWM callbacks platdata */
455#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
456struct pwm_omap_dmtimer_pdata pwm_dmtimer_pdata = {
457 .request_by_node = omap_dm_timer_request_by_node,
458 .free = omap_dm_timer_free,
459 .enable = omap_dm_timer_enable,
460 .disable = omap_dm_timer_disable,
461 .get_fclk = omap_dm_timer_get_fclk,
462 .start = omap_dm_timer_start,
463 .stop = omap_dm_timer_stop,
464 .set_load = omap_dm_timer_set_load,
465 .set_match = omap_dm_timer_set_match,
466 .set_pwm = omap_dm_timer_set_pwm,
467 .set_prescaler = omap_dm_timer_set_prescaler,
468 .write_counter = omap_dm_timer_write_counter,
469};
470#endif
471
452/* 472/*
453 * Few boards still need auxdata populated before we populate 473 * Few boards still need auxdata populated before we populate
454 * the dev entries in of_platform_populate(). 474 * the dev entries in of_platform_populate().
@@ -502,6 +522,9 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
502 OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3", 522 OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
503 &wkup_m3_data), 523 &wkup_m3_data),
504#endif 524#endif
525#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
526 OF_DEV_AUXDATA("ti,omap-dmtimer-pwm", 0, NULL, &pwm_dmtimer_pdata),
527#endif
505#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 528#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
506 OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu", 529 OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
507 &omap4_iommu_pdata), 530 &omap4_iommu_pdata),
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index eafd120b53f1..1b9f0520dea9 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -86,13 +86,18 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
86 stmfd sp!, {lr} @ save registers on stack 86 stmfd sp!, {lr} @ save registers on stack
87 /* Setup so that we will disable and enable l2 */ 87 /* Setup so that we will disable and enable l2 */
88 mov r1, #0x1 88 mov r1, #0x1
89 adrl r2, l2dis_3630 @ may be too distant for plain adr 89 adrl r3, l2dis_3630_offset @ may be too distant for plain adr
90 str r1, [r2] 90 ldr r2, [r3] @ value for offset
91 str r1, [r2, r3] @ write to l2dis_3630
91 ldmfd sp!, {pc} @ restore regs and return 92 ldmfd sp!, {pc} @ restore regs and return
92ENDPROC(enable_omap3630_toggle_l2_on_restore) 93ENDPROC(enable_omap3630_toggle_l2_on_restore)
93 94
94 .text 95/*
95/* Function to call rom code to save secure ram context */ 96 * Function to call rom code to save secure ram context. This gets
97 * relocated to SRAM, so it can be all in .data section. Otherwise
98 * we need to initialize api_params separately.
99 */
100 .data
96 .align 3 101 .align 3
97ENTRY(save_secure_ram_context) 102ENTRY(save_secure_ram_context)
98 stmfd sp!, {r4 - r11, lr} @ save registers on stack 103 stmfd sp!, {r4 - r11, lr} @ save registers on stack
@@ -126,6 +131,8 @@ ENDPROC(save_secure_ram_context)
126ENTRY(save_secure_ram_context_sz) 131ENTRY(save_secure_ram_context_sz)
127 .word . - save_secure_ram_context 132 .word . - save_secure_ram_context
128 133
134 .text
135
129/* 136/*
130 * ====================== 137 * ======================
131 * == Idle entry point == 138 * == Idle entry point ==
@@ -289,12 +296,6 @@ wait_sdrc_ready:
289 bic r5, r5, #0x40 296 bic r5, r5, #0x40
290 str r5, [r4] 297 str r5, [r4]
291 298
292/*
293 * PC-relative stores lead to undefined behaviour in Thumb-2: use a r7 as a
294 * base instead.
295 * Be careful not to clobber r7 when maintaing this code.
296 */
297
298is_dll_in_lock_mode: 299is_dll_in_lock_mode:
299 /* Is dll in lock mode? */ 300 /* Is dll in lock mode? */
300 ldr r4, sdrc_dlla_ctrl 301 ldr r4, sdrc_dlla_ctrl
@@ -302,11 +303,7 @@ is_dll_in_lock_mode:
302 tst r5, #0x4 303 tst r5, #0x4
303 bne exit_nonoff_modes @ Return if locked 304 bne exit_nonoff_modes @ Return if locked
304 /* wait till dll locks */ 305 /* wait till dll locks */
305 adr r7, kick_counter
306wait_dll_lock_timed: 306wait_dll_lock_timed:
307 ldr r4, wait_dll_lock_counter
308 add r4, r4, #1
309 str r4, [r7, #wait_dll_lock_counter - kick_counter]
310 ldr r4, sdrc_dlla_status 307 ldr r4, sdrc_dlla_status
311 /* Wait 20uS for lock */ 308 /* Wait 20uS for lock */
312 mov r6, #8 309 mov r6, #8
@@ -330,9 +327,6 @@ kick_dll:
330 orr r6, r6, #(1<<3) @ enable dll 327 orr r6, r6, #(1<<3) @ enable dll
331 str r6, [r4] 328 str r6, [r4]
332 dsb 329 dsb
333 ldr r4, kick_counter
334 add r4, r4, #1
335 str r4, [r7] @ kick_counter
336 b wait_dll_lock_timed 330 b wait_dll_lock_timed
337 331
338exit_nonoff_modes: 332exit_nonoff_modes:
@@ -360,15 +354,6 @@ sdrc_dlla_status:
360 .word SDRC_DLLA_STATUS_V 354 .word SDRC_DLLA_STATUS_V
361sdrc_dlla_ctrl: 355sdrc_dlla_ctrl:
362 .word SDRC_DLLA_CTRL_V 356 .word SDRC_DLLA_CTRL_V
363 /*
364 * When exporting to userspace while the counters are in SRAM,
365 * these 2 words need to be at the end to facilitate retrival!
366 */
367kick_counter:
368 .word 0
369wait_dll_lock_counter:
370 .word 0
371
372ENTRY(omap3_do_wfi_sz) 357ENTRY(omap3_do_wfi_sz)
373 .word . - omap3_do_wfi 358 .word . - omap3_do_wfi
374 359
@@ -437,7 +422,9 @@ ENTRY(omap3_restore)
437 cmp r2, #0x0 @ Check if target power state was OFF or RET 422 cmp r2, #0x0 @ Check if target power state was OFF or RET
438 bne logic_l1_restore 423 bne logic_l1_restore
439 424
440 ldr r0, l2dis_3630 425 adr r1, l2dis_3630_offset @ address for offset
426 ldr r0, [r1] @ value for offset
427 ldr r0, [r1, r0] @ value at l2dis_3630
441 cmp r0, #0x1 @ should we disable L2 on 3630? 428 cmp r0, #0x1 @ should we disable L2 on 3630?
442 bne skipl2dis 429 bne skipl2dis
443 mrc p15, 0, r0, c1, c0, 1 430 mrc p15, 0, r0, c1, c0, 1
@@ -449,12 +436,14 @@ skipl2dis:
449 and r1, #0x700 436 and r1, #0x700
450 cmp r1, #0x300 437 cmp r1, #0x300
451 beq l2_inv_gp 438 beq l2_inv_gp
439 adr r0, l2_inv_api_params_offset
440 ldr r3, [r0]
441 add r3, r3, r0 @ r3 points to dummy parameters
452 mov r0, #40 @ set service ID for PPA 442 mov r0, #40 @ set service ID for PPA
453 mov r12, r0 @ copy secure Service ID in r12 443 mov r12, r0 @ copy secure Service ID in r12
454 mov r1, #0 @ set task id for ROM code in r1 444 mov r1, #0 @ set task id for ROM code in r1
455 mov r2, #4 @ set some flags in r2, r6 445 mov r2, #4 @ set some flags in r2, r6
456 mov r6, #0xff 446 mov r6, #0xff
457 adr r3, l2_inv_api_params @ r3 points to dummy parameters
458 dsb @ data write barrier 447 dsb @ data write barrier
459 dmb @ data memory barrier 448 dmb @ data memory barrier
460 smc #1 @ call SMI monitor (smi #1) 449 smc #1 @ call SMI monitor (smi #1)
@@ -488,8 +477,8 @@ skipl2dis:
488 b logic_l1_restore 477 b logic_l1_restore
489 478
490 .align 479 .align
491l2_inv_api_params: 480l2_inv_api_params_offset:
492 .word 0x1, 0x00 481 .long l2_inv_api_params - .
493l2_inv_gp: 482l2_inv_gp:
494 /* Execute smi to invalidate L2 cache */ 483 /* Execute smi to invalidate L2 cache */
495 mov r12, #0x1 @ set up to invalidate L2 484 mov r12, #0x1 @ set up to invalidate L2
@@ -506,7 +495,9 @@ l2_inv_gp:
506 mov r12, #0x2 495 mov r12, #0x2
507 smc #0 @ Call SMI monitor (smieq) 496 smc #0 @ Call SMI monitor (smieq)
508logic_l1_restore: 497logic_l1_restore:
509 ldr r1, l2dis_3630 498 adr r0, l2dis_3630_offset @ adress for offset
499 ldr r1, [r0] @ value for offset
500 ldr r1, [r0, r1] @ value at l2dis_3630
510 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630 501 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630
511 bne skipl2reen 502 bne skipl2reen
512 mrc p15, 0, r1, c1, c0, 1 503 mrc p15, 0, r1, c1, c0, 1
@@ -535,9 +526,17 @@ control_stat:
535 .word CONTROL_STAT 526 .word CONTROL_STAT
536control_mem_rta: 527control_mem_rta:
537 .word CONTROL_MEM_RTA_CTRL 528 .word CONTROL_MEM_RTA_CTRL
529l2dis_3630_offset:
530 .long l2dis_3630 - .
531
532 .data
538l2dis_3630: 533l2dis_3630:
539 .word 0 534 .word 0
540 535
536 .data
537l2_inv_api_params:
538 .word 0x1, 0x00
539
541/* 540/*
542 * Internal functions 541 * Internal functions
543 */ 542 */
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index 9b09d85d811a..c7a3b4aab4b5 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -29,12 +29,6 @@
29 dsb 29 dsb
30.endm 30.endm
31 31
32ppa_zero_params:
33 .word 0x0
34
35ppa_por_params:
36 .word 1, 0
37
38#ifdef CONFIG_ARCH_OMAP4 32#ifdef CONFIG_ARCH_OMAP4
39 33
40/* 34/*
@@ -266,7 +260,9 @@ ENTRY(omap4_cpu_resume)
266 beq skip_ns_smp_enable 260 beq skip_ns_smp_enable
267ppa_actrl_retry: 261ppa_actrl_retry:
268 mov r0, #OMAP4_PPA_CPU_ACTRL_SMP_INDEX 262 mov r0, #OMAP4_PPA_CPU_ACTRL_SMP_INDEX
269 adr r3, ppa_zero_params @ Pointer to parameters 263 adr r1, ppa_zero_params_offset
264 ldr r3, [r1]
265 add r3, r3, r1 @ Pointer to ppa_zero_params
270 mov r1, #0x0 @ Process ID 266 mov r1, #0x0 @ Process ID
271 mov r2, #0x4 @ Flag 267 mov r2, #0x4 @ Flag
272 mov r6, #0xff 268 mov r6, #0xff
@@ -303,7 +299,9 @@ skip_ns_smp_enable:
303 ldr r0, =OMAP4_PPA_L2_POR_INDEX 299 ldr r0, =OMAP4_PPA_L2_POR_INDEX
304 ldr r1, =OMAP44XX_SAR_RAM_BASE 300 ldr r1, =OMAP44XX_SAR_RAM_BASE
305 ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET] 301 ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET]
306 adr r3, ppa_por_params 302 adr r1, ppa_por_params_offset
303 ldr r3, [r1]
304 add r3, r3, r1 @ Pointer to ppa_por_params
307 str r4, [r3, #0x04] 305 str r4, [r3, #0x04]
308 mov r1, #0x0 @ Process ID 306 mov r1, #0x0 @ Process ID
309 mov r2, #0x4 @ Flag 307 mov r2, #0x4 @ Flag
@@ -328,6 +326,8 @@ skip_l2en:
328#endif 326#endif
329 327
330 b cpu_resume @ Jump to generic resume 328 b cpu_resume @ Jump to generic resume
329ppa_por_params_offset:
330 .long ppa_por_params - .
331ENDPROC(omap4_cpu_resume) 331ENDPROC(omap4_cpu_resume)
332#endif /* CONFIG_ARCH_OMAP4 */ 332#endif /* CONFIG_ARCH_OMAP4 */
333 333
@@ -380,4 +380,13 @@ ENTRY(omap_do_wfi)
380 nop 380 nop
381 381
382 ldmfd sp!, {pc} 382 ldmfd sp!, {pc}
383ppa_zero_params_offset:
384 .long ppa_zero_params - .
383ENDPROC(omap_do_wfi) 385ENDPROC(omap_do_wfi)
386
387 .data
388ppa_zero_params:
389 .word 0
390
391ppa_por_params:
392 .word 1, 0
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index def40a0dd60c..70ab4a25a5f8 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -1,5 +1,6 @@
1menuconfig ARCH_REALVIEW 1menuconfig ARCH_REALVIEW
2 bool "ARM Ltd. RealView family" if ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7 2 bool "ARM Ltd. RealView family"
3 depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7
3 select ARM_AMBA 4 select ARM_AMBA
4 select ARM_TIMER_SP804 5 select ARM_TIMER_SP804
5 select COMMON_CLK_VERSATILE 6 select COMMON_CLK_VERSATILE
diff --git a/arch/arm/mach-realview/platsmp-dt.c b/arch/arm/mach-realview/platsmp-dt.c
index 65585392655b..6964e8876061 100644
--- a/arch/arm/mach-realview/platsmp-dt.c
+++ b/arch/arm/mach-realview/platsmp-dt.c
@@ -80,7 +80,7 @@ static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
80 virt_to_phys(versatile_secondary_startup)); 80 virt_to_phys(versatile_secondary_startup));
81} 81}
82 82
83struct smp_operations realview_dt_smp_ops __initdata = { 83static const struct smp_operations realview_dt_smp_ops __initconst = {
84 .smp_prepare_cpus = realview_smp_prepare_cpus, 84 .smp_prepare_cpus = realview_smp_prepare_cpus,
85 .smp_secondary_init = versatile_secondary_init, 85 .smp_secondary_init = versatile_secondary_init,
86 .smp_boot_secondary = versatile_boot_secondary, 86 .smp_boot_secondary = versatile_boot_secondary,
diff --git a/arch/arm/mach-tango/Kconfig b/arch/arm/mach-tango/Kconfig
index d6a3714b096e..ebe15b93bbe8 100644
--- a/arch/arm/mach-tango/Kconfig
+++ b/arch/arm/mach-tango/Kconfig
@@ -1,5 +1,6 @@
1config ARCH_TANGO 1config ARCH_TANGO
2 bool "Sigma Designs Tango4 (SMP87xx)" if ARCH_MULTI_V7 2 bool "Sigma Designs Tango4 (SMP87xx)"
3 depends on ARCH_MULTI_V7
3 # Cortex-A9 MPCore r3p0, PL310 r3p2 4 # Cortex-A9 MPCore r3p0, PL310 r3p2
4 select ARCH_HAS_HOLES_MEMORYMODEL 5 select ARCH_HAS_HOLES_MEMORYMODEL
5 select ARM_ERRATA_754322 6 select ARM_ERRATA_754322
diff --git a/arch/arm/mach-tango/platsmp.c b/arch/arm/mach-tango/platsmp.c
index a18d5a34e2f5..a21f55e000d2 100644
--- a/arch/arm/mach-tango/platsmp.c
+++ b/arch/arm/mach-tango/platsmp.c
@@ -9,7 +9,7 @@ static int tango_boot_secondary(unsigned int cpu, struct task_struct *idle)
9 return 0; 9 return 0;
10} 10}
11 11
12static struct smp_operations tango_smp_ops __initdata = { 12static const struct smp_operations tango_smp_ops __initconst = {
13 .smp_boot_secondary = tango_boot_secondary, 13 .smp_boot_secondary = tango_boot_secondary,
14}; 14};
15 15
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index dd5158eb5872..e5b59ca9debb 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -115,6 +115,7 @@
115 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 115 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
116 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 116 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
117 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 117 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
118 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
118 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 119 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
119 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 120 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
120 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 121 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
index da7b6e613257..933cba359918 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
@@ -23,9 +23,8 @@ soc0: soc@000000000 {
23 }; 23 };
24 }; 24 };
25 25
26 dsa: dsa@c7000000 { 26 dsaf0: dsa@c7000000 {
27 compatible = "hisilicon,hns-dsaf-v1"; 27 compatible = "hisilicon,hns-dsaf-v1";
28 dsa_name = "dsaf0";
29 mode = "6port-16rss"; 28 mode = "6port-16rss";
30 interrupt-parent = <&mbigen_dsa>; 29 interrupt-parent = <&mbigen_dsa>;
31 30
@@ -127,7 +126,7 @@ soc0: soc@000000000 {
127 126
128 eth0: ethernet@0{ 127 eth0: ethernet@0{
129 compatible = "hisilicon,hns-nic-v1"; 128 compatible = "hisilicon,hns-nic-v1";
130 ae-name = "dsaf0"; 129 ae-handle = <&dsaf0>;
131 port-id = <0>; 130 port-id = <0>;
132 local-mac-address = [00 00 00 01 00 58]; 131 local-mac-address = [00 00 00 01 00 58];
133 status = "disabled"; 132 status = "disabled";
@@ -135,14 +134,14 @@ soc0: soc@000000000 {
135 }; 134 };
136 eth1: ethernet@1{ 135 eth1: ethernet@1{
137 compatible = "hisilicon,hns-nic-v1"; 136 compatible = "hisilicon,hns-nic-v1";
138 ae-name = "dsaf0"; 137 ae-handle = <&dsaf0>;
139 port-id = <1>; 138 port-id = <1>;
140 status = "disabled"; 139 status = "disabled";
141 dma-coherent; 140 dma-coherent;
142 }; 141 };
143 eth2: ethernet@2{ 142 eth2: ethernet@2{
144 compatible = "hisilicon,hns-nic-v1"; 143 compatible = "hisilicon,hns-nic-v1";
145 ae-name = "dsaf0"; 144 ae-handle = <&dsaf0>;
146 port-id = <2>; 145 port-id = <2>;
147 local-mac-address = [00 00 00 01 00 5a]; 146 local-mac-address = [00 00 00 01 00 5a];
148 status = "disabled"; 147 status = "disabled";
@@ -150,7 +149,7 @@ soc0: soc@000000000 {
150 }; 149 };
151 eth3: ethernet@3{ 150 eth3: ethernet@3{
152 compatible = "hisilicon,hns-nic-v1"; 151 compatible = "hisilicon,hns-nic-v1";
153 ae-name = "dsaf0"; 152 ae-handle = <&dsaf0>;
154 port-id = <3>; 153 port-id = <3>;
155 local-mac-address = [00 00 00 01 00 5b]; 154 local-mac-address = [00 00 00 01 00 5b];
156 status = "disabled"; 155 status = "disabled";
@@ -158,7 +157,7 @@ soc0: soc@000000000 {
158 }; 157 };
159 eth4: ethernet@4{ 158 eth4: ethernet@4{
160 compatible = "hisilicon,hns-nic-v1"; 159 compatible = "hisilicon,hns-nic-v1";
161 ae-name = "dsaf0"; 160 ae-handle = <&dsaf0>;
162 port-id = <4>; 161 port-id = <4>;
163 local-mac-address = [00 00 00 01 00 5c]; 162 local-mac-address = [00 00 00 01 00 5c];
164 status = "disabled"; 163 status = "disabled";
@@ -166,7 +165,7 @@ soc0: soc@000000000 {
166 }; 165 };
167 eth5: ethernet@5{ 166 eth5: ethernet@5{
168 compatible = "hisilicon,hns-nic-v1"; 167 compatible = "hisilicon,hns-nic-v1";
169 ae-name = "dsaf0"; 168 ae-handle = <&dsaf0>;
170 port-id = <5>; 169 port-id = <5>;
171 local-mac-address = [00 00 00 01 00 5d]; 170 local-mac-address = [00 00 00 01 00 5d];
172 status = "disabled"; 171 status = "disabled";
@@ -174,7 +173,7 @@ soc0: soc@000000000 {
174 }; 173 };
175 eth6: ethernet@6{ 174 eth6: ethernet@6{
176 compatible = "hisilicon,hns-nic-v1"; 175 compatible = "hisilicon,hns-nic-v1";
177 ae-name = "dsaf0"; 176 ae-handle = <&dsaf0>;
178 port-id = <6>; 177 port-id = <6>;
179 local-mac-address = [00 00 00 01 00 5e]; 178 local-mac-address = [00 00 00 01 00 5e];
180 status = "disabled"; 179 status = "disabled";
@@ -182,7 +181,7 @@ soc0: soc@000000000 {
182 }; 181 };
183 eth7: ethernet@7{ 182 eth7: ethernet@7{
184 compatible = "hisilicon,hns-nic-v1"; 183 compatible = "hisilicon,hns-nic-v1";
185 ae-name = "dsaf0"; 184 ae-handle = <&dsaf0>;
186 port-id = <7>; 185 port-id = <7>;
187 local-mac-address = [00 00 00 01 00 5f]; 186 local-mac-address = [00 00 00 01 00 5f];
188 status = "disabled"; 187 status = "disabled";
diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
index 7dfe1c085966..62f33fc84e3e 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
@@ -12,6 +12,8 @@
12 rtc1 = "/rtc@0,7000e000"; 12 rtc1 = "/rtc@0,7000e000";
13 }; 13 };
14 14
15 chosen { };
16
15 memory { 17 memory {
16 device_type = "memory"; 18 device_type = "memory";
17 reg = <0x0 0x80000000 0x0 0x80000000>; 19 reg = <0x0 0x80000000 0x0 0x80000000>;
diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h
index 2731d3b25ed2..8ec88e5b290f 100644
--- a/arch/arm64/include/asm/arch_gicv3.h
+++ b/arch/arm64/include/asm/arch_gicv3.h
@@ -103,6 +103,7 @@ static inline u64 gic_read_iar_common(void)
103 u64 irqstat; 103 u64 irqstat;
104 104
105 asm volatile("mrs_s %0, " __stringify(ICC_IAR1_EL1) : "=r" (irqstat)); 105 asm volatile("mrs_s %0, " __stringify(ICC_IAR1_EL1) : "=r" (irqstat));
106 dsb(sy);
106 return irqstat; 107 return irqstat;
107} 108}
108 109
diff --git a/arch/arm64/include/asm/futex.h b/arch/arm64/include/asm/futex.h
index 007a69fc4f40..5f3ab8c1db55 100644
--- a/arch/arm64/include/asm/futex.h
+++ b/arch/arm64/include/asm/futex.h
@@ -121,6 +121,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
121 return -EFAULT; 121 return -EFAULT;
122 122
123 asm volatile("// futex_atomic_cmpxchg_inatomic\n" 123 asm volatile("// futex_atomic_cmpxchg_inatomic\n"
124ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
124" prfm pstl1strm, %2\n" 125" prfm pstl1strm, %2\n"
125"1: ldxr %w1, %2\n" 126"1: ldxr %w1, %2\n"
126" sub %w3, %w1, %w4\n" 127" sub %w3, %w1, %w4\n"
@@ -137,6 +138,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
137" .align 3\n" 138" .align 3\n"
138" .quad 1b, 4b, 2b, 4b\n" 139" .quad 1b, 4b, 2b, 4b\n"
139" .popsection\n" 140" .popsection\n"
141ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
140 : "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp) 142 : "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
141 : "r" (oldval), "r" (newval), "Ir" (-EFAULT) 143 : "r" (oldval), "r" (newval), "Ir" (-EFAULT)
142 : "memory"); 144 : "memory");
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 738a95f93e49..bef6e9243c63 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -182,6 +182,7 @@
182#define CPTR_EL2_TCPAC (1 << 31) 182#define CPTR_EL2_TCPAC (1 << 31)
183#define CPTR_EL2_TTA (1 << 20) 183#define CPTR_EL2_TTA (1 << 20)
184#define CPTR_EL2_TFP (1 << CPTR_EL2_TFP_SHIFT) 184#define CPTR_EL2_TFP (1 << CPTR_EL2_TFP_SHIFT)
185#define CPTR_EL2_DEFAULT 0x000033ff
185 186
186/* Hyp Debug Configuration Register bits */ 187/* Hyp Debug Configuration Register bits */
187#define MDCR_EL2_TDRA (1 << 11) 188#define MDCR_EL2_TDRA (1 << 11)
diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index 3066328cd86b..779a5872a2c5 100644
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -127,10 +127,14 @@ static inline unsigned long *vcpu_spsr(const struct kvm_vcpu *vcpu)
127 127
128static inline bool vcpu_mode_priv(const struct kvm_vcpu *vcpu) 128static inline bool vcpu_mode_priv(const struct kvm_vcpu *vcpu)
129{ 129{
130 u32 mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK; 130 u32 mode;
131 131
132 if (vcpu_mode_is_32bit(vcpu)) 132 if (vcpu_mode_is_32bit(vcpu)) {
133 mode = *vcpu_cpsr(vcpu) & COMPAT_PSR_MODE_MASK;
133 return mode > COMPAT_PSR_MODE_USR; 134 return mode > COMPAT_PSR_MODE_USR;
135 }
136
137 mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK;
134 138
135 return mode != PSR_MODE_EL0t; 139 return mode != PSR_MODE_EL0t;
136} 140}
diff --git a/arch/arm64/include/asm/page.h b/arch/arm64/include/asm/page.h
index 9b2f5a9d019d..ae615b9d9a55 100644
--- a/arch/arm64/include/asm/page.h
+++ b/arch/arm64/include/asm/page.h
@@ -39,6 +39,7 @@
39 39
40#ifndef __ASSEMBLY__ 40#ifndef __ASSEMBLY__
41 41
42#include <linux/personality.h> /* for READ_IMPLIES_EXEC */
42#include <asm/pgtable-types.h> 43#include <asm/pgtable-types.h>
43 44
44extern void __cpu_clear_user_page(void *p, unsigned long user); 45extern void __cpu_clear_user_page(void *p, unsigned long user);
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index ca8f5a5e2f96..f0e7bdfae134 100644
--- a/arch/arm64/kvm/hyp/switch.c
+++ b/arch/arm64/kvm/hyp/switch.c
@@ -36,7 +36,11 @@ static void __hyp_text __activate_traps(struct kvm_vcpu *vcpu)
36 write_sysreg(val, hcr_el2); 36 write_sysreg(val, hcr_el2);
37 /* Trap on AArch32 cp15 c15 accesses (EL1 or EL0) */ 37 /* Trap on AArch32 cp15 c15 accesses (EL1 or EL0) */
38 write_sysreg(1 << 15, hstr_el2); 38 write_sysreg(1 << 15, hstr_el2);
39 write_sysreg(CPTR_EL2_TTA | CPTR_EL2_TFP, cptr_el2); 39
40 val = CPTR_EL2_DEFAULT;
41 val |= CPTR_EL2_TTA | CPTR_EL2_TFP;
42 write_sysreg(val, cptr_el2);
43
40 write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2); 44 write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2);
41} 45}
42 46
@@ -45,7 +49,7 @@ static void __hyp_text __deactivate_traps(struct kvm_vcpu *vcpu)
45 write_sysreg(HCR_RW, hcr_el2); 49 write_sysreg(HCR_RW, hcr_el2);
46 write_sysreg(0, hstr_el2); 50 write_sysreg(0, hstr_el2);
47 write_sysreg(read_sysreg(mdcr_el2) & MDCR_EL2_HPMN_MASK, mdcr_el2); 51 write_sysreg(read_sysreg(mdcr_el2) & MDCR_EL2_HPMN_MASK, mdcr_el2);
48 write_sysreg(0, cptr_el2); 52 write_sysreg(CPTR_EL2_DEFAULT, cptr_el2);
49} 53}
50 54
51static void __hyp_text __activate_vm(struct kvm_vcpu *vcpu) 55static void __hyp_text __activate_vm(struct kvm_vcpu *vcpu)
diff --git a/arch/arm64/kvm/inject_fault.c b/arch/arm64/kvm/inject_fault.c
index 648112e90ed5..4d1ac81870d2 100644
--- a/arch/arm64/kvm/inject_fault.c
+++ b/arch/arm64/kvm/inject_fault.c
@@ -27,7 +27,11 @@
27 27
28#define PSTATE_FAULT_BITS_64 (PSR_MODE_EL1h | PSR_A_BIT | PSR_F_BIT | \ 28#define PSTATE_FAULT_BITS_64 (PSR_MODE_EL1h | PSR_A_BIT | PSR_F_BIT | \
29 PSR_I_BIT | PSR_D_BIT) 29 PSR_I_BIT | PSR_D_BIT)
30#define EL1_EXCEPT_SYNC_OFFSET 0x200 30
31#define CURRENT_EL_SP_EL0_VECTOR 0x0
32#define CURRENT_EL_SP_ELx_VECTOR 0x200
33#define LOWER_EL_AArch64_VECTOR 0x400
34#define LOWER_EL_AArch32_VECTOR 0x600
31 35
32static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset) 36static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
33{ 37{
@@ -97,6 +101,34 @@ static void inject_abt32(struct kvm_vcpu *vcpu, bool is_pabt,
97 *fsr = 0x14; 101 *fsr = 0x14;
98} 102}
99 103
104enum exception_type {
105 except_type_sync = 0,
106 except_type_irq = 0x80,
107 except_type_fiq = 0x100,
108 except_type_serror = 0x180,
109};
110
111static u64 get_except_vector(struct kvm_vcpu *vcpu, enum exception_type type)
112{
113 u64 exc_offset;
114
115 switch (*vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT)) {
116 case PSR_MODE_EL1t:
117 exc_offset = CURRENT_EL_SP_EL0_VECTOR;
118 break;
119 case PSR_MODE_EL1h:
120 exc_offset = CURRENT_EL_SP_ELx_VECTOR;
121 break;
122 case PSR_MODE_EL0t:
123 exc_offset = LOWER_EL_AArch64_VECTOR;
124 break;
125 default:
126 exc_offset = LOWER_EL_AArch32_VECTOR;
127 }
128
129 return vcpu_sys_reg(vcpu, VBAR_EL1) + exc_offset + type;
130}
131
100static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr) 132static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr)
101{ 133{
102 unsigned long cpsr = *vcpu_cpsr(vcpu); 134 unsigned long cpsr = *vcpu_cpsr(vcpu);
@@ -108,8 +140,8 @@ static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr
108 *vcpu_spsr(vcpu) = cpsr; 140 *vcpu_spsr(vcpu) = cpsr;
109 *vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu); 141 *vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
110 142
143 *vcpu_pc(vcpu) = get_except_vector(vcpu, except_type_sync);
111 *vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64; 144 *vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
112 *vcpu_pc(vcpu) = vcpu_sys_reg(vcpu, VBAR_EL1) + EL1_EXCEPT_SYNC_OFFSET;
113 145
114 vcpu_sys_reg(vcpu, FAR_EL1) = addr; 146 vcpu_sys_reg(vcpu, FAR_EL1) = addr;
115 147
@@ -143,8 +175,8 @@ static void inject_undef64(struct kvm_vcpu *vcpu)
143 *vcpu_spsr(vcpu) = cpsr; 175 *vcpu_spsr(vcpu) = cpsr;
144 *vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu); 176 *vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
145 177
178 *vcpu_pc(vcpu) = get_except_vector(vcpu, except_type_sync);
146 *vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64; 179 *vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
147 *vcpu_pc(vcpu) = vcpu_sys_reg(vcpu, VBAR_EL1) + EL1_EXCEPT_SYNC_OFFSET;
148 180
149 /* 181 /*
150 * Build an unknown exception, depending on the instruction 182 * Build an unknown exception, depending on the instruction
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index eec3598b4184..2e90371cfb37 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -1007,10 +1007,9 @@ static int emulate_cp(struct kvm_vcpu *vcpu,
1007 if (likely(r->access(vcpu, params, r))) { 1007 if (likely(r->access(vcpu, params, r))) {
1008 /* Skip instruction, since it was emulated */ 1008 /* Skip instruction, since it was emulated */
1009 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); 1009 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
1010 /* Handled */
1011 return 0;
1010 } 1012 }
1011
1012 /* Handled */
1013 return 0;
1014 } 1013 }
1015 1014
1016 /* Not handled */ 1015 /* Not handled */
@@ -1043,7 +1042,7 @@ static void unhandled_cp_access(struct kvm_vcpu *vcpu,
1043} 1042}
1044 1043
1045/** 1044/**
1046 * kvm_handle_cp_64 -- handles a mrrc/mcrr trap on a guest CP15 access 1045 * kvm_handle_cp_64 -- handles a mrrc/mcrr trap on a guest CP14/CP15 access
1047 * @vcpu: The VCPU pointer 1046 * @vcpu: The VCPU pointer
1048 * @run: The kvm_run struct 1047 * @run: The kvm_run struct
1049 */ 1048 */
@@ -1095,7 +1094,7 @@ out:
1095} 1094}
1096 1095
1097/** 1096/**
1098 * kvm_handle_cp15_32 -- handles a mrc/mcr trap on a guest CP15 access 1097 * kvm_handle_cp_32 -- handles a mrc/mcr trap on a guest CP14/CP15 access
1099 * @vcpu: The VCPU pointer 1098 * @vcpu: The VCPU pointer
1100 * @run: The kvm_run struct 1099 * @run: The kvm_run struct
1101 */ 1100 */
diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c
index cf6240741134..0795c3a36d8f 100644
--- a/arch/arm64/mm/pageattr.c
+++ b/arch/arm64/mm/pageattr.c
@@ -14,6 +14,7 @@
14#include <linux/mm.h> 14#include <linux/mm.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/sched.h> 16#include <linux/sched.h>
17#include <linux/vmalloc.h>
17 18
18#include <asm/pgtable.h> 19#include <asm/pgtable.h>
19#include <asm/tlbflush.h> 20#include <asm/tlbflush.h>
@@ -44,6 +45,7 @@ static int change_memory_common(unsigned long addr, int numpages,
44 unsigned long end = start + size; 45 unsigned long end = start + size;
45 int ret; 46 int ret;
46 struct page_change_data data; 47 struct page_change_data data;
48 struct vm_struct *area;
47 49
48 if (!PAGE_ALIGNED(addr)) { 50 if (!PAGE_ALIGNED(addr)) {
49 start &= PAGE_MASK; 51 start &= PAGE_MASK;
@@ -51,10 +53,23 @@ static int change_memory_common(unsigned long addr, int numpages,
51 WARN_ON_ONCE(1); 53 WARN_ON_ONCE(1);
52 } 54 }
53 55
54 if (start < MODULES_VADDR || start >= MODULES_END) 56 /*
55 return -EINVAL; 57 * Kernel VA mappings are always live, and splitting live section
56 58 * mappings into page mappings may cause TLB conflicts. This means
57 if (end < MODULES_VADDR || end >= MODULES_END) 59 * we have to ensure that changing the permission bits of the range
60 * we are operating on does not result in such splitting.
61 *
62 * Let's restrict ourselves to mappings created by vmalloc (or vmap).
63 * Those are guaranteed to consist entirely of page mappings, and
64 * splitting is never needed.
65 *
66 * So check whether the [addr, addr + size) interval is entirely
67 * covered by precisely one VM area that has the VM_ALLOC flag set.
68 */
69 area = find_vm_area((void *)addr);
70 if (!area ||
71 end > (unsigned long)area->addr + area->size ||
72 !(area->flags & VM_ALLOC))
58 return -EINVAL; 73 return -EINVAL;
59 74
60 if (!numpages) 75 if (!numpages)
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index 836ac5a963c8..2841c0a3fd3b 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -276,6 +276,7 @@ source "kernel/Kconfig.preempt"
276 276
277config SMP 277config SMP
278 bool "Symmetric multi-processing support" 278 bool "Symmetric multi-processing support"
279 depends on MMU
279 ---help--- 280 ---help---
280 This enables support for systems with more than one CPU. If you have 281 This enables support for systems with more than one CPU. If you have
281 a system with only one CPU, say N. If you have a system with more 282 a system with only one CPU, say N. If you have a system with more
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 57a945e832f4..74a3db92da1b 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2085,7 +2085,7 @@ config PAGE_SIZE_32KB
2085 2085
2086config PAGE_SIZE_64KB 2086config PAGE_SIZE_64KB
2087 bool "64kB" 2087 bool "64kB"
2088 depends on !CPU_R3000 && !CPU_TX39XX 2088 depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
2089 help 2089 help
2090 Using 64kB page size will result in higher performance kernel at 2090 Using 64kB page size will result in higher performance kernel at
2091 the price of higher memory consumption. This option is available on 2091 the price of higher memory consumption. This option is available on
diff --git a/arch/mips/boot/dts/brcm/bcm6328.dtsi b/arch/mips/boot/dts/brcm/bcm6328.dtsi
index 459b9b252c3b..d61b1616b604 100644
--- a/arch/mips/boot/dts/brcm/bcm6328.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm6328.dtsi
@@ -74,6 +74,7 @@
74 timer: timer@10000040 { 74 timer: timer@10000040 {
75 compatible = "syscon"; 75 compatible = "syscon";
76 reg = <0x10000040 0x2c>; 76 reg = <0x10000040 0x2c>;
77 little-endian;
77 }; 78 };
78 79
79 reboot { 80 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index 4fc7ecee273c..1a7efa883c5e 100644
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -98,6 +98,7 @@
98 sun_top_ctrl: syscon@404000 { 98 sun_top_ctrl: syscon@404000 {
99 compatible = "brcm,bcm7125-sun-top-ctrl", "syscon"; 99 compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
100 reg = <0x404000 0x60c>; 100 reg = <0x404000 0x60c>;
101 little-endian;
101 }; 102 };
102 103
103 reboot { 104 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index a3039bb53477..d4bf52cfcf17 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -118,6 +118,7 @@
118 sun_top_ctrl: syscon@404000 { 118 sun_top_ctrl: syscon@404000 {
119 compatible = "brcm,bcm7346-sun-top-ctrl", "syscon"; 119 compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
120 reg = <0x404000 0x51c>; 120 reg = <0x404000 0x51c>;
121 little-endian;
121 }; 122 };
122 123
123 reboot { 124 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index 4274ff41ec21..8e2501694d03 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -112,6 +112,7 @@
112 sun_top_ctrl: syscon@404000 { 112 sun_top_ctrl: syscon@404000 {
113 compatible = "brcm,bcm7358-sun-top-ctrl", "syscon"; 113 compatible = "brcm,bcm7358-sun-top-ctrl", "syscon";
114 reg = <0x404000 0x51c>; 114 reg = <0x404000 0x51c>;
115 little-endian;
115 }; 116 };
116 117
117 reboot { 118 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index 0dcc9163c27b..7e5f76040fb8 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -112,6 +112,7 @@
112 sun_top_ctrl: syscon@404000 { 112 sun_top_ctrl: syscon@404000 {
113 compatible = "brcm,bcm7360-sun-top-ctrl", "syscon"; 113 compatible = "brcm,bcm7360-sun-top-ctrl", "syscon";
114 reg = <0x404000 0x51c>; 114 reg = <0x404000 0x51c>;
115 little-endian;
115 }; 116 };
116 117
117 reboot { 118 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index 2f3f9fc2c478..c739ea77acb0 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -118,6 +118,7 @@
118 sun_top_ctrl: syscon@404000 { 118 sun_top_ctrl: syscon@404000 {
119 compatible = "brcm,bcm7362-sun-top-ctrl", "syscon"; 119 compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
120 reg = <0x404000 0x51c>; 120 reg = <0x404000 0x51c>;
121 little-endian;
121 }; 122 };
122 123
123 reboot { 124 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index bee221b3b568..5f55d0a50a28 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -99,6 +99,7 @@
99 sun_top_ctrl: syscon@404000 { 99 sun_top_ctrl: syscon@404000 {
100 compatible = "brcm,bcm7420-sun-top-ctrl", "syscon"; 100 compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
101 reg = <0x404000 0x60c>; 101 reg = <0x404000 0x60c>;
102 little-endian;
102 }; 103 };
103 104
104 reboot { 105 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index 571f30f52e3f..e24d41ab4e30 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -100,6 +100,7 @@
100 sun_top_ctrl: syscon@404000 { 100 sun_top_ctrl: syscon@404000 {
101 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon"; 101 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
102 reg = <0x404000 0x51c>; 102 reg = <0x404000 0x51c>;
103 little-endian;
103 }; 104 };
104 105
105 reboot { 106 reboot {
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index 614ee211f71a..8b9432cc062b 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -114,6 +114,7 @@
114 sun_top_ctrl: syscon@404000 { 114 sun_top_ctrl: syscon@404000 {
115 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon"; 115 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
116 reg = <0x404000 0x51c>; 116 reg = <0x404000 0x51c>;
117 little-endian;
117 }; 118 };
118 119
119 reboot { 120 reboot {
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index cefb7a596878..e090fc388e02 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -227,7 +227,7 @@ struct mips_elf_abiflags_v0 {
227 int __res = 1; \ 227 int __res = 1; \
228 struct elfhdr *__h = (hdr); \ 228 struct elfhdr *__h = (hdr); \
229 \ 229 \
230 if (__h->e_machine != EM_MIPS) \ 230 if (!mips_elf_check_machine(__h)) \
231 __res = 0; \ 231 __res = 0; \
232 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \ 232 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
233 __res = 0; \ 233 __res = 0; \
@@ -258,7 +258,7 @@ struct mips_elf_abiflags_v0 {
258 int __res = 1; \ 258 int __res = 1; \
259 struct elfhdr *__h = (hdr); \ 259 struct elfhdr *__h = (hdr); \
260 \ 260 \
261 if (__h->e_machine != EM_MIPS) \ 261 if (!mips_elf_check_machine(__h)) \
262 __res = 0; \ 262 __res = 0; \
263 if (__h->e_ident[EI_CLASS] != ELFCLASS64) \ 263 if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
264 __res = 0; \ 264 __res = 0; \
@@ -285,6 +285,11 @@ struct mips_elf_abiflags_v0 {
285 285
286#endif /* !defined(ELF_ARCH) */ 286#endif /* !defined(ELF_ARCH) */
287 287
288#define mips_elf_check_machine(x) ((x)->e_machine == EM_MIPS)
289
290#define vmcore_elf32_check_arch mips_elf_check_machine
291#define vmcore_elf64_check_arch mips_elf_check_machine
292
288struct mips_abi; 293struct mips_abi;
289 294
290extern struct mips_abi mips_abi; 295extern struct mips_abi mips_abi;
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h
index 9cbf383b8834..f06f97bd62df 100644
--- a/arch/mips/include/asm/fpu.h
+++ b/arch/mips/include/asm/fpu.h
@@ -179,6 +179,10 @@ static inline void lose_fpu_inatomic(int save, struct task_struct *tsk)
179 if (save) 179 if (save)
180 _save_fp(tsk); 180 _save_fp(tsk);
181 __disable_fpu(); 181 __disable_fpu();
182 } else {
183 /* FPU should not have been left enabled with no owner */
184 WARN(read_c0_status() & ST0_CU1,
185 "Orphaned FPU left enabled");
182 } 186 }
183 KSTK_STATUS(tsk) &= ~ST0_CU1; 187 KSTK_STATUS(tsk) &= ~ST0_CU1;
184 clear_tsk_thread_flag(tsk, TIF_USEDFPU); 188 clear_tsk_thread_flag(tsk, TIF_USEDFPU);
diff --git a/arch/mips/include/asm/octeon/octeon-feature.h b/arch/mips/include/asm/octeon/octeon-feature.h
index 8ebd3f579b84..3ed10a8d7865 100644
--- a/arch/mips/include/asm/octeon/octeon-feature.h
+++ b/arch/mips/include/asm/octeon/octeon-feature.h
@@ -128,7 +128,8 @@ static inline int octeon_has_feature(enum octeon_feature feature)
128 case OCTEON_FEATURE_PCIE: 128 case OCTEON_FEATURE_PCIE:
129 return OCTEON_IS_MODEL(OCTEON_CN56XX) 129 return OCTEON_IS_MODEL(OCTEON_CN56XX)
130 || OCTEON_IS_MODEL(OCTEON_CN52XX) 130 || OCTEON_IS_MODEL(OCTEON_CN52XX)
131 || OCTEON_IS_MODEL(OCTEON_CN6XXX); 131 || OCTEON_IS_MODEL(OCTEON_CN6XXX)
132 || OCTEON_IS_MODEL(OCTEON_CN7XXX);
132 133
133 case OCTEON_FEATURE_SRIO: 134 case OCTEON_FEATURE_SRIO:
134 return OCTEON_IS_MODEL(OCTEON_CN63XX) 135 return OCTEON_IS_MODEL(OCTEON_CN63XX)
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 3f832c3dd8f5..041153f5cf93 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -45,7 +45,7 @@ extern unsigned int vced_count, vcei_count;
45 * User space process size: 2GB. This is hardcoded into a few places, 45 * User space process size: 2GB. This is hardcoded into a few places,
46 * so don't change it unless you know what you are doing. 46 * so don't change it unless you know what you are doing.
47 */ 47 */
48#define TASK_SIZE 0x7fff8000UL 48#define TASK_SIZE 0x80000000UL
49#endif 49#endif
50 50
51#define STACK_TOP_MAX TASK_SIZE 51#define STACK_TOP_MAX TASK_SIZE
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index a71da576883c..eebf39549606 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -289,7 +289,7 @@
289 .set reorder 289 .set reorder
290 .set noat 290 .set noat
291 mfc0 a0, CP0_STATUS 291 mfc0 a0, CP0_STATUS
292 li v1, 0xff00 292 li v1, ST0_CU1 | ST0_IM
293 ori a0, STATMASK 293 ori a0, STATMASK
294 xori a0, STATMASK 294 xori a0, STATMASK
295 mtc0 a0, CP0_STATUS 295 mtc0 a0, CP0_STATUS
@@ -330,7 +330,7 @@
330 ori a0, STATMASK 330 ori a0, STATMASK
331 xori a0, STATMASK 331 xori a0, STATMASK
332 mtc0 a0, CP0_STATUS 332 mtc0 a0, CP0_STATUS
333 li v1, 0xff00 333 li v1, ST0_CU1 | ST0_FR | ST0_IM
334 and a0, v1 334 and a0, v1
335 LONG_L v0, PT_STATUS(sp) 335 LONG_L v0, PT_STATUS(sp)
336 nor v1, $0, v1 336 nor v1, $0, v1
diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h
index 6499d93ae68d..47bc45a67e9b 100644
--- a/arch/mips/include/asm/syscall.h
+++ b/arch/mips/include/asm/syscall.h
@@ -101,10 +101,8 @@ static inline void syscall_get_arguments(struct task_struct *task,
101 /* O32 ABI syscall() - Either 64-bit with O32 or 32-bit */ 101 /* O32 ABI syscall() - Either 64-bit with O32 or 32-bit */
102 if ((config_enabled(CONFIG_32BIT) || 102 if ((config_enabled(CONFIG_32BIT) ||
103 test_tsk_thread_flag(task, TIF_32BIT_REGS)) && 103 test_tsk_thread_flag(task, TIF_32BIT_REGS)) &&
104 (regs->regs[2] == __NR_syscall)) { 104 (regs->regs[2] == __NR_syscall))
105 i++; 105 i++;
106 n++;
107 }
108 106
109 while (n--) 107 while (n--)
110 ret |= mips_get_syscall_arg(args++, task, regs, i++); 108 ret |= mips_get_syscall_arg(args++, task, regs, i++);
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index 90f03a7da665..3129795de940 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -380,16 +380,17 @@
380#define __NR_userfaultfd (__NR_Linux + 357) 380#define __NR_userfaultfd (__NR_Linux + 357)
381#define __NR_membarrier (__NR_Linux + 358) 381#define __NR_membarrier (__NR_Linux + 358)
382#define __NR_mlock2 (__NR_Linux + 359) 382#define __NR_mlock2 (__NR_Linux + 359)
383#define __NR_copy_file_range (__NR_Linux + 360)
383 384
384/* 385/*
385 * Offset of the last Linux o32 flavoured syscall 386 * Offset of the last Linux o32 flavoured syscall
386 */ 387 */
387#define __NR_Linux_syscalls 359 388#define __NR_Linux_syscalls 360
388 389
389#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 390#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
390 391
391#define __NR_O32_Linux 4000 392#define __NR_O32_Linux 4000
392#define __NR_O32_Linux_syscalls 359 393#define __NR_O32_Linux_syscalls 360
393 394
394#if _MIPS_SIM == _MIPS_SIM_ABI64 395#if _MIPS_SIM == _MIPS_SIM_ABI64
395 396
@@ -717,16 +718,17 @@
717#define __NR_userfaultfd (__NR_Linux + 317) 718#define __NR_userfaultfd (__NR_Linux + 317)
718#define __NR_membarrier (__NR_Linux + 318) 719#define __NR_membarrier (__NR_Linux + 318)
719#define __NR_mlock2 (__NR_Linux + 319) 720#define __NR_mlock2 (__NR_Linux + 319)
721#define __NR_copy_file_range (__NR_Linux + 320)
720 722
721/* 723/*
722 * Offset of the last Linux 64-bit flavoured syscall 724 * Offset of the last Linux 64-bit flavoured syscall
723 */ 725 */
724#define __NR_Linux_syscalls 319 726#define __NR_Linux_syscalls 320
725 727
726#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 728#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
727 729
728#define __NR_64_Linux 5000 730#define __NR_64_Linux 5000
729#define __NR_64_Linux_syscalls 319 731#define __NR_64_Linux_syscalls 320
730 732
731#if _MIPS_SIM == _MIPS_SIM_NABI32 733#if _MIPS_SIM == _MIPS_SIM_NABI32
732 734
@@ -1058,15 +1060,16 @@
1058#define __NR_userfaultfd (__NR_Linux + 321) 1060#define __NR_userfaultfd (__NR_Linux + 321)
1059#define __NR_membarrier (__NR_Linux + 322) 1061#define __NR_membarrier (__NR_Linux + 322)
1060#define __NR_mlock2 (__NR_Linux + 323) 1062#define __NR_mlock2 (__NR_Linux + 323)
1063#define __NR_copy_file_range (__NR_Linux + 324)
1061 1064
1062/* 1065/*
1063 * Offset of the last N32 flavoured syscall 1066 * Offset of the last N32 flavoured syscall
1064 */ 1067 */
1065#define __NR_Linux_syscalls 323 1068#define __NR_Linux_syscalls 324
1066 1069
1067#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1070#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1068 1071
1069#define __NR_N32_Linux 6000 1072#define __NR_N32_Linux 6000
1070#define __NR_N32_Linux_syscalls 323 1073#define __NR_N32_Linux_syscalls 324
1071 1074
1072#endif /* _UAPI_ASM_UNISTD_H */ 1075#endif /* _UAPI_ASM_UNISTD_H */
diff --git a/arch/mips/kernel/binfmt_elfn32.c b/arch/mips/kernel/binfmt_elfn32.c
index 1188e00bb120..1b992c6e3d8e 100644
--- a/arch/mips/kernel/binfmt_elfn32.c
+++ b/arch/mips/kernel/binfmt_elfn32.c
@@ -35,7 +35,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
35 int __res = 1; \ 35 int __res = 1; \
36 struct elfhdr *__h = (hdr); \ 36 struct elfhdr *__h = (hdr); \
37 \ 37 \
38 if (__h->e_machine != EM_MIPS) \ 38 if (!mips_elf_check_machine(__h)) \
39 __res = 0; \ 39 __res = 0; \
40 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \ 40 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
41 __res = 0; \ 41 __res = 0; \
diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c
index 928767858b86..abd3affe5fb3 100644
--- a/arch/mips/kernel/binfmt_elfo32.c
+++ b/arch/mips/kernel/binfmt_elfo32.c
@@ -47,7 +47,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
47 int __res = 1; \ 47 int __res = 1; \
48 struct elfhdr *__h = (hdr); \ 48 struct elfhdr *__h = (hdr); \
49 \ 49 \
50 if (__h->e_machine != EM_MIPS) \ 50 if (!mips_elf_check_machine(__h)) \
51 __res = 0; \ 51 __res = 0; \
52 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \ 52 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
53 __res = 0; \ 53 __res = 0; \
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index f2975d4d1e44..eddd5fd6fdfa 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -65,12 +65,10 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
65 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK); 65 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
66 status |= KU_USER; 66 status |= KU_USER;
67 regs->cp0_status = status; 67 regs->cp0_status = status;
68 lose_fpu(0);
69 clear_thread_flag(TIF_MSA_CTX_LIVE);
68 clear_used_math(); 70 clear_used_math();
69 clear_fpu_owner();
70 init_dsp(); 71 init_dsp();
71 clear_thread_flag(TIF_USEDMSA);
72 clear_thread_flag(TIF_MSA_CTX_LIVE);
73 disable_msa();
74 regs->cp0_epc = pc; 72 regs->cp0_epc = pc;
75 regs->regs[29] = sp; 73 regs->regs[29] = sp;
76} 74}
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 2d23c834ba96..a56317444bda 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -595,3 +595,4 @@ EXPORT(sys_call_table)
595 PTR sys_userfaultfd 595 PTR sys_userfaultfd
596 PTR sys_membarrier 596 PTR sys_membarrier
597 PTR sys_mlock2 597 PTR sys_mlock2
598 PTR sys_copy_file_range /* 4360 */
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index deac63315d0e..2b2dc14610d0 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -433,4 +433,5 @@ EXPORT(sys_call_table)
433 PTR sys_userfaultfd 433 PTR sys_userfaultfd
434 PTR sys_membarrier 434 PTR sys_membarrier
435 PTR sys_mlock2 435 PTR sys_mlock2
436 PTR sys_copy_file_range /* 5320 */
436 .size sys_call_table,.-sys_call_table 437 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 5a69eb48d0a8..2bf5c8593d91 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -423,4 +423,5 @@ EXPORT(sysn32_call_table)
423 PTR sys_userfaultfd 423 PTR sys_userfaultfd
424 PTR sys_membarrier 424 PTR sys_membarrier
425 PTR sys_mlock2 425 PTR sys_mlock2
426 PTR sys_copy_file_range
426 .size sysn32_call_table,.-sysn32_call_table 427 .size sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index e4b6d7c97822..c5b759e584c7 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -578,4 +578,5 @@ EXPORT(sys32_call_table)
578 PTR sys_userfaultfd 578 PTR sys_userfaultfd
579 PTR sys_membarrier 579 PTR sys_membarrier
580 PTR sys_mlock2 580 PTR sys_mlock2
581 PTR sys_copy_file_range /* 4360 */
581 .size sys32_call_table,.-sys32_call_table 582 .size sys32_call_table,.-sys32_call_table
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 569a7d5242dd..5fdaf8bdcd2e 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -782,6 +782,7 @@ static inline void prefill_possible_map(void) {}
782void __init setup_arch(char **cmdline_p) 782void __init setup_arch(char **cmdline_p)
783{ 783{
784 cpu_probe(); 784 cpu_probe();
785 mips_cm_probe();
785 prom_init(); 786 prom_init();
786 787
787 setup_early_fdc_console(); 788 setup_early_fdc_console();
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index bafcb7ad5c85..ae790c575d4f 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -663,7 +663,7 @@ static int simulate_rdhwr_normal(struct pt_regs *regs, unsigned int opcode)
663 return -1; 663 return -1;
664} 664}
665 665
666static int simulate_rdhwr_mm(struct pt_regs *regs, unsigned short opcode) 666static int simulate_rdhwr_mm(struct pt_regs *regs, unsigned int opcode)
667{ 667{
668 if ((opcode & MM_POOL32A_FUNC) == MM_RDHWR) { 668 if ((opcode & MM_POOL32A_FUNC) == MM_RDHWR) {
669 int rd = (opcode & MM_RS) >> 16; 669 int rd = (opcode & MM_RS) >> 16;
@@ -1119,11 +1119,12 @@ no_r2_instr:
1119 if (get_isa16_mode(regs->cp0_epc)) { 1119 if (get_isa16_mode(regs->cp0_epc)) {
1120 unsigned short mmop[2] = { 0 }; 1120 unsigned short mmop[2] = { 0 };
1121 1121
1122 if (unlikely(get_user(mmop[0], epc) < 0)) 1122 if (unlikely(get_user(mmop[0], (u16 __user *)epc + 0) < 0))
1123 status = SIGSEGV; 1123 status = SIGSEGV;
1124 if (unlikely(get_user(mmop[1], epc) < 0)) 1124 if (unlikely(get_user(mmop[1], (u16 __user *)epc + 1) < 0))
1125 status = SIGSEGV; 1125 status = SIGSEGV;
1126 opcode = (mmop[0] << 16) | mmop[1]; 1126 opcode = mmop[0];
1127 opcode = (opcode << 16) | mmop[1];
1127 1128
1128 if (status < 0) 1129 if (status < 0)
1129 status = simulate_rdhwr_mm(regs, opcode); 1130 status = simulate_rdhwr_mm(regs, opcode);
@@ -1369,26 +1370,12 @@ asmlinkage void do_cpu(struct pt_regs *regs)
1369 if (unlikely(compute_return_epc(regs) < 0)) 1370 if (unlikely(compute_return_epc(regs) < 0))
1370 break; 1371 break;
1371 1372
1372 if (get_isa16_mode(regs->cp0_epc)) { 1373 if (!get_isa16_mode(regs->cp0_epc)) {
1373 unsigned short mmop[2] = { 0 };
1374
1375 if (unlikely(get_user(mmop[0], epc) < 0))
1376 status = SIGSEGV;
1377 if (unlikely(get_user(mmop[1], epc) < 0))
1378 status = SIGSEGV;
1379 opcode = (mmop[0] << 16) | mmop[1];
1380
1381 if (status < 0)
1382 status = simulate_rdhwr_mm(regs, opcode);
1383 } else {
1384 if (unlikely(get_user(opcode, epc) < 0)) 1374 if (unlikely(get_user(opcode, epc) < 0))
1385 status = SIGSEGV; 1375 status = SIGSEGV;
1386 1376
1387 if (!cpu_has_llsc && status < 0) 1377 if (!cpu_has_llsc && status < 0)
1388 status = simulate_llsc(regs, opcode); 1378 status = simulate_llsc(regs, opcode);
1389
1390 if (status < 0)
1391 status = simulate_rdhwr_normal(regs, opcode);
1392 } 1379 }
1393 1380
1394 if (status < 0) 1381 if (status < 0)
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 3bd0597d9c3d..249647578e58 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -181,10 +181,6 @@ static int __init mips_sc_probe_cm3(void)
181 return 1; 181 return 1;
182} 182}
183 183
184void __weak platform_early_l2_init(void)
185{
186}
187
188static inline int __init mips_sc_probe(void) 184static inline int __init mips_sc_probe(void)
189{ 185{
190 struct cpuinfo_mips *c = &current_cpu_data; 186 struct cpuinfo_mips *c = &current_cpu_data;
@@ -194,12 +190,6 @@ static inline int __init mips_sc_probe(void)
194 /* Mark as not present until probe completed */ 190 /* Mark as not present until probe completed */
195 c->scache.flags |= MIPS_CACHE_NOT_PRESENT; 191 c->scache.flags |= MIPS_CACHE_NOT_PRESENT;
196 192
197 /*
198 * Do we need some platform specific probing before
199 * we configure L2?
200 */
201 platform_early_l2_init();
202
203 if (mips_cm_revision() >= CM_REV_CM3) 193 if (mips_cm_revision() >= CM_REV_CM3)
204 return mips_sc_probe_cm3(); 194 return mips_sc_probe_cm3();
205 195
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index 571148c5fd0b..dc2c5214809d 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -293,7 +293,6 @@ mips_pci_controller:
293 console_config(); 293 console_config();
294#endif 294#endif
295 /* Early detection of CMP support */ 295 /* Early detection of CMP support */
296 mips_cm_probe();
297 mips_cpc_probe(); 296 mips_cpc_probe();
298 297
299 if (!register_cps_smp_ops()) 298 if (!register_cps_smp_ops())
@@ -304,10 +303,3 @@ mips_pci_controller:
304 return; 303 return;
305 register_up_smp_ops(); 304 register_up_smp_ops();
306} 305}
307
308void platform_early_l2_init(void)
309{
310 /* L2 configuration lives in the CM3 */
311 if (mips_cm_revision() >= CM_REV_CM3)
312 mips_cm_probe();
313}
diff --git a/arch/mips/pci/pci-mt7620.c b/arch/mips/pci/pci-mt7620.c
index a009ee458934..1ae932c2d78b 100644
--- a/arch/mips/pci/pci-mt7620.c
+++ b/arch/mips/pci/pci-mt7620.c
@@ -297,12 +297,12 @@ static int mt7620_pci_probe(struct platform_device *pdev)
297 return PTR_ERR(rstpcie0); 297 return PTR_ERR(rstpcie0);
298 298
299 bridge_base = devm_ioremap_resource(&pdev->dev, bridge_res); 299 bridge_base = devm_ioremap_resource(&pdev->dev, bridge_res);
300 if (!bridge_base) 300 if (IS_ERR(bridge_base))
301 return -ENOMEM; 301 return PTR_ERR(bridge_base);
302 302
303 pcie_base = devm_ioremap_resource(&pdev->dev, pcie_res); 303 pcie_base = devm_ioremap_resource(&pdev->dev, pcie_res);
304 if (!pcie_base) 304 if (IS_ERR(pcie_base))
305 return -ENOMEM; 305 return PTR_ERR(pcie_base);
306 306
307 iomem_resource.start = 0; 307 iomem_resource.start = 0;
308 iomem_resource.end = ~0; 308 iomem_resource.end = ~0;
diff --git a/arch/um/include/asm/page.h b/arch/um/include/asm/page.h
index e13d41c392ae..f878bec23576 100644
--- a/arch/um/include/asm/page.h
+++ b/arch/um/include/asm/page.h
@@ -34,21 +34,18 @@ struct page;
34 34
35#if defined(CONFIG_3_LEVEL_PGTABLES) && !defined(CONFIG_64BIT) 35#if defined(CONFIG_3_LEVEL_PGTABLES) && !defined(CONFIG_64BIT)
36 36
37typedef struct { unsigned long pte_low, pte_high; } pte_t; 37typedef struct { unsigned long pte; } pte_t;
38typedef struct { unsigned long pmd; } pmd_t; 38typedef struct { unsigned long pmd; } pmd_t;
39typedef struct { unsigned long pgd; } pgd_t; 39typedef struct { unsigned long pgd; } pgd_t;
40#define pte_val(x) ((x).pte_low | ((unsigned long long) (x).pte_high << 32)) 40#define pte_val(p) ((p).pte)
41 41
42#define pte_get_bits(pte, bits) ((pte).pte_low & (bits)) 42#define pte_get_bits(p, bits) ((p).pte & (bits))
43#define pte_set_bits(pte, bits) ((pte).pte_low |= (bits)) 43#define pte_set_bits(p, bits) ((p).pte |= (bits))
44#define pte_clear_bits(pte, bits) ((pte).pte_low &= ~(bits)) 44#define pte_clear_bits(p, bits) ((p).pte &= ~(bits))
45#define pte_copy(to, from) ({ (to).pte_high = (from).pte_high; \ 45#define pte_copy(to, from) ({ (to).pte = (from).pte; })
46 smp_wmb(); \ 46#define pte_is_zero(p) (!((p).pte & ~_PAGE_NEWPAGE))
47 (to).pte_low = (from).pte_low; }) 47#define pte_set_val(p, phys, prot) \
48#define pte_is_zero(pte) (!((pte).pte_low & ~_PAGE_NEWPAGE) && !(pte).pte_high) 48 ({ (p).pte = (phys) | pgprot_val(prot); })
49#define pte_set_val(pte, phys, prot) \
50 ({ (pte).pte_high = (phys) >> 32; \
51 (pte).pte_low = (phys) | pgprot_val(prot); })
52 49
53#define pmd_val(x) ((x).pmd) 50#define pmd_val(x) ((x).pmd)
54#define __pmd(x) ((pmd_t) { (x) } ) 51#define __pmd(x) ((pmd_t) { (x) } )
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 9af2e6338400..ab2ed5328f0a 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -475,6 +475,7 @@ config X86_UV
475 depends on X86_64 475 depends on X86_64
476 depends on X86_EXTENDED_PLATFORM 476 depends on X86_EXTENDED_PLATFORM
477 depends on NUMA 477 depends on NUMA
478 depends on EFI
478 depends on X86_X2APIC 479 depends on X86_X2APIC
479 depends on PCI 480 depends on PCI
480 ---help--- 481 ---help---
diff --git a/arch/x86/crypto/chacha20-ssse3-x86_64.S b/arch/x86/crypto/chacha20-ssse3-x86_64.S
index 712b13047b41..3a33124e9112 100644
--- a/arch/x86/crypto/chacha20-ssse3-x86_64.S
+++ b/arch/x86/crypto/chacha20-ssse3-x86_64.S
@@ -157,7 +157,9 @@ ENTRY(chacha20_4block_xor_ssse3)
157 # done with the slightly better performing SSSE3 byte shuffling, 157 # done with the slightly better performing SSSE3 byte shuffling,
158 # 7/12-bit word rotation uses traditional shift+OR. 158 # 7/12-bit word rotation uses traditional shift+OR.
159 159
160 sub $0x40,%rsp 160 mov %rsp,%r11
161 sub $0x80,%rsp
162 and $~63,%rsp
161 163
162 # x0..15[0-3] = s0..3[0..3] 164 # x0..15[0-3] = s0..3[0..3]
163 movq 0x00(%rdi),%xmm1 165 movq 0x00(%rdi),%xmm1
@@ -620,6 +622,6 @@ ENTRY(chacha20_4block_xor_ssse3)
620 pxor %xmm1,%xmm15 622 pxor %xmm1,%xmm15
621 movdqu %xmm15,0xf0(%rsi) 623 movdqu %xmm15,0xf0(%rsi)
622 624
623 add $0x40,%rsp 625 mov %r11,%rsp
624 ret 626 ret
625ENDPROC(chacha20_4block_xor_ssse3) 627ENDPROC(chacha20_4block_xor_ssse3)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 2d5a50cb61a2..20c11d1aa4cc 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -766,7 +766,7 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk);
766 * Return saved PC of a blocked thread. 766 * Return saved PC of a blocked thread.
767 * What is this good for? it will be always the scheduler or ret_from_fork. 767 * What is this good for? it will be always the scheduler or ret_from_fork.
768 */ 768 */
769#define thread_saved_pc(t) (*(unsigned long *)((t)->thread.sp - 8)) 769#define thread_saved_pc(t) READ_ONCE_NOCHECK(*(unsigned long *)((t)->thread.sp - 8))
770 770
771#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.sp0 - 1) 771#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.sp0 - 1)
772extern unsigned long KSTK_ESP(struct task_struct *task); 772extern unsigned long KSTK_ESP(struct task_struct *task);
diff --git a/arch/x86/mm/hugetlbpage.c b/arch/x86/mm/hugetlbpage.c
index 42982b26e32b..740d7ac03a55 100644
--- a/arch/x86/mm/hugetlbpage.c
+++ b/arch/x86/mm/hugetlbpage.c
@@ -173,10 +173,10 @@ static __init int setup_hugepagesz(char *opt)
173} 173}
174__setup("hugepagesz=", setup_hugepagesz); 174__setup("hugepagesz=", setup_hugepagesz);
175 175
176#ifdef CONFIG_CMA 176#if (defined(CONFIG_MEMORY_ISOLATION) && defined(CONFIG_COMPACTION)) || defined(CONFIG_CMA)
177static __init int gigantic_pages_init(void) 177static __init int gigantic_pages_init(void)
178{ 178{
179 /* With CMA we can allocate gigantic pages at runtime */ 179 /* With compaction or CMA we can allocate gigantic pages at runtime */
180 if (cpu_has_gbpages && !size_to_hstate(1UL << PUD_SHIFT)) 180 if (cpu_has_gbpages && !size_to_hstate(1UL << PUD_SHIFT))
181 hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT); 181 hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT);
182 return 0; 182 return 0;
diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c
index c3b3f653ed0c..d04f8094bc23 100644
--- a/arch/x86/mm/numa.c
+++ b/arch/x86/mm/numa.c
@@ -469,7 +469,7 @@ static void __init numa_clear_kernel_node_hotplug(void)
469{ 469{
470 int i, nid; 470 int i, nid;
471 nodemask_t numa_kernel_nodes = NODE_MASK_NONE; 471 nodemask_t numa_kernel_nodes = NODE_MASK_NONE;
472 unsigned long start, end; 472 phys_addr_t start, end;
473 struct memblock_region *r; 473 struct memblock_region *r;
474 474
475 /* 475 /*
generated by cgit v1.2.2 (git 2.25.0) at 2026-05-11 13:09:11 -0400