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-rw-r--r--arch/xtensa/include/asm/cacheflush.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h
index 397d6a1a4224..a0d50be5a8cb 100644
--- a/arch/xtensa/include/asm/cacheflush.h
+++ b/arch/xtensa/include/asm/cacheflush.h
@@ -88,7 +88,7 @@ static inline void __invalidate_icache_page_alias(unsigned long virt,
88 * 88 *
89 * Pages can get remapped. Because this might change the 'color' of that page, 89 * Pages can get remapped. Because this might change the 'color' of that page,
90 * we have to flush the cache before the PTE is changed. 90 * we have to flush the cache before the PTE is changed.
91 * (see also Documentation/cachetlb.txt) 91 * (see also Documentation/core-api/cachetlb.rst)
92 */ 92 */
93 93
94#if defined(CONFIG_MMU) && \ 94#if defined(CONFIG_MMU) && \
@@ -152,7 +152,7 @@ void local_flush_cache_page(struct vm_area_struct *vma,
152 __invalidate_icache_range(start,(end) - (start)); \ 152 __invalidate_icache_range(start,(end) - (start)); \
153 } while (0) 153 } while (0)
154 154
155/* This is not required, see Documentation/cachetlb.txt */ 155/* This is not required, see Documentation/core-api/cachetlb.rst */
156#define flush_icache_page(vma,page) do { } while (0) 156#define flush_icache_page(vma,page) do { } while (0)
157 157
158#define flush_dcache_mmap_lock(mapping) do { } while (0) 158#define flush_dcache_mmap_lock(mapping) do { } while (0)