1 files changed, 0 insertions, 47 deletions

diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 6fa84d531f4f..7b4307163eac 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -406,50 +406,3 @@ void __init pcibios_resource_survey(void)
          */
         ioapic_insert_resources();
 }
-
-static const struct vm_operations_struct pci_mmap_ops = {
-        .access = generic_access_phys,
-};
-
-int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
-                        enum pci_mmap_state mmap_state, int write_combine)
-{
-        unsigned long prot;
-
-        /* I/O space cannot be accessed via normal processor loads and
-         * stores on this platform.
-         */
-        if (mmap_state == pci_mmap_io)
-                return -EINVAL;
-
-        prot = pgprot_val(vma->vm_page_prot);
-
-        /*
-         * Return error if pat is not enabled and write_combine is requested.
-         * Caller can followup with UC MINUS request and add a WC mtrr if there
-         * is a free mtrr slot.
-         */
-        if (!pat_enabled() && write_combine)
-                return -EINVAL;
-
-        if (pat_enabled() && write_combine)
-                prot |= cachemode2protval(_PAGE_CACHE_MODE_WC);
-        else if (pat_enabled() || boot_cpu_data.x86 > 3)
-                /*
-                 * ioremap() and ioremap_nocache() defaults to UC MINUS for now.
-                 * To avoid attribute conflicts, request UC MINUS here
-                 * as well.
-                 */
-                prot |= cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS);
-
-        vma->vm_page_prot = __pgprot(prot);
-
-        if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
-                               vma->vm_end - vma->vm_start,
-                               vma->vm_page_prot))
-                return -EAGAIN;
-
-        vma->vm_ops = &pci_mmap_ops;
-
-        return 0;
-}