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Diffstat (limited to 'arch/x86/mm/tlb.c')
-rw-r--r--arch/x86/mm/tlb.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 9517d1b2a281..e96b99eb800c 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -305,6 +305,10 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
305 305
306 choose_new_asid(next, next_tlb_gen, &new_asid, &need_flush); 306 choose_new_asid(next, next_tlb_gen, &new_asid, &need_flush);
307 307
308 /* Let nmi_uaccess_okay() know that we're changing CR3. */
309 this_cpu_write(cpu_tlbstate.loaded_mm, LOADED_MM_SWITCHING);
310 barrier();
311
308 if (need_flush) { 312 if (need_flush) {
309 this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id); 313 this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id);
310 this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen); 314 this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen);
@@ -335,6 +339,9 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
335 if (next != &init_mm) 339 if (next != &init_mm)
336 this_cpu_write(cpu_tlbstate.last_ctx_id, next->context.ctx_id); 340 this_cpu_write(cpu_tlbstate.last_ctx_id, next->context.ctx_id);
337 341
342 /* Make sure we write CR3 before loaded_mm. */
343 barrier();
344
338 this_cpu_write(cpu_tlbstate.loaded_mm, next); 345 this_cpu_write(cpu_tlbstate.loaded_mm, next);
339 this_cpu_write(cpu_tlbstate.loaded_mm_asid, new_asid); 346 this_cpu_write(cpu_tlbstate.loaded_mm_asid, new_asid);
340 } 347 }