diff options
Diffstat (limited to 'arch/x86/kernel/cpu/cyrix.c')
-rw-r--r-- | arch/x86/kernel/cpu/cyrix.c | 34 |
1 files changed, 8 insertions, 26 deletions
diff --git a/arch/x86/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c index 3fd7a67bb06a..ada50505a5c8 100644 --- a/arch/x86/kernel/cpu/cyrix.c +++ b/arch/x86/kernel/cpu/cyrix.c | |||
@@ -116,7 +116,7 @@ static void __cpuinit set_cx86_reorder(void) | |||
116 | setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ | 116 | setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ |
117 | 117 | ||
118 | /* Load/Store Serialize to mem access disable (=reorder it) */ | 118 | /* Load/Store Serialize to mem access disable (=reorder it) */ |
119 | setCx86(CX86_PCR0, getCx86(CX86_PCR0) & ~0x80); | 119 | setCx86_old(CX86_PCR0, getCx86_old(CX86_PCR0) & ~0x80); |
120 | /* set load/store serialize from 1GB to 4GB */ | 120 | /* set load/store serialize from 1GB to 4GB */ |
121 | ccr3 |= 0xe0; | 121 | ccr3 |= 0xe0; |
122 | setCx86(CX86_CCR3, ccr3); | 122 | setCx86(CX86_CCR3, ccr3); |
@@ -127,28 +127,11 @@ static void __cpuinit set_cx86_memwb(void) | |||
127 | printk(KERN_INFO "Enable Memory-Write-back mode on Cyrix/NSC processor.\n"); | 127 | printk(KERN_INFO "Enable Memory-Write-back mode on Cyrix/NSC processor.\n"); |
128 | 128 | ||
129 | /* CCR2 bit 2: unlock NW bit */ | 129 | /* CCR2 bit 2: unlock NW bit */ |
130 | setCx86(CX86_CCR2, getCx86(CX86_CCR2) & ~0x04); | 130 | setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) & ~0x04); |
131 | /* set 'Not Write-through' */ | 131 | /* set 'Not Write-through' */ |
132 | write_cr0(read_cr0() | X86_CR0_NW); | 132 | write_cr0(read_cr0() | X86_CR0_NW); |
133 | /* CCR2 bit 2: lock NW bit and set WT1 */ | 133 | /* CCR2 bit 2: lock NW bit and set WT1 */ |
134 | setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14); | 134 | setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x14); |
135 | } | ||
136 | |||
137 | static void __cpuinit set_cx86_inc(void) | ||
138 | { | ||
139 | unsigned char ccr3; | ||
140 | |||
141 | printk(KERN_INFO "Enable Incrementor on Cyrix/NSC processor.\n"); | ||
142 | |||
143 | ccr3 = getCx86(CX86_CCR3); | ||
144 | setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ | ||
145 | /* PCR1 -- Performance Control */ | ||
146 | /* Incrementor on, whatever that is */ | ||
147 | setCx86(CX86_PCR1, getCx86(CX86_PCR1) | 0x02); | ||
148 | /* PCR0 -- Performance Control */ | ||
149 | /* Incrementor Margin 10 */ | ||
150 | setCx86(CX86_PCR0, getCx86(CX86_PCR0) | 0x04); | ||
151 | setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ | ||
152 | } | 135 | } |
153 | 136 | ||
154 | /* | 137 | /* |
@@ -162,19 +145,18 @@ static void __cpuinit geode_configure(void) | |||
162 | local_irq_save(flags); | 145 | local_irq_save(flags); |
163 | 146 | ||
164 | /* Suspend on halt power saving and enable #SUSP pin */ | 147 | /* Suspend on halt power saving and enable #SUSP pin */ |
165 | setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88); | 148 | setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x88); |
166 | 149 | ||
167 | ccr3 = getCx86(CX86_CCR3); | 150 | ccr3 = getCx86(CX86_CCR3); |
168 | setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ | 151 | setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ |
169 | 152 | ||
170 | 153 | ||
171 | /* FPU fast, DTE cache, Mem bypass */ | 154 | /* FPU fast, DTE cache, Mem bypass */ |
172 | setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x38); | 155 | setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x38); |
173 | setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ | 156 | setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ |
174 | 157 | ||
175 | set_cx86_memwb(); | 158 | set_cx86_memwb(); |
176 | set_cx86_reorder(); | 159 | set_cx86_reorder(); |
177 | set_cx86_inc(); | ||
178 | 160 | ||
179 | local_irq_restore(flags); | 161 | local_irq_restore(flags); |
180 | } | 162 | } |
@@ -286,7 +268,7 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c) | |||
286 | /* GXm supports extended cpuid levels 'ala' AMD */ | 268 | /* GXm supports extended cpuid levels 'ala' AMD */ |
287 | if (c->cpuid_level == 2) { | 269 | if (c->cpuid_level == 2) { |
288 | /* Enable cxMMX extensions (GX1 Datasheet 54) */ | 270 | /* Enable cxMMX extensions (GX1 Datasheet 54) */ |
289 | setCx86(CX86_CCR7, getCx86(CX86_CCR7) | 1); | 271 | setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7) | 1); |
290 | 272 | ||
291 | /* | 273 | /* |
292 | * GXm : 0x30 ... 0x5f GXm datasheet 51 | 274 | * GXm : 0x30 ... 0x5f GXm datasheet 51 |
@@ -309,7 +291,7 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c) | |||
309 | if (dir1 > 7) { | 291 | if (dir1 > 7) { |
310 | dir0_msn++; /* M II */ | 292 | dir0_msn++; /* M II */ |
311 | /* Enable MMX extensions (App note 108) */ | 293 | /* Enable MMX extensions (App note 108) */ |
312 | setCx86(CX86_CCR7, getCx86(CX86_CCR7)|1); | 294 | setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7)|1); |
313 | } else { | 295 | } else { |
314 | c->coma_bug = 1; /* 6x86MX, it has the bug. */ | 296 | c->coma_bug = 1; /* 6x86MX, it has the bug. */ |
315 | } | 297 | } |
@@ -424,7 +406,7 @@ static void __cpuinit cyrix_identify(struct cpuinfo_x86 *c) | |||
424 | local_irq_save(flags); | 406 | local_irq_save(flags); |
425 | ccr3 = getCx86(CX86_CCR3); | 407 | ccr3 = getCx86(CX86_CCR3); |
426 | setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ | 408 | setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ |
427 | setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x80); /* enable cpuid */ | 409 | setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x80); /* enable cpuid */ |
428 | setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ | 410 | setCx86(CX86_CCR3, ccr3); /* disable MAPEN */ |
429 | local_irq_restore(flags); | 411 | local_irq_restore(flags); |
430 | } | 412 | } |