1 files changed, 97 insertions, 66 deletions

diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
index cdac7d62369b..2e3c6862657b 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
@@ -16,12 +16,16 @@
 #include <linux/slab.h>
 
 #include <asm/msr.h>
+#include <asm/tsc.h>
 #include "speedstep-lib.h"
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-lib", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "speedstep-lib", msg)
+
+#define PFX "speedstep-lib: "
 
 #ifdef CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK
-static int relaxed_check = 0;
+static int relaxed_check;
 #else
 #define relaxed_check 0
 #endif
@@ -30,14 +34,14 @@ static int relaxed_check = 0;
  *                   GET PROCESSOR CORE SPEED IN KHZ                 *
  *********************************************************************/
 
-static unsigned int pentium3_get_frequency (unsigned int processor)
+static unsigned int pentium3_get_frequency(unsigned int processor)
 {
-        /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
+        /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
         struct {
                 unsigned int ratio;     /* Frequency Multiplier (x10) */
                 u8 bitmap;              /* power on configuration bits
                                         [27, 25:22] (in MSR 0x2a) */
-        } msr_decode_mult [] = {
+        } msr_decode_mult[] = {
                 { 30, 0x01 },
                 { 35, 0x05 },
                 { 40, 0x02 },
@@ -52,7 +56,7 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
                 { 85, 0x26 },
                 { 90, 0x20 },
                 { 100, 0x2b },
-                { 0, 0xff }     /* error or unknown value */
+                { 0, 0xff }     /* error or unknown value */
         };
 
         /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */
@@ -60,7 +64,7 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
                 unsigned int value;     /* Front Side Bus speed in MHz */
                 u8 bitmap;              /* power on configuration bits [18: 19]
                                         (in MSR 0x2a) */
-        } msr_decode_fsb [] = {
+        } msr_decode_fsb[] = {
                 {  66, 0x0 },
                 { 100, 0x2 },
                 { 133, 0x1 },
@@ -85,7 +89,7 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
         }
 
         /* decode the multiplier */
-        if (processor == SPEEDSTEP_PROCESSOR_PIII_C_EARLY) {
+        if (processor == SPEEDSTEP_CPU_PIII_C_EARLY) {
                 dprintk("workaround for early PIIIs\n");
                 msr_lo &= 0x03c00000;
         } else
@@ -97,9 +101,10 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
                 j++;
         }
 
-        dprintk("speed is %u\n", (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100));
+        dprintk("speed is %u\n",
+                (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100));
 
-        return (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100);
+        return msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100;
 }
 
 
@@ -112,20 +117,23 @@ static unsigned int pentiumM_get_frequency(void)
 
         /* see table B-2 of 24547212.pdf */
         if (msr_lo & 0x00040000) {
-                printk(KERN_DEBUG "speedstep-lib: PM - invalid FSB: 0x%x 0x%x\n", msr_lo, msr_tmp);
+                printk(KERN_DEBUG PFX "PM - invalid FSB: 0x%x 0x%x\n",
+                                msr_lo, msr_tmp);
                 return 0;
         }
 
         msr_tmp = (msr_lo >> 22) & 0x1f;
-        dprintk("bits 22-26 are 0x%x, speed is %u\n", msr_tmp, (msr_tmp * 100 * 1000));
+        dprintk("bits 22-26 are 0x%x, speed is %u\n",
+                        msr_tmp, (msr_tmp * 100 * 1000));
 
-        return (msr_tmp * 100 * 1000);
+        return msr_tmp * 100 * 1000;
 }
 
 static unsigned int pentium_core_get_frequency(void)
 {
         u32 fsb = 0;
         u32 msr_lo, msr_tmp;
+        int ret;
 
         rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp);
         /* see table B-2 of 25366920.pdf */
@@ -153,12 +161,15 @@ static unsigned int pentium_core_get_frequency(void)
         }
 
         rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
-        dprintk("PCORE - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);
+        dprintk("PCORE - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n",
+                        msr_lo, msr_tmp);
 
         msr_tmp = (msr_lo >> 22) & 0x1f;
-        dprintk("bits 22-26 are 0x%x, speed is %u\n", msr_tmp, (msr_tmp * fsb));
+        dprintk("bits 22-26 are 0x%x, speed is %u\n",
+                        msr_tmp, (msr_tmp * fsb));
 
-        return (msr_tmp * fsb);
+        ret = (msr_tmp * fsb);
+        return ret;
 }
 
 
@@ -167,6 +178,16 @@ static unsigned int pentium4_get_frequency(void)
         struct cpuinfo_x86 *c = &boot_cpu_data;
         u32 msr_lo, msr_hi, mult;
         unsigned int fsb = 0;
+        unsigned int ret;
+        u8 fsb_code;
+
+        /* Pentium 4 Model 0 and 1 do not have the Core Clock Frequency
+         * to System Bus Frequency Ratio Field in the Processor Frequency
+         * Configuration Register of the MSR. Therefore the current
+         * frequency cannot be calculated and has to be measured.
+         */
+        if (c->x86_model < 2)
+                return cpu_khz;
 
         rdmsr(0x2c, msr_lo, msr_hi);
 
@@ -177,62 +198,61 @@ static unsigned int pentium4_get_frequency(void)
          * revision #12 in Table B-1: MSRs in the Pentium 4 and
          * Intel Xeon Processors, on page B-4 and B-5.
          */
-        if (c->x86_model < 2)
+        fsb_code = (msr_lo >> 16) & 0x7;
+        switch (fsb_code) {
+        case 0:
                 fsb = 100 * 1000;
-        else {
-                u8 fsb_code = (msr_lo >> 16) & 0x7;
-                switch (fsb_code) {
-                case 0:
-                        fsb = 100 * 1000;
-                        break;
-                case 1:
-                        fsb = 13333 * 10;
-                        break;
-                case 2:
-                        fsb = 200 * 1000;
-                        break;
-                }
+                break;
+        case 1:
+                fsb = 13333 * 10;
+                break;
+        case 2:
+                fsb = 200 * 1000;
+                break;
         }
 
         if (!fsb)
-                printk(KERN_DEBUG "speedstep-lib: couldn't detect FSB speed. Please send an e-mail to <linux@brodo.de>\n");
+                printk(KERN_DEBUG PFX "couldn't detect FSB speed. "
+                                "Please send an e-mail to <linux@brodo.de>\n");
 
         /* Multiplier. */
         mult = msr_lo >> 24;
 
-        dprintk("P4 - FSB %u kHz; Multiplier %u; Speed %u kHz\n", fsb, mult, (fsb * mult));
+        dprintk("P4 - FSB %u kHz; Multiplier %u; Speed %u kHz\n",
+                        fsb, mult, (fsb * mult));
 
-        return (fsb * mult);
+        ret = (fsb * mult);
+        return ret;
 }
 
 
-unsigned int speedstep_get_processor_frequency(unsigned int processor)
+unsigned int speedstep_get_frequency(unsigned int processor)
 {
         switch (processor) {
-        case SPEEDSTEP_PROCESSOR_PCORE:
+        case SPEEDSTEP_CPU_PCORE:
                 return pentium_core_get_frequency();
-        case SPEEDSTEP_PROCESSOR_PM:
+        case SPEEDSTEP_CPU_PM:
                 return pentiumM_get_frequency();
-        case SPEEDSTEP_PROCESSOR_P4D:
-        case SPEEDSTEP_PROCESSOR_P4M:
+        case SPEEDSTEP_CPU_P4D:
+        case SPEEDSTEP_CPU_P4M:
                 return pentium4_get_frequency();
-        case SPEEDSTEP_PROCESSOR_PIII_T:
-        case SPEEDSTEP_PROCESSOR_PIII_C:
-        case SPEEDSTEP_PROCESSOR_PIII_C_EARLY:
+        case SPEEDSTEP_CPU_PIII_T:
+        case SPEEDSTEP_CPU_PIII_C:
+        case SPEEDSTEP_CPU_PIII_C_EARLY:
                 return pentium3_get_frequency(processor);
         default:
                 return 0;
         };
         return 0;
 }
-EXPORT_SYMBOL_GPL(speedstep_get_processor_frequency);
+EXPORT_SYMBOL_GPL(speedstep_get_frequency);
 
 
 /*********************************************************************
  *                 DETECT SPEEDSTEP-CAPABLE PROCESSOR                *
  *********************************************************************/
 
-unsigned int speedstep_detect_processor (void)
+unsigned int speedstep_detect_processor(void)
 {
         struct cpuinfo_x86 *c = &cpu_data(0);
         u32 ebx, msr_lo, msr_hi;
@@ -261,7 +281,7 @@ unsigned int speedstep_detect_processor (void)
                          * sample has ebx = 0x0f, production has 0x0e.
                          */
                         if ((ebx == 0x0e) || (ebx == 0x0f))
-                                return SPEEDSTEP_PROCESSOR_P4M;
+                                return SPEEDSTEP_CPU_P4M;
                         break;
                 case 7:
                         /*
@@ -272,7 +292,7 @@ unsigned int speedstep_detect_processor (void)
                          * samples are only of B-stepping...
                          */
                         if (ebx == 0x0e)
-                                return SPEEDSTEP_PROCESSOR_P4M;
+                                return SPEEDSTEP_CPU_P4M;
                         break;
                 case 9:
                         /*
@@ -288,10 +308,13 @@ unsigned int speedstep_detect_processor (void)
                          * M-P4-Ms may have either ebx=0xe or 0xf [see above]
                          * M-P4/533 have either ebx=0xe or 0xf. [25317607.pdf]
                          * also, M-P4M HTs have ebx=0x8, too
-                         * For now, they are distinguished by the model_id string
+                         * For now, they are distinguished by the model_id
+                         * string
                          */
-                        if ((ebx == 0x0e) || (strstr(c->x86_model_id,"Mobile Intel(R) Pentium(R) 4") != NULL))
-                                return SPEEDSTEP_PROCESSOR_P4M;
+                        if ((ebx == 0x0e) ||
+                                (strstr(c->x86_model_id,
+                                    "Mobile Intel(R) Pentium(R) 4") != NULL))
+                                return SPEEDSTEP_CPU_P4M;
                         break;
                 default:
                         break;
@@ -301,7 +324,8 @@ unsigned int speedstep_detect_processor (void)
 
         switch (c->x86_model) {
         case 0x0B: /* Intel PIII [Tualatin] */
-                /* cpuid_ebx(1) is 0x04 for desktop PIII, 0x06 for mobile PIII-M */
+                /* cpuid_ebx(1) is 0x04 for desktop PIII,
+                 * 0x06 for mobile PIII-M */
                 ebx = cpuid_ebx(0x00000001);
                 dprintk("ebx is %x\n", ebx);
 
@@ -313,14 +337,15 @@ unsigned int speedstep_detect_processor (void)
                 /* So far all PIII-M processors support SpeedStep. See
                  * Intel's 24540640.pdf of June 2003
                  */
-                return SPEEDSTEP_PROCESSOR_PIII_T;
+                return SPEEDSTEP_CPU_PIII_T;
 
         case 0x08: /* Intel PIII [Coppermine] */
 
                 /* all mobile PIII Coppermines have FSB 100 MHz
                  * ==> sort out a few desktop PIIIs. */
                 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi);
-                dprintk("Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n", msr_lo, msr_hi);
+                dprintk("Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n",
+                                msr_lo, msr_hi);
                 msr_lo &= 0x00c0000;
                 if (msr_lo != 0x0080000)
                         return 0;
@@ -332,13 +357,15 @@ unsigned int speedstep_detect_processor (void)
                  * bit 56 or 57 is set
                  */
                 rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
-                dprintk("Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n", msr_lo, msr_hi);
-                if ((msr_hi & (1<<18)) && (relaxed_check ? 1 : (msr_hi & (3<<24)))) {
+                dprintk("Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n",
+                                msr_lo, msr_hi);
+                if ((msr_hi & (1<<18)) &&
+                    (relaxed_check ? 1 : (msr_hi & (3<<24)))) {
                         if (c->x86_mask == 0x01) {
                                 dprintk("early PIII version\n");
-                                return SPEEDSTEP_PROCESSOR_PIII_C_EARLY;
+                                return SPEEDSTEP_CPU_PIII_C_EARLY;
                         } else
-                                return SPEEDSTEP_PROCESSOR_PIII_C;
+                                return SPEEDSTEP_CPU_PIII_C;
                 }
 
         default:
@@ -369,7 +396,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
         dprintk("trying to determine both speeds\n");
 
         /* get current speed */
-        prev_speed = speedstep_get_processor_frequency(processor);
+        prev_speed = speedstep_get_frequency(processor);
         if (!prev_speed)
                 return -EIO;
 
@@ -379,7 +406,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
 
         /* switch to low state */
         set_state(SPEEDSTEP_LOW);
-        *low_speed = speedstep_get_processor_frequency(processor);
+        *low_speed = speedstep_get_frequency(processor);
         if (!*low_speed) {
                 ret = -EIO;
                 goto out;
@@ -398,7 +425,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
         if (transition_latency)
                 do_gettimeofday(&tv2);
 
-        *high_speed = speedstep_get_processor_frequency(processor);
+        *high_speed = speedstep_get_frequency(processor);
         if (!*high_speed) {
                 ret = -EIO;
                 goto out;
@@ -426,9 +453,12 @@ unsigned int speedstep_get_freqs(unsigned int processor,
                 /* check if the latency measurement is too high or too low
                  * and set it to a safe value (500uSec) in that case
                  */
-                if (*transition_latency > 10000000 || *transition_latency < 50000) {
-                        printk (KERN_WARNING "speedstep: frequency transition measured seems out of "
-                                        "range (%u nSec), falling back to a safe one of %u nSec.\n",
+                if (*transition_latency > 10000000 ||
+                    *transition_latency < 50000) {
+                        printk(KERN_WARNING PFX "frequency transition "
+                                        "measured seems out of range (%u "
+                                        "nSec), falling back to a safe one of"
+                                        "%u nSec.\n",
                                         *transition_latency, 500000);
                         *transition_latency = 500000;
                 }
@@ -436,15 +466,16 @@ unsigned int speedstep_get_freqs(unsigned int processor,
 
 out:
         local_irq_restore(flags);
-        return (ret);
+        return ret;
 }
 EXPORT_SYMBOL_GPL(speedstep_get_freqs);
 
 #ifdef CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK
 module_param(relaxed_check, int, 0444);
-MODULE_PARM_DESC(relaxed_check, "Don't do all checks for speedstep capability.");
+MODULE_PARM_DESC(relaxed_check,
+                "Don't do all checks for speedstep capability.");
 #endif
 
-MODULE_AUTHOR ("Dominik Brodowski <linux@brodo.de>");
-MODULE_DESCRIPTION ("Library for Intel SpeedStep 1 or 2 cpufreq drivers.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
+MODULE_DESCRIPTION("Library for Intel SpeedStep 1 or 2 cpufreq drivers.");
+MODULE_LICENSE("GPL");