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-rw-r--r--arch/x86/include/asm/msr.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index c89ed6ceed02..ff0c120dafe5 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -109,7 +109,16 @@ notrace static inline int native_write_msr_safe(unsigned int msr,
109extern int rdmsr_safe_regs(u32 regs[8]); 109extern int rdmsr_safe_regs(u32 regs[8]);
110extern int wrmsr_safe_regs(u32 regs[8]); 110extern int wrmsr_safe_regs(u32 regs[8]);
111 111
112static __always_inline unsigned long long native_read_tsc(void) 112/**
113 * rdtsc() - returns the current TSC without ordering constraints
114 *
115 * rdtsc() returns the result of RDTSC as a 64-bit integer. The
116 * only ordering constraint it supplies is the ordering implied by
117 * "asm volatile": it will put the RDTSC in the place you expect. The
118 * CPU can and will speculatively execute that RDTSC, though, so the
119 * results can be non-monotonic if compared on different CPUs.
120 */
121static __always_inline unsigned long long rdtsc(void)
113{ 122{
114 DECLARE_ARGS(val, low, high); 123 DECLARE_ARGS(val, low, high);
115 124