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Diffstat (limited to 'arch/tile/kernel/pci_gx.c')
-rw-r--r--arch/tile/kernel/pci_gx.c35
1 files changed, 16 insertions, 19 deletions
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index b554a68eea1b..9aa238ac7b35 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -108,15 +108,6 @@ static struct pci_ops tile_cfg_ops;
108/* Mask of CPUs that should receive PCIe interrupts. */ 108/* Mask of CPUs that should receive PCIe interrupts. */
109static struct cpumask intr_cpus_map; 109static struct cpumask intr_cpus_map;
110 110
111/* We don't need to worry about the alignment of resources. */
112resource_size_t pcibios_align_resource(void *data, const struct resource *res,
113 resource_size_t size,
114 resource_size_t align)
115{
116 return res->start;
117}
118EXPORT_SYMBOL(pcibios_align_resource);
119
120/* 111/*
121 * Pick a CPU to receive and handle the PCIe interrupts, based on the IRQ #. 112 * Pick a CPU to receive and handle the PCIe interrupts, based on the IRQ #.
122 * For now, we simply send interrupts to non-dataplane CPUs. 113 * For now, we simply send interrupts to non-dataplane CPUs.
@@ -669,6 +660,7 @@ int __init pcibios_init(void)
669 resource_size_t offset; 660 resource_size_t offset;
670 LIST_HEAD(resources); 661 LIST_HEAD(resources);
671 int next_busno; 662 int next_busno;
663 struct pci_host_bridge *bridge;
672 int i; 664 int i;
673 665
674 tile_pci_init(); 666 tile_pci_init();
@@ -881,15 +873,25 @@ int __init pcibios_init(void)
881 controller->mem_offset); 873 controller->mem_offset);
882 pci_add_resource(&resources, &controller->io_space); 874 pci_add_resource(&resources, &controller->io_space);
883 controller->first_busno = next_busno; 875 controller->first_busno = next_busno;
884 bus = pci_scan_root_bus(NULL, next_busno, controller->ops, 876
885 controller, &resources); 877 bridge = pci_alloc_host_bridge(0);
878 if (!bridge)
879 break;
880
881 list_splice_init(&resources, &bridge->windows);
882 bridge->dev.parent = NULL;
883 bridge->sysdata = controller;
884 bridge->busnr = next_busno;
885 bridge->ops = controller->ops;
886 bridge->swizzle_irq = pci_common_swizzle;
887 bridge->map_irq = tile_map_irq;
888
889 pci_scan_root_bus_bridge(bridge);
890 bus = bridge->bus;
886 controller->root_bus = bus; 891 controller->root_bus = bus;
887 next_busno = bus->busn_res.end + 1; 892 next_busno = bus->busn_res.end + 1;
888 } 893 }
889 894
890 /* Do machine dependent PCI interrupt routing */
891 pci_fixup_irqs(pci_common_swizzle, tile_map_irq);
892
893 /* 895 /*
894 * This comes from the generic Linux PCI driver. 896 * This comes from the generic Linux PCI driver.
895 * 897 *
@@ -1038,11 +1040,6 @@ alloc_mem_map_failed:
1038} 1040}
1039subsys_initcall(pcibios_init); 1041subsys_initcall(pcibios_init);
1040 1042
1041/* No bus fixups needed. */
1042void pcibios_fixup_bus(struct pci_bus *bus)
1043{
1044}
1045
1046/* Process any "pci=" kernel boot arguments. */ 1043/* Process any "pci=" kernel boot arguments. */
1047char *__init pcibios_setup(char *str) 1044char *__init pcibios_setup(char *str)
1048{ 1045{