litmus-rt-ext-res.git - LITMUS^RT with extended reservations for Forbidden Zones paper @ RTAS'20

diff options

Diffstat (limited to 'arch/sparc')

-rw-r--r--

arch/sparc/kernel/leon_pci.c

-rw-r--r--

arch/sparc/kernel/pci.c

-rw-r--r--

arch/sparc/kernel/pcic.c

3 files changed, 18 insertions, 28 deletions

 {
         LIST_HEAD(resources);
         struct pci_bus *root_bus;
+        struct pci_host_bridge *bridge;
+        int ret;
+        bridge = pci_alloc_host_bridge(0);
+        if (!bridge)
+                return;
         pci_add_resource_offset(&resources, &info->io_space,
                                 info->io_space.start - 0x1000);
         info->busn.flags = IORESOURCE_BUS;
         pci_add_resource(&resources, &info->busn);
-        root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
+        list_splice_init(&resources, &bridge->windows);
-                                     &resources);
+        bridge->dev.parent = &ofdev->dev;
-        if (!root_bus) {
+        bridge->sysdata = info;
-                pci_free_resource_list(&resources);
+        bridge->busnr = 0;
+        bridge->ops = info->ops;
+        bridge->swizzle_irq = pci_common_swizzle;
+        bridge->map_irq = info->map_irq;
+        ret = pci_scan_root_bus_bridge(bridge);
+        if (ret) {
+                pci_free_host_bridge(bridge);
                 return;
         }
-        /* Setup IRQs of all devices using custom routines */
+        root_bus = bridge->bus;
-        pci_fixup_irqs(pci_common_swizzle, info->map_irq);
         /* Assign devices with resources */
         pci_assign_unassigned_resources();
                 }
         }
 }
-resource_size_t pcibios_align_resource(void *data, const struct resource *res,
-                                resource_size_t size, resource_size_t align)
-{
-        return res->start;
-}
         return bus;
 }
-void pcibios_fixup_bus(struct pci_bus *pbus)
-{
-}
-resource_size_t pcibios_align_resource(void *data, const struct resource *res,
-                                resource_size_t size, resource_size_t align)
-{
-        return res->start;
-}
 int pcibios_enable_device(struct pci_dev *dev, int mask)
 {
         u16 cmd, oldcmd;
 }
 #endif
-resource_size_t pcibios_align_resource(void *data, const struct resource *res,
-                                resource_size_t size, resource_size_t align)
-{
-        return res->start;
-}
 int pcibios_enable_device(struct pci_dev *pdev, int mask)
 {
         return 0;

/* * libata-sff.c - helper library for PCI IDE BMDMA * * Maintained by: Jeff Garzik <jgarzik@pobox.com> * Please ALWAYS copy linux-ide@vger.kernel.org * on emails. * * Copyright 2003-2006 Red Hat, Inc. All rights reserved. * Copyright 2003-2006 Jeff Garzik * * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2, or (at your option) * any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; see the file COPYING. If not, write to * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. * * * libata documentation is available via 'make {ps|pdf}docs', * as Documentation/DocBook/libata.* * * Hardware documentation available from http://www.t13.org/ and * http://www.sata-io.org/ * */ #include <linux/kernel.h> #include <linux/gfp.h> #include <linux/pci.h> #include <linux/libata.h> #include <linux/highmem.h> #include "libata.h" static struct workqueue_struct *ata_sff_wq; const struct ata_port_operations ata_sff_port_ops = { .inherits = &ata_base_port_ops, .qc_prep = ata_noop_qc_prep, .qc_issue = ata_sff_qc_issue, .qc_fill_rtf = ata_sff_qc_fill_rtf, .freeze = ata_sff_freeze, .thaw = ata_sff_thaw, .prereset = ata_sff_prereset, .softreset = ata_sff_softreset, .hardreset = sata_sff_hardreset, .postreset = ata_sff_postreset, .error_handler = ata_sff_error_handler, .sff_dev_select = ata_sff_dev_select, .sff_check_status = ata_sff_check_status, .sff_tf_load = ata_sff_tf_load, .sff_tf_read = ata_sff_tf_read, .sff_exec_command = ata_sff_exec_command, .sff_data_xfer = ata_sff_data_xfer, .sff_drain_fifo = ata_sff_drain_fifo, .lost_interrupt = ata_sff_lost_interrupt, }; EXPORT_SYMBOL_GPL(ata_sff_port_ops); /** * ata_sff_check_status - Read device status reg & clear interrupt * @ap: port where the device is * * Reads ATA taskfile status register for currently-selected device * and return its value. This also clears pending interrupts * from this device * * LOCKING: * Inherited from caller. */ u8 ata_sff_check_status(struct ata_port *ap) { return ioread8(ap->ioaddr.status_addr); } EXPORT_SYMBOL_GPL(ata_sff_check_status); /** * ata_sff_altstatus - Read device alternate status reg * @ap: port where the device is * * Reads ATA taskfile alternate status register for * currently-selected device and return its value. * * Note: may NOT be used as the check_altstatus() entry in * ata_port_operations. * * LOCKING: * Inherited from caller. */ static u8 ata_sff_altstatus(struct ata_port *ap) { if (ap->ops->sff_check_altstatus) return ap->ops->sff_check_altstatus(ap); return ioread8(ap->ioaddr.altstatus_addr); } /** * ata_sff_irq_status - Check if the device is busy * @ap: port where the device is * * Determine if the port is currently busy. Uses altstatus * if available in order to avoid clearing shared IRQ status * when finding an IRQ source. Non ctl capable devices don't * share interrupt lines fortunately for us. * * LOCKING: * Inherited from caller. */ static u8 ata_sff_irq_status(struct ata_port *ap) { u8 status; if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) { status = ata_sff_altstatus(ap); /* Not us: We are busy */ if (status & ATA_BUSY) return status; } /* Clear INTRQ latch */ status = ap->ops->sff_check_status(ap); return status; } /** * ata_sff_sync - Flush writes * @ap: Port to wait for. * * CAUTION: * If we have an mmio device with no ctl and no altstatus * method this will fail. No such devices are known to exist. * * LOCKING: * Inherited from caller. */ static void ata_sff_sync(struct ata_port *ap) { if (ap->ops->sff_check_altstatus) ap->ops->sff_check_altstatus(ap); else if (ap->ioaddr.altstatus_addr) ioread8(ap->ioaddr.altstatus_addr); } /** * ata_sff_pause - Flush writes and wait 400nS * @ap: Port to pause for. * * CAUTION: * If we have an mmio device with no ctl and no altstatus * method this will fail. No such devices are known to exist. * * LOCKING: * Inherited from caller. */ void ata_sff_pause(struct ata_port *ap) { ata_sff_sync(ap); ndelay(400); } EXPORT_SYMBOL_GPL(ata_sff_pause); /** * ata_sff_dma_pause - Pause before commencing DMA * @ap: Port to pause for. * * Perform I/O fencing and ensure sufficient cycle delays occur * for the HDMA1:0 transition */ void ata_sff_dma_pause(struct ata_port *ap) { if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) { /* An altstatus read will cause the needed delay without messing up the IRQ status */ ata_sff_altstatus(ap); return; } /* There are no DMA controllers without ctl. BUG here to ensure we never violate the HDMA1:0 transition timing and risk corruption. */ BUG(); } EXPORT_SYMBOL_GPL(ata_sff_dma_pause); /** * ata_sff_busy_sleep - sleep until BSY clears, or timeout * @ap: port containing status register to be polled * @tmout_pat: impatience timeout in msecs * @tmout: overall timeout in msecs * * Sleep until ATA Status register bit BSY clears, * or a timeout occurs. * * LOCKING: * Kernel thread context (may sleep). * * RETURNS: * 0 on success, -errno otherwise. */ int ata_sff_busy_sleep(struct ata_port *ap, unsigned long tmout_pat, unsigned long tmout) { unsigned long timer_start, timeout; u8 status; status = ata_sff_busy_wait(ap, ATA_BUSY, 300); timer_start = jiffies; timeout = ata_deadline(timer_start, tmout_pat); while (status != 0xff && (status & ATA_BUSY) && time_before(jiffies, timeout)) { ata_msleep(ap, 50); status = ata_sff_busy_wait(ap, ATA_BUSY, 3); } if (status != 0xff && (status & ATA_BUSY)) ata_port_warn(ap, "port is slow to respond, please be patient (Status 0x%x)\n", status); timeout = ata_deadline(timer_start, tmout); while (status != 0xff && (status & ATA_BUSY) && time_before(jiffies, timeout)) { ata_msleep(ap, 50); status = ap->ops->sff_check_status(ap); } if (status == 0xff) return -ENODEV; if (status & ATA_BUSY) { ata_port_err(ap, "port failed to respond (%lu secs, Status 0x%x)\n", DIV_ROUND_UP(tmout, 1000), status); return -EBUSY; } return 0; } EXPORT_SYMBOL_GPL(ata_sff_busy_sleep); static int ata_sff_check_ready(struct ata_link *link) { u8 status = link->ap->ops->sff_check_status(link->ap); return ata_check_ready(status); } /** * ata_sff_wait_ready - sleep until BSY clears, or timeout * @link: SFF link to wait ready status for * @deadline: deadline jiffies for the operation * * Sleep until ATA Status register bit BSY clears, or timeout * occurs. * * LOCKING: * Kernel thread context (may sleep). * * RETURNS: * 0 on success, -errno otherwise. */ int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline) { return ata_wait_ready(link, deadline, ata_sff_check_ready); } EXPORT_SYMBOL_GPL(ata_sff_wait_ready); /** * ata_sff_set_devctl - Write device control reg * @ap: port where the device is * @ctl: value to write * * Writes ATA taskfile device control register. * * Note: may NOT be used as the sff_set_devctl() entry in * ata_port_operations. * * LOCKING: * Inherited from caller. */ static void ata_sff_set_devctl(struct ata_port *ap, u8 ctl) { if (ap->ops->sff_set_devctl) ap->ops->sff_set_devctl(ap, ctl); else iowrite8(ctl, ap->ioaddr.ctl_addr); } /** * ata_sff_dev_select - Select device 0/1 on ATA bus * @ap: ATA channel to manipulate * @device: ATA device (numbered from zero) to select * * Use the method defined in the ATA specification to * make either device 0, or device 1, active on the * ATA channel. Works with both PIO and MMIO. * * May be used as the dev_select() entry in ata_port_operations. * * LOCKING: * caller. */ void ata_sff_dev_select(struct ata_port *ap, unsigned int device) { u8 tmp; if (device == 0) tmp = ATA_DEVICE_OBS; else tmp = ATA_DEVICE_OBS | ATA_DEV1; iowrite8(tmp, ap->ioaddr.device_addr); ata_sff_pause(ap); /* needed; also flushes, for mmio */ } EXPORT_SYMBOL_GPL(ata_sff_dev_select); /** * ata_dev_select - Select device 0/1 on ATA bus * @ap: ATA channel to manipulate * @device: ATA device (numbered from zero) to select * @wait: non-zero to wait for Status register BSY bit to clear * @can_sleep: non-zero if context allows sleeping * * Use the method defined in the ATA specification to * make either device 0, or device 1, active on the * ATA channel. * * This is a high-level version of ata_sff_dev_select(), which * additionally provides the services of inserting the proper * pauses and status polling, where needed. * * LOCKING: * caller. */ static void ata_dev_select(struct ata_port *ap, unsigned int device, unsigned int wait, unsigned int can_sleep) { if (ata_msg_probe(ap)) ata_port_info(ap, "ata_dev_select: ENTER, device %u, wait %u\n", device, wait); if (wait) ata_wait_idle(ap); ap->ops->sff_dev_select(ap, device); if (wait) { if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) ata_msleep(ap, 150); ata_wait_idle(ap); } } /** * ata_sff_irq_on - Enable interrupts on a port. * @ap: Port on which interrupts are enabled. * * Enable interrupts on a legacy IDE device using MMIO or PIO, * wait for idle, clear any pending interrupts. * * Note: may NOT be used as the sff_irq_on() entry in * ata_port_operations. * * LOCKING: * Inherited from caller. */ void ata_sff_irq_on(struct ata_port *ap) { struct ata_ioports *ioaddr = &ap->ioaddr; if (ap->ops->sff_irq_on) { ap->ops->sff_irq_on(ap); return; } ap->ctl &= ~ATA_NIEN; ap->last_ctl = ap->ctl; if (ap->ops->sff_set_devctl || ioaddr->ctl_addr) ata_sff_set_devctl(ap, ap->ctl); ata_wait_idle(ap); if (ap->ops->sff_irq_clear) ap->ops->sff_irq_clear(ap); } EXPORT_SYMBOL_GPL(ata_sff_irq_on); /** * ata_sff_tf_load - send taskfile registers to host controller * @ap: Port to which output is sent * @tf: ATA taskfile register set * * Outputs ATA taskfile to standard ATA host controller. * * LOCKING: * Inherited from caller. */ void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) { struct ata_ioports *ioaddr = &ap->ioaddr; unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; if (tf->ctl != ap->last_ctl) { if (ioaddr->ctl_addr) iowrite8(tf->ctl, ioaddr->ctl_addr); ap->last_ctl = tf->ctl; ata_wait_idle(ap); } if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { WARN_ON_ONCE(!ioaddr->ctl_addr); iowrite8(tf->hob_feature, ioaddr->feature_addr); iowrite8(tf->hob_nsect, ioaddr->nsect_addr); iowrite8(tf->hob_lbal, ioaddr->lbal_addr); iowrite8(tf->hob_lbam, ioaddr->lbam_addr); iowrite8(tf->hob_lbah, ioaddr->lbah_addr); VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", tf->hob_feature, tf->hob_nsect, tf->hob_lbal, tf->hob_lbam, tf->hob_lbah); } if (is_addr) { iowrite8(tf->feature, ioaddr->feature_addr); iowrite8(tf->nsect, ioaddr->nsect_addr); iowrite8(tf->lbal, ioaddr->lbal_addr); iowrite8(tf->lbam, ioaddr->lbam_addr); iowrite8(tf->lbah, ioaddr->lbah_addr); VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", tf->feature, tf->nsect, tf->lbal, tf->lbam, tf->lbah); } if (tf->flags & ATA_TFLAG_DEVICE) { iowrite8(tf->device, ioaddr->device_addr); VPRINTK("device 0x%X\n", tf->device); } ata_wait_idle(ap); } EXPORT_SYMBOL_GPL(ata_sff_tf_load); /** * ata_sff_tf_read - input device's ATA taskfile shadow registers * @ap: Port from which input is read * @tf: ATA taskfile register set for storing input * * Reads ATA taskfile registers for currently-selected device * into @tf. Assumes the device has a fully SFF compliant task file * layout and behaviour. If you device does not (eg has a different * status method) then you will need to provide a replacement tf_read * * LOCKING: * Inherited from caller. */ void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf) { struct ata_ioports *ioaddr = &ap->ioaddr; tf->command = ata_sff_check_status(ap); tf->feature = ioread8(ioaddr->error_addr); tf->nsect = ioread8(ioaddr->nsect_addr); tf->lbal = ioread8(ioaddr->lbal_addr); tf->lbam = ioread8(ioaddr->lbam_addr); tf->lbah = ioread8(ioaddr->lbah_addr); tf->device = ioread8(ioaddr->device_addr); if (tf->flags & ATA_TFLAG_LBA48) { if (likely(ioaddr->ctl_addr)) { iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr); tf->hob_feature = ioread8(ioaddr->error_addr); tf->hob_nsect = ioread8(ioaddr->nsect_addr); tf->hob_lbal = ioread8(ioaddr->lbal_addr); tf->hob_lbam = ioread8(ioaddr->lbam_addr); tf->hob_lbah = ioread8(ioaddr->lbah_addr); iowrite8(tf->ctl, ioaddr->ctl_addr); ap->last_ctl = tf->ctl; } else WARN_ON_ONCE(1); } } EXPORT_SYMBOL_GPL(ata_sff_tf_read); /** * ata_sff_exec_command - issue ATA command to host controller * @ap: port to which command is being issued * @tf: ATA taskfile register set * * Issues ATA command, with proper synchronization with interrupt * handler / other threads. * * LOCKING: * spin_lock_irqsave(host lock) */ void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf) { DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command); iowrite8(tf->command, ap->ioaddr.command_addr); ata_sff_pause(ap); } EXPORT_SYMBOL_GPL(ata_sff_exec_command); /** * ata_tf_to_host - issue ATA taskfile to host controller * @ap: port to which command is being issued * @tf: ATA taskfile register set * * Issues ATA taskfile register set to ATA host controller, * with proper synchronization with interrupt handler and * other threads. * * LOCKING: * spin_lock_irqsave(host lock) */ static inline void ata_tf_to_host(struct ata_port *ap, const struct ata_taskfile *tf) { ap->ops->sff_tf_load(ap, tf); ap->ops->sff_exec_command(ap, tf); } /** * ata_sff_data_xfer - Transfer data by PIO * @dev: device to target * @buf: data buffer * @buflen: buffer length * @rw: read/write * * Transfer data from/to the device data register by PIO. * * LOCKING: * Inherited from caller. * * RETURNS: * Bytes consumed. */ unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf, unsigned int buflen, int rw) { struct ata_port *ap = dev->link->ap; void __iomem *data_addr = ap->ioaddr.data_addr; unsigned int words = buflen >> 1; /* Transfer multiple of 2 bytes */ if (rw == READ) ioread16_rep(data_addr, buf, words); else iowrite16_rep(data_addr, buf, words); /* Transfer trailing byte, if any. */ if (unlikely(buflen & 0x01)) { unsigned char pad[2]; /* Point buf to the tail of buffer */ buf += buflen - 1; /* * Use io*16_rep() accessors here as well to avoid pointlessly * swapping bytes to and from on the big endian machines... */ if (rw == READ) { ioread16_rep(data_addr, pad, 1); *buf = pad[0]; } else { pad[0] = *buf; iowrite16_rep(data_addr, pad, 1); } words++; } return words << 1; } EXPORT_SYMBOL_GPL(ata_sff_data_xfer); /** * ata_sff_data_xfer32 - Transfer data by PIO * @dev: device to target * @buf: data buffer * @buflen: buffer length * @rw: read/write * * Transfer data from/to the device data register by PIO using 32bit * I/O operations. * * LOCKING: * Inherited from caller. * * RETURNS: * Bytes consumed. */ unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf, unsigned int buflen, int rw) { struct ata_port *ap = dev->link->ap; void __iomem *data_addr = ap->ioaddr.data_addr; unsigned int words = buflen >> 2; int slop = buflen & 3; if (!(ap->pflags & ATA_PFLAG_PIO32)) return ata_sff_data_xfer(dev, buf, buflen, rw); /* Transfer multiple of 4 bytes */ if (rw == READ) ioread32_rep(data_addr, buf, words); else iowrite32_rep(data_addr, buf, words); /* Transfer trailing bytes, if any */ if (unlikely(slop)) { unsigned char pad[4]; /* Point buf to the tail of buffer */ buf += buflen - slop; /* * Use io*_rep() accessors here as well to avoid pointlessly * swapping bytes to and from on the big endian machines... */ if (rw == READ) { if (slop < 3) ioread16_rep(data_addr, pad, 1); else ioread32_rep(data_addr, pad, 1); memcpy(buf, pad, slop); } else { memcpy(pad, buf, slop); if (slop < 3) iowrite16_rep(data_addr, pad, 1); else iowrite32_rep(data_addr, pad, 1); } } return (buflen + 1) & ~1; } EXPORT_SYMBOL_GPL(ata_sff_data_xfer32); /** * ata_sff_data_xfer_noirq - Transfer data by PIO * @dev: device to target * @buf: data buffer * @buflen: buffer length * @rw: read/write * * Transfer data from/to the device data register by PIO. Do the * transfer with interrupts disabled. * * LOCKING: * Inherited from caller. * * RETURNS: * Bytes consumed. */ unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf, unsigned int buflen, int rw) { unsigned long flags; unsigned int consumed; local_irq_save(flags); consumed = ata_sff_data_xfer(dev, buf, buflen, rw); local_irq_restore(flags); return consumed; } EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq); /** * ata_pio_sector - Transfer a sector of data. * @qc: Command on going * * Transfer qc->sect_size bytes of data from/to the ATA device. * * LOCKING: * Inherited from caller. */ static void ata_pio_sector(struct ata_queued_cmd *qc) { int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); struct ata_port *ap = qc->ap; struct page *page; unsigned int offset; unsigned char *buf; if (qc->curbytes == qc->nbytes - qc->sect_size) ap->hsm_task_state = HSM_ST_LAST; page = sg_page(qc->cursg); offset = qc->cursg->offset + qc->cursg_ofs; /* get the current page and offset */ page = nth_page(page, (offset >> PAGE_SHIFT)); offset %= PAGE_SIZE; DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); if (PageHighMem(page)) { unsigned long flags; /* FIXME: use a bounce buffer */ local_irq_save(flags); buf = kmap_atomic(page, KM_IRQ0); /* do the actual data transfer */ ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); kunmap_atomic(buf, KM_IRQ0); local_irq_restore(flags); } else { buf = page_address(page); ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); } if (!do_write && !PageSlab(page)) flush_dcache_page(page); qc->curbytes += qc->sect_size; qc->cursg_ofs += qc->sect_size; if (qc->cursg_ofs == qc->cursg->length) { qc->cursg = sg_next(qc->cursg); qc->cursg_ofs = 0; } } /** * ata_pio_sectors - Transfer one or many sectors. * @qc: Command on going * * Transfer one or many sectors of data from/to the * ATA device for the DRQ request. * * LOCKING: * Inherited from caller. */ static void ata_pio_sectors(struct ata_queued_cmd *qc) { if (is_multi_taskfile(&qc->tf)) { /* READ/WRITE MULTIPLE */ unsigned int nsect; WARN_ON_ONCE(qc->dev->multi_count == 0); nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, qc->dev->multi_count); while (nsect--) ata_pio_sector(qc); } else ata_pio_sector(qc); ata_sff_sync(qc->ap); /* flush */ } /** * atapi_send_cdb - Write CDB bytes to hardware * @ap: Port to which ATAPI device is attached. * @qc: Taskfile currently active * * When device has indicated its readiness to accept * a CDB, this function is called. Send the CDB. * * LOCKING: * caller. */ static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) { /* send SCSI cdb */ DPRINTK("send cdb\n"); WARN_ON_ONCE(qc->dev->cdb_len < 12); ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); ata_sff_sync(ap); /* FIXME: If the CDB is for DMA do we need to do the transition delay or is bmdma_start guaranteed to do it ? */ switch (qc->tf.protocol) { case ATAPI_PROT_PIO: ap->hsm_task_state = HSM_ST; break; case ATAPI_PROT_NODATA: ap->hsm_task_state = HSM_ST_LAST; break; #ifdef CONFIG_ATA_BMDMA case ATAPI_PROT_DMA: ap->hsm_task_state = HSM_ST_LAST; /* initiate bmdma */ ap->ops->bmdma_start(qc); break; #endif /* CONFIG_ATA_BMDMA */ default: BUG(); } } /** * __atapi_pio_bytes - Transfer data from/to the ATAPI device. * @qc: Command on going * @bytes: number of bytes * * Transfer Transfer data from/to the ATAPI device. * * LOCKING: * Inherited from caller. * */ static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) { int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ; struct ata_port *ap = qc->ap; struct ata_device *dev = qc->dev; struct ata_eh_info *ehi = &dev->link->eh_info; struct scatterlist *sg; struct page *page; unsigned char *buf; unsigned int offset, count, consumed; next_sg: sg = qc->cursg; if (unlikely(!sg)) { ata_ehi_push_desc(ehi, "unexpected or too much trailing data " "buf=%u cur=%u bytes=%u", qc->nbytes, qc->curbytes, bytes); return -1; } page = sg_page(sg); offset = sg->offset + qc->cursg_ofs; /* get the current page and offset */ page = nth_page(page, (offset >> PAGE_SHIFT)); offset %= PAGE_SIZE; /* don't overrun current sg */ count = min(sg->length - qc->cursg_ofs, bytes); /* don't cross page boundaries */ count = min(count, (unsigned int)PAGE_SIZE - offset); DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); if (PageHighMem(page)) { unsigned long flags; /* FIXME: use bounce buffer */ local_irq_save(flags); buf = kmap_atomic(page, KM_IRQ0); /* do the actual data transfer */ consumed = ap->ops->sff_data_xfer(dev, buf + offset, count, rw); kunmap_atomic(buf, KM_IRQ0); local_irq_restore(flags); } else { buf = page_address(page); consumed = ap->ops->sff_data_xfer(dev, buf + offset, count, rw); } bytes -= min(bytes, consumed); qc->curbytes += count; qc->cursg_ofs += count; if (qc->cursg_ofs == sg->length) { qc->cursg = sg_next(qc->cursg); qc->cursg_ofs = 0; } /* * There used to be a WARN_ON_ONCE(qc->cursg && count != consumed); * Unfortunately __atapi_pio_bytes doesn't know enough to do the WARN * check correctly as it doesn't know if it is the last request being * made. Somebody should implement a proper sanity check. */ if (bytes) goto next_sg; return 0; } /** * atapi_pio_bytes - Transfer data from/to the ATAPI device. * @qc: Command on going * * Transfer Transfer data from/to the ATAPI device. * * LOCKING: * Inherited from caller. */


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