diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7786.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c index 71673487ace0..7e585320710a 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c | |||
@@ -867,14 +867,14 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7786-irl4567", vectors_irl4567, | |||
867 | void __init plat_irq_setup(void) | 867 | void __init plat_irq_setup(void) |
868 | { | 868 | { |
869 | /* disable IRQ3-0 + IRQ7-4 */ | 869 | /* disable IRQ3-0 + IRQ7-4 */ |
870 | ctrl_outl(0xff000000, INTC_INTMSK0); | 870 | __raw_writel(0xff000000, INTC_INTMSK0); |
871 | 871 | ||
872 | /* disable IRL3-0 + IRL7-4 */ | 872 | /* disable IRL3-0 + IRL7-4 */ |
873 | ctrl_outl(0xc0000000, INTC_INTMSK1); | 873 | __raw_writel(0xc0000000, INTC_INTMSK1); |
874 | ctrl_outl(0xfffefffe, INTC_INTMSK2); | 874 | __raw_writel(0xfffefffe, INTC_INTMSK2); |
875 | 875 | ||
876 | /* select IRL mode for IRL3-0 + IRL7-4 */ | 876 | /* select IRL mode for IRL3-0 + IRL7-4 */ |
877 | ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); | 877 | __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0); |
878 | 878 | ||
879 | register_intc_controller(&intc_desc); | 879 | register_intc_controller(&intc_desc); |
880 | } | 880 | } |
@@ -884,32 +884,32 @@ void __init plat_irq_setup_pins(int mode) | |||
884 | switch (mode) { | 884 | switch (mode) { |
885 | case IRQ_MODE_IRQ7654: | 885 | case IRQ_MODE_IRQ7654: |
886 | /* select IRQ mode for IRL7-4 */ | 886 | /* select IRQ mode for IRL7-4 */ |
887 | ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0); | 887 | __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0); |
888 | register_intc_controller(&intc_desc_irq4567); | 888 | register_intc_controller(&intc_desc_irq4567); |
889 | break; | 889 | break; |
890 | case IRQ_MODE_IRQ3210: | 890 | case IRQ_MODE_IRQ3210: |
891 | /* select IRQ mode for IRL3-0 */ | 891 | /* select IRQ mode for IRL3-0 */ |
892 | ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0); | 892 | __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0); |
893 | register_intc_controller(&intc_desc_irq0123); | 893 | register_intc_controller(&intc_desc_irq0123); |
894 | break; | 894 | break; |
895 | case IRQ_MODE_IRL7654: | 895 | case IRQ_MODE_IRL7654: |
896 | /* enable IRL7-4 but don't provide any masking */ | 896 | /* enable IRL7-4 but don't provide any masking */ |
897 | ctrl_outl(0x40000000, INTC_INTMSKCLR1); | 897 | __raw_writel(0x40000000, INTC_INTMSKCLR1); |
898 | ctrl_outl(0x0000fffe, INTC_INTMSKCLR2); | 898 | __raw_writel(0x0000fffe, INTC_INTMSKCLR2); |
899 | break; | 899 | break; |
900 | case IRQ_MODE_IRL3210: | 900 | case IRQ_MODE_IRL3210: |
901 | /* enable IRL0-3 but don't provide any masking */ | 901 | /* enable IRL0-3 but don't provide any masking */ |
902 | ctrl_outl(0x80000000, INTC_INTMSKCLR1); | 902 | __raw_writel(0x80000000, INTC_INTMSKCLR1); |
903 | ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); | 903 | __raw_writel(0xfffe0000, INTC_INTMSKCLR2); |
904 | break; | 904 | break; |
905 | case IRQ_MODE_IRL7654_MASK: | 905 | case IRQ_MODE_IRL7654_MASK: |
906 | /* enable IRL7-4 and mask using cpu intc controller */ | 906 | /* enable IRL7-4 and mask using cpu intc controller */ |
907 | ctrl_outl(0x40000000, INTC_INTMSKCLR1); | 907 | __raw_writel(0x40000000, INTC_INTMSKCLR1); |
908 | register_intc_controller(&intc_desc_irl4567); | 908 | register_intc_controller(&intc_desc_irl4567); |
909 | break; | 909 | break; |
910 | case IRQ_MODE_IRL3210_MASK: | 910 | case IRQ_MODE_IRL3210_MASK: |
911 | /* enable IRL0-3 and mask using cpu intc controller */ | 911 | /* enable IRL0-3 and mask using cpu intc controller */ |
912 | ctrl_outl(0x80000000, INTC_INTMSKCLR1); | 912 | __raw_writel(0x80000000, INTC_INTMSKCLR1); |
913 | register_intc_controller(&intc_desc_irl0123); | 913 | register_intc_controller(&intc_desc_irl0123); |
914 | break; | 914 | break; |
915 | default: | 915 | default: |