1 files changed, 32 insertions, 32 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 7b24ec4b409a..18bcd70cd813 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -123,28 +123,28 @@ static const struct sh_dmae_slave_config sh7757_dmae0_slaves[] = {
        {
                .slave_id       = SHDMA_SLAVE_SDHI_TX,
                .addr           = 0x1fe50030,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_16BIT),
                .mid_rid        = 0xc5,
        },
        {
                .slave_id       = SHDMA_SLAVE_SDHI_RX,
                .addr           = 0x1fe50030,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_16BIT),
                .mid_rid        = 0xc6,
        },
        {
                .slave_id       = SHDMA_SLAVE_MMCIF_TX,
                .addr           = 0x1fcb0034,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_32BIT),
                .mid_rid        = 0xd3,
        },
        {
                .slave_id       = SHDMA_SLAVE_MMCIF_RX,
                .addr           = 0x1fcb0034,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_32BIT),
                .mid_rid        = 0xd7,
        },
@@ -154,56 +154,56 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
        {
                .slave_id       = SHDMA_SLAVE_SCIF2_TX,
                .addr           = 0x1f4b000c,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x21,
        },
        {
                .slave_id       = SHDMA_SLAVE_SCIF2_RX,
                .addr           = 0x1f4b0014,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x22,
        },
        {
                .slave_id       = SHDMA_SLAVE_SCIF3_TX,
                .addr           = 0x1f4c000c,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x29,
        },
        {
                .slave_id       = SHDMA_SLAVE_SCIF3_RX,
                .addr           = 0x1f4c0014,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x2a,
        },
        {
                .slave_id       = SHDMA_SLAVE_SCIF4_TX,
                .addr           = 0x1f4d000c,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x41,
        },
        {
                .slave_id       = SHDMA_SLAVE_SCIF4_RX,
                .addr           = 0x1f4d0014,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x42,
        },
        {
                .slave_id       = SHDMA_SLAVE_RSPI_TX,
                .addr           = 0xfe480004,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_16BIT),
                .mid_rid        = 0xc1,
        },
        {
                .slave_id       = SHDMA_SLAVE_RSPI_RX,
                .addr           = 0xfe480004,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_16BIT),
                .mid_rid        = 0xc2,
        },
@@ -213,70 +213,70 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
        {
                .slave_id       = SHDMA_SLAVE_RIIC0_TX,
                .addr           = 0x1e500012,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x21,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC0_RX,
                .addr           = 0x1e500013,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x22,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC1_TX,
                .addr           = 0x1e510012,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x29,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC1_RX,
                .addr           = 0x1e510013,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x2a,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC2_TX,
                .addr           = 0x1e520012,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0xa1,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC2_RX,
                .addr           = 0x1e520013,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0xa2,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC3_TX,
                .addr           = 0x1e530012,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0xa9,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC3_RX,
                .addr           = 0x1e530013,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0xaf,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC4_TX,
                .addr           = 0x1e540012,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0xc5,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC4_RX,
                .addr           = 0x1e540013,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0xc6,
        },
@@ -286,70 +286,70 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
        {
                .slave_id       = SHDMA_SLAVE_RIIC5_TX,
                .addr           = 0x1e550012,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x21,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC5_RX,
                .addr           = 0x1e550013,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x22,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC6_TX,
                .addr           = 0x1e560012,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x29,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC6_RX,
                .addr           = 0x1e560013,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x2a,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC7_TX,
                .addr           = 0x1e570012,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x41,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC7_RX,
                .addr           = 0x1e570013,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x42,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC8_TX,
                .addr           = 0x1e580012,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x45,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC8_RX,
                .addr           = 0x1e580013,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x46,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC9_TX,
                .addr           = 0x1e590012,
-                .chcr           = SM_INC | 0x800 | 0x40000000 |
+                .chcr           = SM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x51,
        },
        {
                .slave_id       = SHDMA_SLAVE_RIIC9_RX,
                .addr           = 0x1e590013,
-                .chcr           = DM_INC | 0x800 | 0x40000000 |
+                .chcr           = DM_INC | RS_ERS | 0x40000000 |
                                  TS_INDEX2VAL(XMIT_SZ_8BIT),
                .mid_rid        = 0x52,
        },

diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c index 7b24ec4b409a..18bcd70cd813 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -123,28 +123,28 @@ static const struct sh_dmae_slave_config sh7757_dmae0_slaves[] = {
123	{	123	{
124	.slave_id = SHDMA_SLAVE_SDHI_TX,	124	.slave_id = SHDMA_SLAVE_SDHI_TX,
125	.addr = 0x1fe50030,	125	.addr = 0x1fe50030,
126	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	126	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
127	TS_INDEX2VAL(XMIT_SZ_16BIT),	127	TS_INDEX2VAL(XMIT_SZ_16BIT),
128	.mid_rid = 0xc5,	128	.mid_rid = 0xc5,
129	},	129	},
130	{	130	{
131	.slave_id = SHDMA_SLAVE_SDHI_RX,	131	.slave_id = SHDMA_SLAVE_SDHI_RX,
132	.addr = 0x1fe50030,	132	.addr = 0x1fe50030,
133	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	133	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
134	TS_INDEX2VAL(XMIT_SZ_16BIT),	134	TS_INDEX2VAL(XMIT_SZ_16BIT),
135	.mid_rid = 0xc6,	135	.mid_rid = 0xc6,
136	},	136	},
137	{	137	{
138	.slave_id = SHDMA_SLAVE_MMCIF_TX,	138	.slave_id = SHDMA_SLAVE_MMCIF_TX,
139	.addr = 0x1fcb0034,	139	.addr = 0x1fcb0034,
140	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	140	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
141	TS_INDEX2VAL(XMIT_SZ_32BIT),	141	TS_INDEX2VAL(XMIT_SZ_32BIT),
142	.mid_rid = 0xd3,	142	.mid_rid = 0xd3,
143	},	143	},
144	{	144	{
145	.slave_id = SHDMA_SLAVE_MMCIF_RX,	145	.slave_id = SHDMA_SLAVE_MMCIF_RX,
146	.addr = 0x1fcb0034,	146	.addr = 0x1fcb0034,
147	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	147	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
148	TS_INDEX2VAL(XMIT_SZ_32BIT),	148	TS_INDEX2VAL(XMIT_SZ_32BIT),
149	.mid_rid = 0xd7,	149	.mid_rid = 0xd7,
150	},	150	},
@@ -154,56 +154,56 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
154	{	154	{
155	.slave_id = SHDMA_SLAVE_SCIF2_TX,	155	.slave_id = SHDMA_SLAVE_SCIF2_TX,
156	.addr = 0x1f4b000c,	156	.addr = 0x1f4b000c,
157	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	157	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
158	TS_INDEX2VAL(XMIT_SZ_8BIT),	158	TS_INDEX2VAL(XMIT_SZ_8BIT),
159	.mid_rid = 0x21,	159	.mid_rid = 0x21,
160	},	160	},
161	{	161	{
162	.slave_id = SHDMA_SLAVE_SCIF2_RX,	162	.slave_id = SHDMA_SLAVE_SCIF2_RX,
163	.addr = 0x1f4b0014,	163	.addr = 0x1f4b0014,
164	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	164	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
165	TS_INDEX2VAL(XMIT_SZ_8BIT),	165	TS_INDEX2VAL(XMIT_SZ_8BIT),
166	.mid_rid = 0x22,	166	.mid_rid = 0x22,
167	},	167	},
168	{	168	{
169	.slave_id = SHDMA_SLAVE_SCIF3_TX,	169	.slave_id = SHDMA_SLAVE_SCIF3_TX,
170	.addr = 0x1f4c000c,	170	.addr = 0x1f4c000c,
171	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	171	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
172	TS_INDEX2VAL(XMIT_SZ_8BIT),	172	TS_INDEX2VAL(XMIT_SZ_8BIT),
173	.mid_rid = 0x29,	173	.mid_rid = 0x29,
174	},	174	},
175	{	175	{
176	.slave_id = SHDMA_SLAVE_SCIF3_RX,	176	.slave_id = SHDMA_SLAVE_SCIF3_RX,
177	.addr = 0x1f4c0014,	177	.addr = 0x1f4c0014,
178	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	178	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
179	TS_INDEX2VAL(XMIT_SZ_8BIT),	179	TS_INDEX2VAL(XMIT_SZ_8BIT),
180	.mid_rid = 0x2a,	180	.mid_rid = 0x2a,
181	},	181	},
182	{	182	{
183	.slave_id = SHDMA_SLAVE_SCIF4_TX,	183	.slave_id = SHDMA_SLAVE_SCIF4_TX,
184	.addr = 0x1f4d000c,	184	.addr = 0x1f4d000c,
185	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	185	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
186	TS_INDEX2VAL(XMIT_SZ_8BIT),	186	TS_INDEX2VAL(XMIT_SZ_8BIT),
187	.mid_rid = 0x41,	187	.mid_rid = 0x41,
188	},	188	},
189	{	189	{
190	.slave_id = SHDMA_SLAVE_SCIF4_RX,	190	.slave_id = SHDMA_SLAVE_SCIF4_RX,
191	.addr = 0x1f4d0014,	191	.addr = 0x1f4d0014,
192	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	192	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
193	TS_INDEX2VAL(XMIT_SZ_8BIT),	193	TS_INDEX2VAL(XMIT_SZ_8BIT),
194	.mid_rid = 0x42,	194	.mid_rid = 0x42,
195	},	195	},
196	{	196	{
197	.slave_id = SHDMA_SLAVE_RSPI_TX,	197	.slave_id = SHDMA_SLAVE_RSPI_TX,
198	.addr = 0xfe480004,	198	.addr = 0xfe480004,
199	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	199	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
200	TS_INDEX2VAL(XMIT_SZ_16BIT),	200	TS_INDEX2VAL(XMIT_SZ_16BIT),
201	.mid_rid = 0xc1,	201	.mid_rid = 0xc1,
202	},	202	},
203	{	203	{
204	.slave_id = SHDMA_SLAVE_RSPI_RX,	204	.slave_id = SHDMA_SLAVE_RSPI_RX,
205	.addr = 0xfe480004,	205	.addr = 0xfe480004,
206	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	206	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
207	TS_INDEX2VAL(XMIT_SZ_16BIT),	207	TS_INDEX2VAL(XMIT_SZ_16BIT),
208	.mid_rid = 0xc2,	208	.mid_rid = 0xc2,
209	},	209	},
@@ -213,70 +213,70 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
213	{	213	{
214	.slave_id = SHDMA_SLAVE_RIIC0_TX,	214	.slave_id = SHDMA_SLAVE_RIIC0_TX,
215	.addr = 0x1e500012,	215	.addr = 0x1e500012,
216	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	216	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
217	TS_INDEX2VAL(XMIT_SZ_8BIT),	217	TS_INDEX2VAL(XMIT_SZ_8BIT),
218	.mid_rid = 0x21,	218	.mid_rid = 0x21,
219	},	219	},
220	{	220	{
221	.slave_id = SHDMA_SLAVE_RIIC0_RX,	221	.slave_id = SHDMA_SLAVE_RIIC0_RX,
222	.addr = 0x1e500013,	222	.addr = 0x1e500013,
223	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	223	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
224	TS_INDEX2VAL(XMIT_SZ_8BIT),	224	TS_INDEX2VAL(XMIT_SZ_8BIT),
225	.mid_rid = 0x22,	225	.mid_rid = 0x22,
226	},	226	},
227	{	227	{
228	.slave_id = SHDMA_SLAVE_RIIC1_TX,	228	.slave_id = SHDMA_SLAVE_RIIC1_TX,
229	.addr = 0x1e510012,	229	.addr = 0x1e510012,
230	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	230	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
231	TS_INDEX2VAL(XMIT_SZ_8BIT),	231	TS_INDEX2VAL(XMIT_SZ_8BIT),
232	.mid_rid = 0x29,	232	.mid_rid = 0x29,
233	},	233	},
234	{	234	{
235	.slave_id = SHDMA_SLAVE_RIIC1_RX,	235	.slave_id = SHDMA_SLAVE_RIIC1_RX,
236	.addr = 0x1e510013,	236	.addr = 0x1e510013,
237	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	237	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
238	TS_INDEX2VAL(XMIT_SZ_8BIT),	238	TS_INDEX2VAL(XMIT_SZ_8BIT),
239	.mid_rid = 0x2a,	239	.mid_rid = 0x2a,
240	},	240	},
241	{	241	{
242	.slave_id = SHDMA_SLAVE_RIIC2_TX,	242	.slave_id = SHDMA_SLAVE_RIIC2_TX,
243	.addr = 0x1e520012,	243	.addr = 0x1e520012,
244	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	244	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
245	TS_INDEX2VAL(XMIT_SZ_8BIT),	245	TS_INDEX2VAL(XMIT_SZ_8BIT),
246	.mid_rid = 0xa1,	246	.mid_rid = 0xa1,
247	},	247	},
248	{	248	{
249	.slave_id = SHDMA_SLAVE_RIIC2_RX,	249	.slave_id = SHDMA_SLAVE_RIIC2_RX,
250	.addr = 0x1e520013,	250	.addr = 0x1e520013,
251	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	251	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
252	TS_INDEX2VAL(XMIT_SZ_8BIT),	252	TS_INDEX2VAL(XMIT_SZ_8BIT),
253	.mid_rid = 0xa2,	253	.mid_rid = 0xa2,
254	},	254	},
255	{	255	{
256	.slave_id = SHDMA_SLAVE_RIIC3_TX,	256	.slave_id = SHDMA_SLAVE_RIIC3_TX,
257	.addr = 0x1e530012,	257	.addr = 0x1e530012,
258	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	258	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
259	TS_INDEX2VAL(XMIT_SZ_8BIT),	259	TS_INDEX2VAL(XMIT_SZ_8BIT),
260	.mid_rid = 0xa9,	260	.mid_rid = 0xa9,
261	},	261	},
262	{	262	{
263	.slave_id = SHDMA_SLAVE_RIIC3_RX,	263	.slave_id = SHDMA_SLAVE_RIIC3_RX,
264	.addr = 0x1e530013,	264	.addr = 0x1e530013,
265	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	265	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
266	TS_INDEX2VAL(XMIT_SZ_8BIT),	266	TS_INDEX2VAL(XMIT_SZ_8BIT),
267	.mid_rid = 0xaf,	267	.mid_rid = 0xaf,
268	},	268	},
269	{	269	{
270	.slave_id = SHDMA_SLAVE_RIIC4_TX,	270	.slave_id = SHDMA_SLAVE_RIIC4_TX,
271	.addr = 0x1e540012,	271	.addr = 0x1e540012,
272	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	272	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
273	TS_INDEX2VAL(XMIT_SZ_8BIT),	273	TS_INDEX2VAL(XMIT_SZ_8BIT),
274	.mid_rid = 0xc5,	274	.mid_rid = 0xc5,
275	},	275	},
276	{	276	{
277	.slave_id = SHDMA_SLAVE_RIIC4_RX,	277	.slave_id = SHDMA_SLAVE_RIIC4_RX,
278	.addr = 0x1e540013,	278	.addr = 0x1e540013,
279	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	279	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
280	TS_INDEX2VAL(XMIT_SZ_8BIT),	280	TS_INDEX2VAL(XMIT_SZ_8BIT),
281	.mid_rid = 0xc6,	281	.mid_rid = 0xc6,
282	},	282	},
@@ -286,70 +286,70 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
286	{	286	{
287	.slave_id = SHDMA_SLAVE_RIIC5_TX,	287	.slave_id = SHDMA_SLAVE_RIIC5_TX,
288	.addr = 0x1e550012,	288	.addr = 0x1e550012,
289	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	289	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
290	TS_INDEX2VAL(XMIT_SZ_8BIT),	290	TS_INDEX2VAL(XMIT_SZ_8BIT),
291	.mid_rid = 0x21,	291	.mid_rid = 0x21,
292	},	292	},
293	{	293	{
294	.slave_id = SHDMA_SLAVE_RIIC5_RX,	294	.slave_id = SHDMA_SLAVE_RIIC5_RX,
295	.addr = 0x1e550013,	295	.addr = 0x1e550013,
296	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	296	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
297	TS_INDEX2VAL(XMIT_SZ_8BIT),	297	TS_INDEX2VAL(XMIT_SZ_8BIT),
298	.mid_rid = 0x22,	298	.mid_rid = 0x22,
299	},	299	},
300	{	300	{
301	.slave_id = SHDMA_SLAVE_RIIC6_TX,	301	.slave_id = SHDMA_SLAVE_RIIC6_TX,
302	.addr = 0x1e560012,	302	.addr = 0x1e560012,
303	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	303	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
304	TS_INDEX2VAL(XMIT_SZ_8BIT),	304	TS_INDEX2VAL(XMIT_SZ_8BIT),
305	.mid_rid = 0x29,	305	.mid_rid = 0x29,
306	},	306	},
307	{	307	{
308	.slave_id = SHDMA_SLAVE_RIIC6_RX,	308	.slave_id = SHDMA_SLAVE_RIIC6_RX,
309	.addr = 0x1e560013,	309	.addr = 0x1e560013,
310	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	310	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
311	TS_INDEX2VAL(XMIT_SZ_8BIT),	311	TS_INDEX2VAL(XMIT_SZ_8BIT),
312	.mid_rid = 0x2a,	312	.mid_rid = 0x2a,
313	},	313	},
314	{	314	{
315	.slave_id = SHDMA_SLAVE_RIIC7_TX,	315	.slave_id = SHDMA_SLAVE_RIIC7_TX,
316	.addr = 0x1e570012,	316	.addr = 0x1e570012,
317	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	317	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
318	TS_INDEX2VAL(XMIT_SZ_8BIT),	318	TS_INDEX2VAL(XMIT_SZ_8BIT),
319	.mid_rid = 0x41,	319	.mid_rid = 0x41,
320	},	320	},
321	{	321	{
322	.slave_id = SHDMA_SLAVE_RIIC7_RX,	322	.slave_id = SHDMA_SLAVE_RIIC7_RX,
323	.addr = 0x1e570013,	323	.addr = 0x1e570013,
324	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	324	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
325	TS_INDEX2VAL(XMIT_SZ_8BIT),	325	TS_INDEX2VAL(XMIT_SZ_8BIT),
326	.mid_rid = 0x42,	326	.mid_rid = 0x42,
327	},	327	},
328	{	328	{
329	.slave_id = SHDMA_SLAVE_RIIC8_TX,	329	.slave_id = SHDMA_SLAVE_RIIC8_TX,
330	.addr = 0x1e580012,	330	.addr = 0x1e580012,
331	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	331	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
332	TS_INDEX2VAL(XMIT_SZ_8BIT),	332	TS_INDEX2VAL(XMIT_SZ_8BIT),
333	.mid_rid = 0x45,	333	.mid_rid = 0x45,
334	},	334	},
335	{	335	{
336	.slave_id = SHDMA_SLAVE_RIIC8_RX,	336	.slave_id = SHDMA_SLAVE_RIIC8_RX,
337	.addr = 0x1e580013,	337	.addr = 0x1e580013,
338	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	338	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
339	TS_INDEX2VAL(XMIT_SZ_8BIT),	339	TS_INDEX2VAL(XMIT_SZ_8BIT),
340	.mid_rid = 0x46,	340	.mid_rid = 0x46,
341	},	341	},
342	{	342	{
343	.slave_id = SHDMA_SLAVE_RIIC9_TX,	343	.slave_id = SHDMA_SLAVE_RIIC9_TX,
344	.addr = 0x1e590012,	344	.addr = 0x1e590012,
345	.chcr = SM_INC \| 0x800 \| 0x40000000 \|	345	.chcr = SM_INC \| RS_ERS \| 0x40000000 \|
346	TS_INDEX2VAL(XMIT_SZ_8BIT),	346	TS_INDEX2VAL(XMIT_SZ_8BIT),
347	.mid_rid = 0x51,	347	.mid_rid = 0x51,
348	},	348	},
349	{	349	{
350	.slave_id = SHDMA_SLAVE_RIIC9_RX,	350	.slave_id = SHDMA_SLAVE_RIIC9_RX,
351	.addr = 0x1e590013,	351	.addr = 0x1e590013,
352	.chcr = DM_INC \| 0x800 \| 0x40000000 \|	352	.chcr = DM_INC \| RS_ERS \| 0x40000000 \|
353	TS_INDEX2VAL(XMIT_SZ_8BIT),	353	TS_INDEX2VAL(XMIT_SZ_8BIT),
354	.mid_rid = 0x52,	354	.mid_rid = 0x52,
355	},	355	},