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Diffstat (limited to 'arch/s390/include/asm/processor.h')
-rw-r--r--arch/s390/include/asm/processor.h48
1 files changed, 30 insertions, 18 deletions
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index a4b6229e5d4b..5f33d37d032c 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -33,6 +33,8 @@ static inline void get_cpu_id(struct cpuid *ptr)
33 33
34extern void s390_adjust_jiffies(void); 34extern void s390_adjust_jiffies(void);
35extern int get_cpu_capability(unsigned int *); 35extern int get_cpu_capability(unsigned int *);
36extern const struct seq_operations cpuinfo_op;
37extern int sysctl_ieee_emulation_warnings;
36 38
37/* 39/*
38 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. 40 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
@@ -118,17 +120,17 @@ struct stack_frame {
118/* 120/*
119 * Do necessary setup to start up a new thread. 121 * Do necessary setup to start up a new thread.
120 */ 122 */
121#define start_thread(regs, new_psw, new_stackp) do { \ 123#define start_thread(regs, new_psw, new_stackp) do { \
122 regs->psw.mask = psw_user_bits; \ 124 regs->psw.mask = psw_user_bits | PSW_MASK_EA | PSW_MASK_BA; \
123 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ 125 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
124 regs->gprs[15] = new_stackp; \ 126 regs->gprs[15] = new_stackp; \
125} while (0) 127} while (0)
126 128
127#define start_thread31(regs, new_psw, new_stackp) do { \ 129#define start_thread31(regs, new_psw, new_stackp) do { \
128 regs->psw.mask = psw_user32_bits; \ 130 regs->psw.mask = psw_user_bits | PSW_MASK_BA; \
129 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ 131 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
130 regs->gprs[15] = new_stackp; \ 132 regs->gprs[15] = new_stackp; \
131 crst_table_downgrade(current->mm, 1UL << 31); \ 133 crst_table_downgrade(current->mm, 1UL << 31); \
132} while (0) 134} while (0)
133 135
134/* Forward declaration, a strange C thing */ 136/* Forward declaration, a strange C thing */
@@ -187,7 +189,6 @@ static inline void __load_psw(psw_t psw)
187 * Set PSW mask to specified value, while leaving the 189 * Set PSW mask to specified value, while leaving the
188 * PSW addr pointing to the next instruction. 190 * PSW addr pointing to the next instruction.
189 */ 191 */
190
191static inline void __load_psw_mask (unsigned long mask) 192static inline void __load_psw_mask (unsigned long mask)
192{ 193{
193 unsigned long addr; 194 unsigned long addr;
@@ -212,26 +213,37 @@ static inline void __load_psw_mask (unsigned long mask)
212 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc"); 213 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
213#endif /* __s390x__ */ 214#endif /* __s390x__ */
214} 215}
215 216
216/* 217/*
217 * Function to stop a processor until an interruption occurred 218 * Rewind PSW instruction address by specified number of bytes.
218 */ 219 */
219static inline void enabled_wait(void) 220static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
220{ 221{
221 __load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT | 222#ifndef __s390x__
222 PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY); 223 if (psw.addr & PSW_ADDR_AMODE)
223} 224 /* 31 bit mode */
225 return (psw.addr - ilc) | PSW_ADDR_AMODE;
226 /* 24 bit mode */
227 return (psw.addr - ilc) & ((1UL << 24) - 1);
228#else
229 unsigned long mask;
224 230
231 mask = (psw.mask & PSW_MASK_EA) ? -1UL :
232 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
233 (1UL << 24) - 1;
234 return (psw.addr - ilc) & mask;
235#endif
236}
237
225/* 238/*
226 * Function to drop a processor into disabled wait state 239 * Function to drop a processor into disabled wait state
227 */ 240 */
228
229static inline void ATTRIB_NORET disabled_wait(unsigned long code) 241static inline void ATTRIB_NORET disabled_wait(unsigned long code)
230{ 242{
231 unsigned long ctl_buf; 243 unsigned long ctl_buf;
232 psw_t dw_psw; 244 psw_t dw_psw;
233 245
234 dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT; 246 dw_psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
235 dw_psw.addr = code; 247 dw_psw.addr = code;
236 /* 248 /*
237 * Store status and then load disabled wait psw, 249 * Store status and then load disabled wait psw,