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-rw-r--r--arch/riscv/mm/fault.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c
index 3e2708c626a8..f960c3f4ce47 100644
--- a/arch/riscv/mm/fault.c
+++ b/arch/riscv/mm/fault.c
@@ -272,9 +272,6 @@ vmalloc_fault:
272 * entries, but in RISC-V, SFENCE.VMA specifies an 272 * entries, but in RISC-V, SFENCE.VMA specifies an
273 * ordering constraint, not a cache flush; it is 273 * ordering constraint, not a cache flush; it is
274 * necessary even after writing invalid entries. 274 * necessary even after writing invalid entries.
275 * Relying on flush_tlb_fix_spurious_fault would
276 * suffice, but the extra traps reduce
277 * performance. So, eagerly SFENCE.VMA.
278 */ 275 */
279 local_flush_tlb_page(addr); 276 local_flush_tlb_page(addr);
280 277