1 files changed, 51 insertions, 0 deletions

diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 42b7a4fd57d9..8d1a365b8edc 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -1486,6 +1486,14 @@ static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
                 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len);
                 break;
         case KVM_REG_PPC_TB_OFFSET:
+                /*
+                 * POWER9 DD1 has an erratum where writing TBU40 causes
+                 * the timebase to lose ticks.  So we don't let the
+                 * timebase offset be changed on P9 DD1.  (It is
+                 * initialized to zero.)
+                 */
+                if (cpu_has_feature(CPU_FTR_POWER9_DD1))
+                        break;
                 /* round up to multiple of 2^24 */
                 vcpu->arch.vcore->tb_offset =
                         ALIGN(set_reg_val(id, *val), 1UL << 24);
@@ -2907,12 +2915,36 @@ static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
 {
         int r;
         int srcu_idx;
+        unsigned long ebb_regs[3] = {}; /* shut up GCC */
+        unsigned long user_tar = 0;
+        unsigned int user_vrsave;
 
         if (!vcpu->arch.sane) {
                 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
                 return -EINVAL;
         }
 
+        /*
+         * Don't allow entry with a suspended transaction, because
+         * the guest entry/exit code will lose it.
+         * If the guest has TM enabled, save away their TM-related SPRs
+         * (they will get restored by the TM unavailable interrupt).
+         */
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+        if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs &&
+            (current->thread.regs->msr & MSR_TM)) {
+                if (MSR_TM_ACTIVE(current->thread.regs->msr)) {
+                        run->exit_reason = KVM_EXIT_FAIL_ENTRY;
+                        run->fail_entry.hardware_entry_failure_reason = 0;
+                        return -EINVAL;
+                }
+                current->thread.tm_tfhar = mfspr(SPRN_TFHAR);
+                current->thread.tm_tfiar = mfspr(SPRN_TFIAR);
+                current->thread.tm_texasr = mfspr(SPRN_TEXASR);
+                current->thread.regs->msr &= ~MSR_TM;
+        }
+#endif
+
         kvmppc_core_prepare_to_enter(vcpu);
 
         /* No need to go into the guest when all we'll do is come back out */
@@ -2934,6 +2966,15 @@ static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
 
         flush_all_to_thread(current);
 
+        /* Save userspace EBB and other register values */
+        if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
+                ebb_regs[0] = mfspr(SPRN_EBBHR);
+                ebb_regs[1] = mfspr(SPRN_EBBRR);
+                ebb_regs[2] = mfspr(SPRN_BESCR);
+                user_tar = mfspr(SPRN_TAR);
+        }
+        user_vrsave = mfspr(SPRN_VRSAVE);
+
         vcpu->arch.wqp = &vcpu->arch.vcore->wq;
         vcpu->arch.pgdir = current->mm->pgd;
         vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
@@ -2960,6 +3001,16 @@ static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 }
         } while (is_kvmppc_resume_guest(r));
 
+        /* Restore userspace EBB and other register values */
+        if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
+                mtspr(SPRN_EBBHR, ebb_regs[0]);
+                mtspr(SPRN_EBBRR, ebb_regs[1]);
+                mtspr(SPRN_BESCR, ebb_regs[2]);
+                mtspr(SPRN_TAR, user_tar);
+                mtspr(SPRN_FSCR, current->thread.fscr);
+        }
+        mtspr(SPRN_VRSAVE, user_vrsave);
+
  out:
         vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
         atomic_dec(&vcpu->kvm->arch.vcpus_running);