6 files changed, 3 insertions, 85 deletions

diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 0a0544335950..89cf15566c4e 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -766,7 +766,6 @@ int main(void)
         OFFSET(PACA_THREAD_IDLE_STATE, paca_struct, thread_idle_state);
         OFFSET(PACA_THREAD_MASK, paca_struct, thread_mask);
         OFFSET(PACA_SUBCORE_SIBLING_MASK, paca_struct, subcore_sibling_mask);
-        OFFSET(PACA_SIBLING_PACA_PTRS, paca_struct, thread_sibling_pacas);
         OFFSET(PACA_REQ_PSSCR, paca_struct, requested_psscr);
         OFFSET(PACA_DONT_STOP, paca_struct, dont_stop);
 #define STOP_SPR(x, f)  OFFSET(x, paca_struct, stop_sprs.f)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index c8fc9691f8c7..bc75a2908a7e 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -485,25 +485,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .machine_check_early    = __machine_check_early_realmode_p8,
                 .platform               = "power8",
         },
-        {       /* Power9 DD1*/
-                .pvr_mask               = 0xffffff00,
-                .pvr_value              = 0x004e0100,
-                .cpu_name               = "POWER9 (raw)",
-                .cpu_features           = CPU_FTRS_POWER9_DD1,
-                .cpu_user_features      = COMMON_USER_POWER9,
-                .cpu_user_features2     = COMMON_USER2_POWER9,
-                .mmu_features           = MMU_FTRS_POWER9,
-                .icache_bsize           = 128,
-                .dcache_bsize           = 128,
-                .num_pmcs               = 6,
-                .pmc_type               = PPC_PMC_IBM,
-                .oprofile_cpu_type      = "ppc64/power9",
-                .oprofile_type          = PPC_OPROFILE_INVALID,
-                .cpu_setup              = __setup_cpu_power9,
-                .cpu_restore            = __restore_cpu_power9,
-                .machine_check_early    = __machine_check_early_realmode_p9,
-                .platform               = "power9",
-        },
         {       /* Power9 DD2.0 */
                 .pvr_mask               = 0xffffefff,
                 .pvr_value              = 0x004e0200,
diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c
index 4be1c0de9406..98c373a4c1cf 100644
--- a/arch/powerpc/kernel/dt_cpu_ftrs.c
+++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
@@ -701,9 +701,7 @@ static __init void cpufeatures_cpu_quirks(void)
         /*
          * Not all quirks can be derived from the cpufeatures device tree.
          */
-        if ((version & 0xffffff00) == 0x004e0100)
-                cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD1;
-        else if ((version & 0xffffefff) == 0x004e0200)
+        if ((version & 0xffffefff) == 0x004e0200)
                 ; /* DD2.0 has no feature flag */
         else if ((version & 0xffffefff) == 0x004e0201)
                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 285c6465324a..76a14702cb9c 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -276,9 +276,7 @@ BEGIN_FTR_SECTION
          *
          * This interrupt can wake directly from idle. If that is the case,
          * the machine check is handled then the idle wakeup code is called
-         * to restore state. In that case, the POWER9 DD1 idle PACA workaround
-         * is not applied in the early machine check code, which will cause
-         * bugs.
+         * to restore state.
          */
         mr      r11,r1                  /* Save r1 */
         lhz     r10,PACA_IN_MCE(r13)
diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S
index e734f6e45abc..d85d5515a091 100644
--- a/arch/powerpc/kernel/idle_book3s.S
+++ b/arch/powerpc/kernel/idle_book3s.S
@@ -467,43 +467,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_P9_TM_XER_SO_BUG)
 #endif
 
 /*
- * On waking up from stop 0,1,2 with ESL=1 on POWER9 DD1,
- * HSPRG0 will be set to the HSPRG0 value of one of the
- * threads in this core. Thus the value we have in r13
- * may not be this thread's paca pointer.
- *
- * Fortunately, the TIR remains invariant. Since this thread's
- * paca pointer is recorded in all its sibling's paca, we can
- * correctly recover this thread's paca pointer if we
- * know the index of this thread in the core.
- *
- * This index can be obtained from the TIR.
- *
- * i.e, thread's position in the core = TIR.
- * If this value is i, then this thread's paca is
- * paca->thread_sibling_pacas[i].
- */
-power9_dd1_recover_paca:
-        mfspr   r4, SPRN_TIR
-        /*
-         * Since each entry in thread_sibling_pacas is 8 bytes
-         * we need to left-shift by 3 bits. Thus r4 = i * 8
-         */
-        sldi    r4, r4, 3
-        /* Get &paca->thread_sibling_pacas[0] in r5 */
-        ld      r5, PACA_SIBLING_PACA_PTRS(r13)
-        /* Load paca->thread_sibling_pacas[i] into r13 */
-        ldx     r13, r4, r5
-        SET_PACA(r13)
-        /*
-         * Indicate that we have lost NVGPR state
-         * which needs to be restored from the stack.
-         */
-        li      r3, 1
-        stb     r3,PACA_NAPSTATELOST(r13)
-        blr
-
-/*
  * Called from machine check handler for powersave wakeups.
  * Low level machine check processing has already been done. Now just
  * go through the wake up path to get everything in order.
@@ -537,9 +500,6 @@ pnv_powersave_wakeup:
         ld      r2, PACATOC(r13)
 
 BEGIN_FTR_SECTION
-BEGIN_FTR_SECTION_NESTED(70)
-        bl      power9_dd1_recover_paca
-END_FTR_SECTION_NESTED_IFSET(CPU_FTR_POWER9_DD1, 70)
         bl      pnv_restore_hyp_resource_arch300
 FTR_SECTION_ELSE
         bl      pnv_restore_hyp_resource_arch207
@@ -602,22 +562,12 @@ END_FTR_SECTION_IFCLR(CPU_FTR_POWER9_DD2_1)
         LOAD_REG_ADDRBASE(r5,pnv_first_deep_stop_state)
         ld      r4,ADDROFF(pnv_first_deep_stop_state)(r5)
 
-BEGIN_FTR_SECTION_NESTED(71)
-        /*
-         * Assume that we are waking up from the state
-         * same as the Requested Level (RL) in the PSSCR
-         * which are Bits 60-63
-         */
-        ld      r5,PACA_REQ_PSSCR(r13)
-        rldicl  r5,r5,0,60
-FTR_SECTION_ELSE_NESTED(71)
         /*
          * 0-3 bits correspond to Power-Saving Level Status
          * which indicates the idle state we are waking up from
          */
         mfspr   r5, SPRN_PSSCR
         rldicl  r5,r5,4,60
-ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_POWER9_DD1, 71)
         li      r0, 0           /* clear requested_psscr to say we're awake */
         std     r0, PACA_REQ_PSSCR(r13)
         cmpd    cr4,r5,r4
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 9ef4aea9fffe..27f0caee55ea 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1250,17 +1250,9 @@ struct task_struct *__switch_to(struct task_struct *prev,
                  * mappings. If the new process has the foreign real address
                  * mappings, we must issue a cp_abort to clear any state and
                  * prevent snooping, corruption or a covert channel.
-                 *
-                 * DD1 allows paste into normal system memory so we do an
-                 * unpaired copy, rather than cp_abort, to clear the buffer,
-                 * since cp_abort is quite expensive.
                  */
-                if (current_thread_info()->task->thread.used_vas) {
+                if (current_thread_info()->task->thread.used_vas)
                         asm volatile(PPC_CP_ABORT);
-                } else if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
-                        asm volatile(PPC_COPY(%0, %1)
-                                        : : "r"(dummy_copy_buffer), "r"(0));
-                }
         }
 #endif /* CONFIG_PPC_BOOK3S_64 */