1 files changed, 280 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/p1020rdb-pd.dts b/arch/powerpc/boot/dts/p1020rdb-pd.dts
new file mode 100644
index 000000000000..987017ea36b6
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020rdb-pd.dts
@@ -0,0 +1,280 @@
+/*
+ * P1020 RDB-PD Device Tree Source (32-bit address map)
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+        model = "fsl,P1020RDB-PD";
+        compatible = "fsl,P1020RDB-PD";
+        memory {
+                device_type = "memory";
+        };
+        lbc: localbus@ffe05000 {
+                reg = <0x0 0xffe05000 0x0 0x1000>;
+                /* NOR, NAND flash, L2 switch and CPLD */
+                ranges = <0x0 0x0 0x0 0xec000000 0x04000000
+                          0x1 0x0 0x0 0xff800000 0x00040000
+                          0x2 0x0 0x0 0xffa00000 0x00020000
+                          0x3 0x0 0x0 0xffb00000 0x00020000>;
+                nor@0,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <0x0 0x0 0x4000000>;
+                        bank-width = <2>;
+                        device-width = <1>;
+                        partition@0 {
+                                /* 128KB for DTB Image */
+                                reg = <0x0 0x00020000>;
+                                label = "NOR DTB Image";
+                        };
+                        partition@20000 {
+                                /* 3.875 MB for Linux Kernel Image */
+                                reg = <0x00020000 0x003e0000>;
+                                label = "NOR Linux Kernel Image";
+                        };
+                        partition@400000 {
+                                /* 58MB for Root file System */
+                                reg = <0x00400000 0x03a00000>;
+                                label = "NOR Root File System";
+                        };
+                        partition@3e00000 {
+                                /* This location must not be altered  */
+                                /* 1M for Vitesse 7385 Switch firmware */
+                                reg = <0x3e00000 0x00100000>;
+                                label = "NOR Vitesse-7385 Firmware";
+                                read-only;
+                        };
+                        partition@3f00000 {
+                                /* This location must not be altered  */
+                                /* 512KB for u-boot Bootloader Image */
+                                /* 512KB for u-boot Environment Variables */
+                                reg = <0x03f00000 0x00100000>;
+                                label = "NOR U-Boot Image";
+                                read-only;
+                        };
+                };
+                nand@1,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,p1020-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <0x1 0x0 0x40000>;
+                        partition@0 {
+                                /* This location must not be altered  */
+                                /* 1MB for u-boot Bootloader Image */
+                                reg = <0x0 0x00100000>;
+                                label = "NAND U-Boot Image";
+                                read-only;
+                        };
+                        partition@100000 {
+                                /* 1MB for DTB Image */
+                                reg = <0x00100000 0x00100000>;
+                                label = "NAND DTB Image";
+                        };
+                        partition@200000 {
+                                /* 4MB for Linux Kernel Image */
+                                reg = <0x00200000 0x00400000>;
+                                label = "NAND Linux Kernel Image";
+                        };
+                        partition@600000 {
+                                /* 122MB for File System Image */
+                                reg = <0x00600000 0x07a00000>;
+                                label = "NAND File System Image";
+                        };
+                };
+                cpld@2,0 {
+                        compatible = "fsl,p1020rdb-pd-cpld";
+                        reg = <0x2 0x0 0x20000>;
+                };
+                L2switch@3,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "vitesse-7385";
+                        reg = <0x3 0x0 0x20000>;
+                };
+        };
+        soc: soc@ffe00000 {
+                ranges = <0x0 0x0 0xffe00000 0x100000>;
+                i2c@3000 {
+                        rtc@68 {
+                                compatible = "dallas,ds1339";
+                                reg = <0x68>;
+                        };
+                };
+                spi@7000 {
+                        flash@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "spansion,s25sl12801";
+                                reg = <0>;
+                                /* input clock */
+                                spi-max-frequency = <40000000>;
+                                partition@0 {
+                                        /* 512KB for u-boot Bootloader Image */
+                                        reg = <0x0 0x00080000>;
+                                        label = "SPI U-Boot Image";
+                                        read-only;
+                                };
+                                partition@80000 {
+                                        /* 512KB for DTB Image*/
+                                        reg = <0x00080000 0x00080000>;
+                                        label = "SPI DTB Image";
+                                };
+                                partition@100000 {
+                                        /* 4MB for Linux Kernel Image */
+                                        reg = <0x00100000 0x00400000>;
+                                        label = "SPI Linux Kernel Image";
+                                };
+                                partition@500000 {
+                                        /* 11MB for FS System Image */
+                                        reg = <0x00500000 0x00b00000>;
+                                        label = "SPI File System Image";
+                                };
+                        };
+                        slic@0 {
+                                compatible = "zarlink,le88266";
+                                reg = <1>;
+                                spi-max-frequency = <8000000>;
+                        };
+                        slic@1 {
+                                compatible = "zarlink,le88266";
+                                reg = <2>;
+                                spi-max-frequency = <8000000>;
+                        };
+                };
+                mdio@24000 {
+                        phy0: ethernet-phy@0 {
+                                interrupts = <3 1 0 0>;
+                                reg = <0x0>;
+                        };
+                        phy1: ethernet-phy@1 {
+                                interrupts = <2 1 0 0>;
+                                reg = <0x1>;
+                        };
+                };
+                mdio@25000 {
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+                mdio@26000 {
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+                enet0: ethernet@b0000 {
+                        fixed-link = <1 1 1000 0 0>;
+                        phy-connection-type = "rgmii-id";
+                };
+                enet1: ethernet@b1000 {
+                        phy-handle = <&phy0>;
+                        tbi-handle = <&tbi1>;
+                        phy-connection-type = "sgmii";
+                };
+                enet2: ethernet@b2000 {
+                        phy-handle = <&phy1>;
+                        phy-connection-type = "rgmii-id";
+                };
+                usb@22000 {
+                        phy_type = "ulpi";
+                };
+        };
+        pci0: pcie@ffe09000 {
+                reg = <0x0 0xffe09000 0x0 0x1000>;
+                ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0xa0000000
+                                  0x2000000 0x0 0xa0000000
+                                  0x0 0x20000000
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+        pci1: pcie@ffe0a000 {
+                reg = <0x0 0xffe0a000 0x0 0x1000>;
+                ranges = <0x2000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x20000000
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
+/include/ "fsl/p1020si-post.dtsi"

diff --git a/arch/powerpc/boot/dts/p1020rdb-pd.dts b/arch/powerpc/boot/dts/p1020rdb-pd.dts new file mode 100644 index 000000000000..987017ea36b6 --- /dev/null +++ b/arch/powerpc/boot/dts/p1020rdb-pd.dts
@@ -0,0 +1,280 @@
	1	/*
	2	* P1020 RDB-PD Device Tree Source (32-bit address map)
	3	*
	4	* Copyright 2013 Freescale Semiconductor Inc.
	5	*
	6	* Redistribution and use in source and binary forms, with or without
	7	* modification, are permitted provided that the following conditions are met:
	8	* * Redistributions of source code must retain the above copyright
	9	* notice, this list of conditions and the following disclaimer.
	10	* * Redistributions in binary form must reproduce the above copyright
	11	* notice, this list of conditions and the following disclaimer in the
	12	* documentation and/or other materials provided with the distribution.
	13	* * Neither the name of Freescale Semiconductor nor the
	14	* names of its contributors may be used to endorse or promote products
	15	* derived from this software without specific prior written permission.
	16	*
	17	*
	18	* ALTERNATIVELY, this software may be distributed under the terms of the
	19	* GNU General Public License ("GPL") as published by the Free Software
	20	* Foundation, either version 2 of that License or (at your option) any
	21	* later version.
	22	*
	23	* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
	24	* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
	25	* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	26	* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
	27	* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
	28	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
	29	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
	30	* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	31	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
	32	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	33	*/
	34
	35	/include/ "fsl/p1020si-pre.dtsi"
	36	/ {
	37	model = "fsl,P1020RDB-PD";
	38	compatible = "fsl,P1020RDB-PD";
	39
	40	memory {
	41	device_type = "memory";
	42	};
	43
	44	lbc: localbus@ffe05000 {
	45	reg = <0x0 0xffe05000 0x0 0x1000>;
	46
	47	/* NOR, NAND flash, L2 switch and CPLD */
	48	ranges = <0x0 0x0 0x0 0xec000000 0x04000000
	49	0x1 0x0 0x0 0xff800000 0x00040000
	50	0x2 0x0 0x0 0xffa00000 0x00020000
	51	0x3 0x0 0x0 0xffb00000 0x00020000>;
	52
	53	nor@0,0 {
	54	#address-cells = <1>;
	55	#size-cells = <1>;
	56	compatible = "cfi-flash";
	57	reg = <0x0 0x0 0x4000000>;
	58	bank-width = <2>;
	59	device-width = <1>;
	60
	61	partition@0 {
	62	/* 128KB for DTB Image */
	63	reg = <0x0 0x00020000>;
	64	label = "NOR DTB Image";
	65	};
	66
	67	partition@20000 {
	68	/* 3.875 MB for Linux Kernel Image */
	69	reg = <0x00020000 0x003e0000>;
	70	label = "NOR Linux Kernel Image";
	71	};
	72
	73	partition@400000 {
	74	/* 58MB for Root file System */
	75	reg = <0x00400000 0x03a00000>;
	76	label = "NOR Root File System";
	77	};
	78
	79	partition@3e00000 {
	80	/* This location must not be altered */
	81	/* 1M for Vitesse 7385 Switch firmware */
	82	reg = <0x3e00000 0x00100000>;
	83	label = "NOR Vitesse-7385 Firmware";
	84	read-only;
	85	};
	86
	87	partition@3f00000 {
	88	/* This location must not be altered */
	89	/* 512KB for u-boot Bootloader Image */
	90	/* 512KB for u-boot Environment Variables */
	91	reg = <0x03f00000 0x00100000>;
	92	label = "NOR U-Boot Image";
	93	read-only;
	94	};
	95	};
	96
	97	nand@1,0 {
	98	#address-cells = <1>;
	99	#size-cells = <1>;
	100	compatible = "fsl,p1020-fcm-nand",
	101	"fsl,elbc-fcm-nand";
	102	reg = <0x1 0x0 0x40000>;
	103
	104	partition@0 {
	105	/* This location must not be altered */
	106	/* 1MB for u-boot Bootloader Image */
	107	reg = <0x0 0x00100000>;
	108	label = "NAND U-Boot Image";
	109	read-only;
	110	};
	111
	112	partition@100000 {
	113	/* 1MB for DTB Image */
	114	reg = <0x00100000 0x00100000>;
	115	label = "NAND DTB Image";
	116	};
	117
	118	partition@200000 {
	119	/* 4MB for Linux Kernel Image */
	120	reg = <0x00200000 0x00400000>;
	121	label = "NAND Linux Kernel Image";
	122	};
	123
	124	partition@600000 {
	125	/* 122MB for File System Image */
	126	reg = <0x00600000 0x07a00000>;
	127	label = "NAND File System Image";
	128	};
	129	};
	130
	131	cpld@2,0 {
	132	compatible = "fsl,p1020rdb-pd-cpld";
	133	reg = <0x2 0x0 0x20000>;
	134	};
	135
	136	L2switch@3,0 {
	137	#address-cells = <1>;
	138	#size-cells = <1>;
	139	compatible = "vitesse-7385";
	140	reg = <0x3 0x0 0x20000>;
	141	};
	142	};
	143
	144	soc: soc@ffe00000 {
	145	ranges = <0x0 0x0 0xffe00000 0x100000>;
	146
	147	i2c@3000 {
	148	rtc@68 {
	149	compatible = "dallas,ds1339";
	150	reg = <0x68>;
	151	};
	152	};
	153
	154	spi@7000 {
	155	flash@0 {
	156	#address-cells = <1>;
	157	#size-cells = <1>;
	158	compatible = "spansion,s25sl12801";
	159	reg = <0>;
	160	/* input clock */
	161	spi-max-frequency = <40000000>;
	162
	163	partition@0 {
	164	/* 512KB for u-boot Bootloader Image */
	165	reg = <0x0 0x00080000>;
	166	label = "SPI U-Boot Image";
	167	read-only;
	168	};
	169
	170	partition@80000 {
	171	/* 512KB for DTB Image*/
	172	reg = <0x00080000 0x00080000>;
	173	label = "SPI DTB Image";
	174	};
	175
	176	partition@100000 {
	177	/* 4MB for Linux Kernel Image */
	178	reg = <0x00100000 0x00400000>;
	179	label = "SPI Linux Kernel Image";
	180	};
	181
	182	partition@500000 {
	183	/* 11MB for FS System Image */
	184	reg = <0x00500000 0x00b00000>;
	185	label = "SPI File System Image";
	186	};
	187	};
	188
	189	slic@0 {
	190	compatible = "zarlink,le88266";
	191	reg = <1>;
	192	spi-max-frequency = <8000000>;
	193	};
	194
	195	slic@1 {
	196	compatible = "zarlink,le88266";
	197	reg = <2>;
	198	spi-max-frequency = <8000000>;
	199	};
	200	};
	201
	202	mdio@24000 {
	203	phy0: ethernet-phy@0 {
	204	interrupts = <3 1 0 0>;
	205	reg = <0x0>;
	206	};
	207
	208	phy1: ethernet-phy@1 {
	209	interrupts = <2 1 0 0>;
	210	reg = <0x1>;
	211	};
	212	};
	213
	214	mdio@25000 {
	215	tbi1: tbi-phy@11 {
	216	reg = <0x11>;
	217	device_type = "tbi-phy";
	218	};
	219	};
	220
	221	mdio@26000 {
	222	tbi2: tbi-phy@11 {
	223	reg = <0x11>;
	224	device_type = "tbi-phy";
	225	};
	226	};
	227
	228	enet0: ethernet@b0000 {
	229	fixed-link = <1 1 1000 0 0>;
	230	phy-connection-type = "rgmii-id";
	231	};
	232
	233	enet1: ethernet@b1000 {
	234	phy-handle = <&phy0>;
	235	tbi-handle = <&tbi1>;
	236	phy-connection-type = "sgmii";
	237	};
	238
	239	enet2: ethernet@b2000 {
	240	phy-handle = <&phy1>;
	241	phy-connection-type = "rgmii-id";
	242	};
	243
	244	usb@22000 {
	245	phy_type = "ulpi";
	246	};
	247	};
	248
	249	pci0: pcie@ffe09000 {
	250	reg = <0x0 0xffe09000 0x0 0x1000>;
	251	ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
	252	0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
	253	pcie@0 {
	254	ranges = <0x2000000 0x0 0xa0000000
	255	0x2000000 0x0 0xa0000000
	256	0x0 0x20000000
	257
	258	0x1000000 0x0 0x0
	259	0x1000000 0x0 0x0
	260	0x0 0x100000>;
	261	};
	262	};
	263
	264	pci1: pcie@ffe0a000 {
	265	reg = <0x0 0xffe0a000 0x0 0x1000>;
	266	ranges = <0x2000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000
	267	0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
	268	pcie@0 {
	269	ranges = <0x2000000 0x0 0x80000000
	270	0x2000000 0x0 0x80000000
	271	0x0 0x20000000
	272
	273	0x1000000 0x0 0x0
	274	0x1000000 0x0 0x0
	275	0x0 0x100000>;
	276	};
	277	};
	278	};
	279
	280	/include/ "fsl/p1020si-post.dtsi"