7 files changed, 80 insertions, 50 deletions

diff --git a/arch/parisc/kernel/asm-offsets.c b/arch/parisc/kernel/asm-offsets.c
index 59001cea13f9..d2f62570a7b1 100644
--- a/arch/parisc/kernel/asm-offsets.c
+++ b/arch/parisc/kernel/asm-offsets.c
@@ -290,6 +290,14 @@ int main(void)
         DEFINE(ASM_PFN_PTE_SHIFT, PFN_PTE_SHIFT);
         DEFINE(ASM_PT_INITIAL, PT_INITIAL);
         BLANK();
+        /* HUGEPAGE_SIZE is only used in vmlinux.lds.S to align kernel text
+         * and kernel data on physical huge pages */
+#ifdef CONFIG_HUGETLB_PAGE
+        DEFINE(HUGEPAGE_SIZE, 1UL << REAL_HPAGE_SHIFT);
+#else
+        DEFINE(HUGEPAGE_SIZE, PAGE_SIZE);
+#endif
+        BLANK();
         DEFINE(EXCDATA_IP, offsetof(struct exception_data, fault_ip));
         DEFINE(EXCDATA_SPACE, offsetof(struct exception_data, fault_space));
         DEFINE(EXCDATA_ADDR, offsetof(struct exception_data, fault_addr));
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index c5ef4081b01d..623496c11756 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -502,21 +502,38 @@
         STREG           \pte,0(\ptp)
         .endm
 
+        /* We have (depending on the page size):
+         * - 38 to 52-bit Physical Page Number
+         * - 12 to 26-bit page offset
+         */
         /* bitshift difference between a PFN (based on kernel's PAGE_SIZE)
          * to a CPU TLB 4k PFN (4k => 12 bits to shift) */
-        #define PAGE_ADD_SHIFT  (PAGE_SHIFT-12)
+        #define PAGE_ADD_SHIFT          (PAGE_SHIFT-12)
+        #define PAGE_ADD_HUGE_SHIFT     (REAL_HPAGE_SHIFT-12)
 
         /* Drop prot bits and convert to page addr for iitlbt and idtlbt */
-        .macro          convert_for_tlb_insert20 pte
+        .macro          convert_for_tlb_insert20 pte,tmp
+#ifdef CONFIG_HUGETLB_PAGE
+        copy            \pte,\tmp
+        extrd,u         \tmp,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\
+                                64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte
+
+        depdi           _PAGE_SIZE_ENCODING_DEFAULT,63,\
+                                (63-58)+PAGE_ADD_SHIFT,\pte
+        extrd,u,*=      \tmp,_PAGE_HPAGE_BIT+32,1,%r0
+        depdi           _HUGE_PAGE_SIZE_ENCODING_DEFAULT,63,\
+                                (63-58)+PAGE_ADD_HUGE_SHIFT,\pte
+#else /* Huge pages disabled */
         extrd,u         \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\
                                 64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte
         depdi           _PAGE_SIZE_ENCODING_DEFAULT,63,\
                                 (63-58)+PAGE_ADD_SHIFT,\pte
+#endif
         .endm
 
         /* Convert the pte and prot to tlb insertion values.  How
          * this happens is quite subtle, read below */
-        .macro          make_insert_tlb spc,pte,prot
+        .macro          make_insert_tlb spc,pte,prot,tmp
         space_to_prot   \spc \prot        /* create prot id from space */
         /* The following is the real subtlety.  This is depositing
          * T <-> _PAGE_REFTRAP
@@ -553,7 +570,7 @@
         depdi           1,12,1,\prot
 
         /* Drop prot bits and convert to page addr for iitlbt and idtlbt */
-        convert_for_tlb_insert20 \pte
+        convert_for_tlb_insert20 \pte \tmp
         .endm
 
         /* Identical macro to make_insert_tlb above, except it
@@ -646,17 +663,12 @@
 
 
         /*
-         * Align fault_vector_20 on 4K boundary so that both
-         * fault_vector_11 and fault_vector_20 are on the
-         * same page. This is only necessary as long as we
-         * write protect the kernel text, which we may stop
-         * doing once we use large page translations to cover
-         * the static part of the kernel address space.
+         * Fault_vectors are architecturally required to be aligned on a 2K
+         * boundary
          */
 
         .text
-
-        .align 4096
+        .align 2048
 
 ENTRY(fault_vector_20)
         /* First vector is invalid (0) */
@@ -1147,7 +1159,7 @@ dtlb_miss_20w:
         tlb_lock        spc,ptp,pte,t0,t1,dtlb_check_alias_20w
         update_accessed ptp,pte,t0,t1
 
-        make_insert_tlb spc,pte,prot
+        make_insert_tlb spc,pte,prot,t1
         
         idtlbt          pte,prot
 
@@ -1173,7 +1185,7 @@ nadtlb_miss_20w:
         tlb_lock        spc,ptp,pte,t0,t1,nadtlb_check_alias_20w
         update_accessed ptp,pte,t0,t1
 
-        make_insert_tlb spc,pte,prot
+        make_insert_tlb spc,pte,prot,t1
 
         idtlbt          pte,prot
 
@@ -1267,7 +1279,7 @@ dtlb_miss_20:
         tlb_lock        spc,ptp,pte,t0,t1,dtlb_check_alias_20
         update_accessed ptp,pte,t0,t1
 
-        make_insert_tlb spc,pte,prot
+        make_insert_tlb spc,pte,prot,t1
 
         f_extend        pte,t1
 
@@ -1295,7 +1307,7 @@ nadtlb_miss_20:
         tlb_lock        spc,ptp,pte,t0,t1,nadtlb_check_alias_20
         update_accessed ptp,pte,t0,t1
 
-        make_insert_tlb spc,pte,prot
+        make_insert_tlb spc,pte,prot,t1
 
         f_extend        pte,t1
         
@@ -1404,7 +1416,7 @@ itlb_miss_20w:
         tlb_lock        spc,ptp,pte,t0,t1,itlb_fault
         update_accessed ptp,pte,t0,t1
 
-        make_insert_tlb spc,pte,prot
+        make_insert_tlb spc,pte,prot,t1
         
         iitlbt          pte,prot
 
@@ -1428,7 +1440,7 @@ naitlb_miss_20w:
         tlb_lock        spc,ptp,pte,t0,t1,naitlb_check_alias_20w
         update_accessed ptp,pte,t0,t1
 
-        make_insert_tlb spc,pte,prot
+        make_insert_tlb spc,pte,prot,t1
 
         iitlbt          pte,prot
 
@@ -1514,7 +1526,7 @@ itlb_miss_20:
         tlb_lock        spc,ptp,pte,t0,t1,itlb_fault
         update_accessed ptp,pte,t0,t1
 
-        make_insert_tlb spc,pte,prot
+        make_insert_tlb spc,pte,prot,t1
 
         f_extend        pte,t1
 
@@ -1534,7 +1546,7 @@ naitlb_miss_20:
         tlb_lock        spc,ptp,pte,t0,t1,naitlb_check_alias_20
         update_accessed ptp,pte,t0,t1
 
-        make_insert_tlb spc,pte,prot
+        make_insert_tlb spc,pte,prot,t1
 
         f_extend        pte,t1
 
@@ -1566,7 +1578,7 @@ dbit_trap_20w:
         tlb_lock        spc,ptp,pte,t0,t1,dbit_fault
         update_dirty    ptp,pte,t1
 
-        make_insert_tlb spc,pte,prot
+        make_insert_tlb spc,pte,prot,t1
                 
         idtlbt          pte,prot
 
@@ -1610,7 +1622,7 @@ dbit_trap_20:
         tlb_lock        spc,ptp,pte,t0,t1,dbit_fault
         update_dirty    ptp,pte,t1
 
-        make_insert_tlb spc,pte,prot
+        make_insert_tlb spc,pte,prot,t1
 
         f_extend        pte,t1
         
diff --git a/arch/parisc/kernel/head.S b/arch/parisc/kernel/head.S
index e7d64527aff9..75aa0db9f69e 100644
--- a/arch/parisc/kernel/head.S
+++ b/arch/parisc/kernel/head.S
@@ -69,7 +69,7 @@ $bss_loop:
         stw,ma          %arg2,4(%r1)
         stw,ma          %arg3,4(%r1)
 
-        /* Initialize startup VM. Just map first 8/16 MB of memory */
+        /* Initialize startup VM. Just map first 16/32 MB of memory */
         load32          PA(swapper_pg_dir),%r4
         mtctl           %r4,%cr24       /* Initialize kernel root pointer */
         mtctl           %r4,%cr25       /* Initialize user root pointer */
@@ -107,7 +107,7 @@ $bss_loop:
         /* Now initialize the PTEs themselves.  We use RWX for
          * everything ... it will get remapped correctly later */
         ldo             0+_PAGE_KERNEL_RWX(%r0),%r3 /* Hardwired 0 phys addr start */
-        ldi             (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
+        load32          (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
         load32          PA(pg0),%r1
 
 $pgt_fill_loop:
diff --git a/arch/parisc/kernel/setup.c b/arch/parisc/kernel/setup.c
index 72a3c658ad7b..f7ea626e29c9 100644
--- a/arch/parisc/kernel/setup.c
+++ b/arch/parisc/kernel/setup.c
@@ -130,7 +130,16 @@ void __init setup_arch(char **cmdline_p)
         printk(KERN_INFO "The 32-bit Kernel has started...\n");
 #endif
 
-        printk(KERN_INFO "Default page size is %dKB.\n", (int)(PAGE_SIZE / 1024));
+        printk(KERN_INFO "Kernel default page size is %d KB. Huge pages ",
+                (int)(PAGE_SIZE / 1024));
+#ifdef CONFIG_HUGETLB_PAGE
+        printk(KERN_CONT "enabled with %d MB physical and %d MB virtual size",
+                 1 << (REAL_HPAGE_SHIFT - 20), 1 << (HPAGE_SHIFT - 20));
+#else
+        printk(KERN_CONT "disabled");
+#endif
+        printk(KERN_CONT ".\n");
+
 
         pdc_console_init();
 
@@ -377,6 +386,7 @@ arch_initcall(parisc_init);
 void start_parisc(void)
 {
         extern void start_kernel(void);
+        extern void early_trap_init(void);
 
         int ret, cpunum;
         struct pdc_coproc_cfg coproc_cfg;
@@ -397,6 +407,8 @@ void start_parisc(void)
                 panic("must have an fpu to boot linux");
         }
 
+        early_trap_init(); /* initialize checksum of fault_vector */
+
         start_kernel();
         // not reached
 }
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index 0b8d26d3ba43..3fbd7252a4b2 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -369,7 +369,7 @@ tracesys_exit:
         ldo     -16(%r30),%r29                  /* Reference param save area */
 #endif
         ldo     TASK_REGS(%r1),%r26
-        bl      do_syscall_trace_exit,%r2
+        BL      do_syscall_trace_exit,%r2
         STREG   %r28,TASK_PT_GR28(%r1)          /* save return value now */
         ldo     -THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r1      /* get task ptr */
         LDREG   TI_TASK(%r1), %r1
@@ -390,7 +390,7 @@ tracesys_sigexit:
 #ifdef CONFIG_64BIT
         ldo     -16(%r30),%r29                  /* Reference param save area */
 #endif
-        bl      do_syscall_trace_exit,%r2
+        BL      do_syscall_trace_exit,%r2
         ldo     TASK_REGS(%r1),%r26
 
         ldil    L%syscall_exit_rfi,%r1
diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c
index b99b39f1da02..553b09855cfd 100644
--- a/arch/parisc/kernel/traps.c
+++ b/arch/parisc/kernel/traps.c
@@ -807,7 +807,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
 }
 
 
-int __init check_ivt(void *iva)
+void __init initialize_ivt(const void *iva)
 {
         extern u32 os_hpmc_size;
         extern const u32 os_hpmc[];
@@ -818,8 +818,8 @@ int __init check_ivt(void *iva)
         u32 *hpmcp;
         u32 length;
 
-        if (strcmp((char *)iva, "cows can fly"))
-                return -1;
+        if (strcmp((const char *)iva, "cows can fly"))
+                panic("IVT invalid");
 
         ivap = (u32 *)iva;
 
@@ -839,28 +839,23 @@ int __init check_ivt(void *iva)
             check += ivap[i];
 
         ivap[5] = -check;
-
-        return 0;
 }
         
-#ifndef CONFIG_64BIT
-extern const void fault_vector_11;
-#endif
-extern const void fault_vector_20;
 
-void __init trap_init(void)
+/* early_trap_init() is called before we set up kernel mappings and
+ * write-protect the kernel */
+void  __init early_trap_init(void)
 {
-        void *iva;
+        extern const void fault_vector_20;
 
-        if (boot_cpu_data.cpu_type >= pcxu)
-                iva = (void *) &fault_vector_20;
-        else
-#ifdef CONFIG_64BIT
-                panic("Can't boot 64-bit OS on PA1.1 processor!");
-#else
-                iva = (void *) &fault_vector_11;
+#ifndef CONFIG_64BIT
+        extern const void fault_vector_11;
+        initialize_ivt(&fault_vector_11);
 #endif
 
-        if (check_ivt(iva))
-                panic("IVT invalid");
+        initialize_ivt(&fault_vector_20);
+}
+
+void __init trap_init(void)
+{
 }
diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S
index 0dacc5ca555a..308f29081d46 100644
--- a/arch/parisc/kernel/vmlinux.lds.S
+++ b/arch/parisc/kernel/vmlinux.lds.S
@@ -60,7 +60,7 @@ SECTIONS
                 EXIT_DATA
         }
         PERCPU_SECTION(8)
-        . = ALIGN(PAGE_SIZE);
+        . = ALIGN(HUGEPAGE_SIZE);
         __init_end = .;
         /* freed after init ends here */
 
@@ -116,7 +116,7 @@ SECTIONS
          * that we can properly leave these
          * as writable
          */
-        . = ALIGN(PAGE_SIZE);
+        . = ALIGN(HUGEPAGE_SIZE);
         data_start = .;
 
         EXCEPTION_TABLE(8)
@@ -135,8 +135,11 @@ SECTIONS
         _edata = .;
 
         /* BSS */
-        BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 8)
+        BSS_SECTION(PAGE_SIZE, PAGE_SIZE, PAGE_SIZE)
+
+        /* bootmap is allocated in setup_bootmem() directly behind bss. */
 
+        . = ALIGN(HUGEPAGE_SIZE);
         _end = . ;
 
         STABS_DEBUG