diff options
Diffstat (limited to 'arch/parisc/kernel/pci.c')
-rw-r--r-- | arch/parisc/kernel/pci.c | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c index 64f2764a8cef..c99f3dde455c 100644 --- a/arch/parisc/kernel/pci.c +++ b/arch/parisc/kernel/pci.c | |||
@@ -171,24 +171,6 @@ void pcibios_set_master(struct pci_dev *dev) | |||
171 | } | 171 | } |
172 | 172 | ||
173 | 173 | ||
174 | void __init pcibios_init_bus(struct pci_bus *bus) | ||
175 | { | ||
176 | struct pci_dev *dev = bus->self; | ||
177 | unsigned short bridge_ctl; | ||
178 | |||
179 | /* We deal only with pci controllers and pci-pci bridges. */ | ||
180 | if (!dev || (dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) | ||
181 | return; | ||
182 | |||
183 | /* PCI-PCI bridge - set the cache line and default latency | ||
184 | (32) for primary and secondary buses. */ | ||
185 | pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 32); | ||
186 | |||
187 | pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bridge_ctl); | ||
188 | bridge_ctl |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR; | ||
189 | pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bridge_ctl); | ||
190 | } | ||
191 | |||
192 | /* | 174 | /* |
193 | * pcibios align resources() is called every time generic PCI code | 175 | * pcibios align resources() is called every time generic PCI code |
194 | * wants to generate a new address. The process of looking for | 176 | * wants to generate a new address. The process of looking for |