aboutsummaryrefslogtreecommitdiffstats
path: root/arch/parisc/kernel/pacache.S
diff options
context:
space:
mode:
Diffstat (limited to 'arch/parisc/kernel/pacache.S')
-rw-r--r--arch/parisc/kernel/pacache.S88
1 files changed, 44 insertions, 44 deletions
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 5e1de6072be5..b743a80eaba0 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -605,14 +605,14 @@ ENTRY(copy_user_page_asm)
605 convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */ 605 convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
606 convert_phys_for_tlb_insert20 %r23 /* convert phys addr to tlb insert format */ 606 convert_phys_for_tlb_insert20 %r23 /* convert phys addr to tlb insert format */
607 depd %r24,63,22, %r28 /* Form aliased virtual address 'to' */ 607 depd %r24,63,22, %r28 /* Form aliased virtual address 'to' */
608 depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */ 608 depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */
609 copy %r28, %r29 609 copy %r28, %r29
610 depdi 1, 41,1, %r29 /* Form aliased virtual address 'from' */ 610 depdi 1, 41,1, %r29 /* Form aliased virtual address 'from' */
611#else 611#else
612 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 612 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
613 extrw,u %r23, 24,25, %r23 /* convert phys addr to tlb insert format */ 613 extrw,u %r23, 24,25, %r23 /* convert phys addr to tlb insert format */
614 depw %r24, 31,22, %r28 /* Form aliased virtual address 'to' */ 614 depw %r24, 31,22, %r28 /* Form aliased virtual address 'to' */
615 depwi 0, 31,12, %r28 /* Clear any offset bits */ 615 depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
616 copy %r28, %r29 616 copy %r28, %r29
617 depwi 1, 9,1, %r29 /* Form aliased virtual address 'from' */ 617 depwi 1, 9,1, %r29 /* Form aliased virtual address 'from' */
618#endif 618#endif
@@ -762,7 +762,7 @@ ENTRY(clear_user_page_asm)
762#else 762#else
763 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 763 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
764 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ 764 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
765 depwi 0, 31,12, %r28 /* Clear any offset bits */ 765 depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
766#endif 766#endif
767 767
768 /* Purge any old translation */ 768 /* Purge any old translation */
@@ -846,7 +846,7 @@ ENTRY(flush_dcache_page_asm)
846#else 846#else
847 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 847 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
848 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ 848 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
849 depwi 0, 31,12, %r28 /* Clear any offset bits */ 849 depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
850#endif 850#endif
851 851
852 /* Purge any old translation */ 852 /* Purge any old translation */
@@ -860,7 +860,7 @@ ENTRY(flush_dcache_page_asm)
860#endif 860#endif
861 861
862 ldil L%dcache_stride, %r1 862 ldil L%dcache_stride, %r1
863 ldw R%dcache_stride(%r1), %r1 863 ldw R%dcache_stride(%r1), r31
864 864
865#ifdef CONFIG_64BIT 865#ifdef CONFIG_64BIT
866 depdi,z 1, 63-PAGE_SHIFT,1, %r25 866 depdi,z 1, 63-PAGE_SHIFT,1, %r25
@@ -868,26 +868,26 @@ ENTRY(flush_dcache_page_asm)
868 depwi,z 1, 31-PAGE_SHIFT,1, %r25 868 depwi,z 1, 31-PAGE_SHIFT,1, %r25
869#endif 869#endif
870 add %r28, %r25, %r25 870 add %r28, %r25, %r25
871 sub %r25, %r1, %r25 871 sub %r25, r31, %r25
872 872
873 873
8741: fdc,m %r1(%r28) 8741: fdc,m r31(%r28)
875 fdc,m %r1(%r28) 875 fdc,m r31(%r28)
876 fdc,m %r1(%r28) 876 fdc,m r31(%r28)
877 fdc,m %r1(%r28) 877 fdc,m r31(%r28)
878 fdc,m %r1(%r28) 878 fdc,m r31(%r28)
879 fdc,m %r1(%r28) 879 fdc,m r31(%r28)
880 fdc,m %r1(%r28) 880 fdc,m r31(%r28)
881 fdc,m %r1(%r28) 881 fdc,m r31(%r28)
882 fdc,m %r1(%r28) 882 fdc,m r31(%r28)
883 fdc,m %r1(%r28) 883 fdc,m r31(%r28)
884 fdc,m %r1(%r28) 884 fdc,m r31(%r28)
885 fdc,m %r1(%r28) 885 fdc,m r31(%r28)
886 fdc,m %r1(%r28) 886 fdc,m r31(%r28)
887 fdc,m %r1(%r28) 887 fdc,m r31(%r28)
888 fdc,m %r1(%r28) 888 fdc,m r31(%r28)
889 cmpb,COND(<<) %r28, %r25,1b 889 cmpb,COND(<<) %r28, %r25,1b
890 fdc,m %r1(%r28) 890 fdc,m r31(%r28)
891 891
892 sync 892 sync
893 893
@@ -918,11 +918,11 @@ ENTRY(flush_icache_page_asm)
918#endif 918#endif
919 convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */ 919 convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */
920 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ 920 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
921 depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */ 921 depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */
922#else 922#else
923 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 923 extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */
924 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ 924 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
925 depwi 0, 31,12, %r28 /* Clear any offset bits */ 925 depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */
926#endif 926#endif
927 927
928 /* Purge any old translation */ 928 /* Purge any old translation */
@@ -936,7 +936,7 @@ ENTRY(flush_icache_page_asm)
936#endif 936#endif
937 937
938 ldil L%icache_stride, %r1 938 ldil L%icache_stride, %r1
939 ldw R%icache_stride(%r1), %r1 939 ldw R%icache_stride(%r1), %r31
940 940
941#ifdef CONFIG_64BIT 941#ifdef CONFIG_64BIT
942 depdi,z 1, 63-PAGE_SHIFT,1, %r25 942 depdi,z 1, 63-PAGE_SHIFT,1, %r25
@@ -944,28 +944,28 @@ ENTRY(flush_icache_page_asm)
944 depwi,z 1, 31-PAGE_SHIFT,1, %r25 944 depwi,z 1, 31-PAGE_SHIFT,1, %r25
945#endif 945#endif
946 add %r28, %r25, %r25 946 add %r28, %r25, %r25
947 sub %r25, %r1, %r25 947 sub %r25, %r31, %r25
948 948
949 949
950 /* fic only has the type 26 form on PA1.1, requiring an 950 /* fic only has the type 26 form on PA1.1, requiring an
951 * explicit space specification, so use %sr4 */ 951 * explicit space specification, so use %sr4 */
9521: fic,m %r1(%sr4,%r28) 9521: fic,m %r31(%sr4,%r28)
953 fic,m %r1(%sr4,%r28) 953 fic,m %r31(%sr4,%r28)
954 fic,m %r1(%sr4,%r28) 954 fic,m %r31(%sr4,%r28)
955 fic,m %r1(%sr4,%r28) 955 fic,m %r31(%sr4,%r28)
956 fic,m %r1(%sr4,%r28) 956 fic,m %r31(%sr4,%r28)
957 fic,m %r1(%sr4,%r28) 957 fic,m %r31(%sr4,%r28)
958 fic,m %r1(%sr4,%r28) 958 fic,m %r31(%sr4,%r28)
959 fic,m %r1(%sr4,%r28) 959 fic,m %r31(%sr4,%r28)
960 fic,m %r1(%sr4,%r28) 960 fic,m %r31(%sr4,%r28)
961 fic,m %r1(%sr4,%r28) 961 fic,m %r31(%sr4,%r28)
962 fic,m %r1(%sr4,%r28) 962 fic,m %r31(%sr4,%r28)
963 fic,m %r1(%sr4,%r28) 963 fic,m %r31(%sr4,%r28)
964 fic,m %r1(%sr4,%r28) 964 fic,m %r31(%sr4,%r28)
965 fic,m %r1(%sr4,%r28) 965 fic,m %r31(%sr4,%r28)
966 fic,m %r1(%sr4,%r28) 966 fic,m %r31(%sr4,%r28)
967 cmpb,COND(<<) %r28, %r25,1b 967 cmpb,COND(<<) %r28, %r25,1b
968 fic,m %r1(%sr4,%r28) 968 fic,m %r31(%sr4,%r28)
969 969
970 sync 970 sync
971 971