34 files changed, 209 insertions, 99 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index df51e78a72cc..574c43000699 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -546,6 +546,7 @@ config SGI_IP28
         # select SYS_HAS_EARLY_PRINTK
         select SYS_SUPPORTS_64BIT_KERNEL
         select SYS_SUPPORTS_BIG_ENDIAN
+        select MIPS_L1_CACHE_SHIFT_7
       help
         This is the SGI Indigo2 with R10000 processor.  To compile a Linux
         kernel that runs on these, say Y here.
@@ -2029,7 +2030,9 @@ config MIPS_CMP
         bool "MIPS CMP framework support (DEPRECATED)"
         depends on SYS_SUPPORTS_MIPS_CMP
         select MIPS_GIC_IPI
+        select SMP
         select SYNC_R4K
+        select SYS_SUPPORTS_SMP
         select WEAK_ORDERING
         default n
         help
@@ -2396,8 +2399,6 @@ source "kernel/Kconfig.preempt"
 
 config KEXEC
         bool "Kexec system call"
-        select CRYPTO
-        select CRYPTO_SHA256
         help
           kexec is a system call that implements the ability to shutdown your
           current kernel, and to start another kernel.  It is like a reboot
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 9336509f47ad..bbac51e11179 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -113,7 +113,16 @@ predef-le += -DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__
 cflags-$(CONFIG_CPU_BIG_ENDIAN)         += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB $(undef-all) $(predef-be))
 cflags-$(CONFIG_CPU_LITTLE_ENDIAN)      += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL $(undef-all) $(predef-le))
 
-cflags-$(CONFIG_CPU_HAS_SMARTMIPS)      += $(call cc-option,-msmartmips)
+# For smartmips configurations, there are hundreds of warnings due to ISA overrides
+# in assembly and header files. smartmips is only supported for MIPS32r1 onwards
+# and there is no support for 64-bit. Various '.set mips2' or '.set mips3' or
+# similar directives in the kernel will spam the build logs with the following warnings:
+# Warning: the `smartmips' extension requires MIPS32 revision 1 or greater
+# or
+# Warning: the 64-bit MIPS architecture does not support the `smartmips' extension
+# Pass -Wa,--no-warn to disable all assembler warnings until the kernel code has
+# been fixed properly.
+cflags-$(CONFIG_CPU_HAS_SMARTMIPS)      += $(call cc-option,-msmartmips) -Wa,--no-warn
 cflags-$(CONFIG_CPU_MICROMIPS) += $(call cc-option,-mmicromips)
 
 cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
diff --git a/arch/mips/alchemy/devboards/db1200.c b/arch/mips/alchemy/devboards/db1200.c
index 776188908dfc..8c13675a12e7 100644
--- a/arch/mips/alchemy/devboards/db1200.c
+++ b/arch/mips/alchemy/devboards/db1200.c
@@ -847,6 +847,7 @@ int __init db1200_dev_setup(void)
                         pr_warn("DB1200: cant get I2C close to 50MHz\n");
                 else
                         clk_set_rate(c, pfc);
+                clk_prepare_enable(c);
                 clk_put(c);
         }
 
@@ -922,11 +923,6 @@ int __init db1200_dev_setup(void)
         }
 
         /* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
-        c = clk_get(NULL, "psc1_intclk");
-        if (!IS_ERR(c)) {
-                clk_prepare_enable(c);
-                clk_put(c);
-        }
         __raw_writel(PSC_SEL_CLK_SERCLK,
             (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
         wmb();
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 2b63e7e7d3d3..ad439c273003 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -59,12 +59,21 @@ static void bcm47xx_machine_restart(char *command)
         switch (bcm47xx_bus_type) {
 #ifdef CONFIG_BCM47XX_SSB
         case BCM47XX_BUS_TYPE_SSB:
-                ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 3);
+                if (bcm47xx_bus.ssb.chip_id == 0x4785)
+                        write_c0_diag4(1 << 22);
+                ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
+                if (bcm47xx_bus.ssb.chip_id == 0x4785) {
+                        __asm__ __volatile__(
+                                ".set\tmips3\n\t"
+                                "sync\n\t"
+                                "wait\n\t"
+                                ".set\tmips0");
+                }
                 break;
 #endif
 #ifdef CONFIG_BCM47XX_BCMA
         case BCM47XX_BUS_TYPE_BCMA:
-                bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 3);
+                bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
                 break;
 #endif
         }
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index 37eb2d1fa69a..b94bf44d8d8e 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -434,7 +434,7 @@ static void bcm63xx_init_irq(void)
                 irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
                 irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
                 irq_stat_addr[1] = 0;
-                irq_stat_addr[1] = 0;
+                irq_mask_addr[1] = 0;
                 irq_bits = 32;
                 ext_irq_count = 4;
                 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
@@ -443,7 +443,7 @@ static void bcm63xx_init_irq(void)
                 irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
                 irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
                 irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
-                irq_stat_addr[1] += PERF_IRQMASK_6328_REG(1);
+                irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1);
                 irq_bits = 64;
                 ext_irq_count = 4;
                 is_ext_irq_cascaded = 1;
diff --git a/arch/mips/boot/compressed/decompress.c b/arch/mips/boot/compressed/decompress.c
index b49c7adbfa89..31903cf9709d 100644
--- a/arch/mips/boot/compressed/decompress.c
+++ b/arch/mips/boot/compressed/decompress.c
@@ -13,6 +13,7 @@
 
 #include <linux/types.h>
 #include <linux/kernel.h>
+#include <linux/string.h>
 
 #include <asm/addrspace.h>
 
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 008e9c8b8eac..38f4c32e2816 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -263,7 +263,6 @@ static uint64_t crashk_size, crashk_base;
 static int octeon_uart;
 
 extern asmlinkage void handle_int(void);
-extern asmlinkage void plat_irq_dispatch(void);
 
 /**
  * Return non zero if we are currently running in the Octeon simulator
@@ -458,6 +457,18 @@ static void octeon_halt(void)
         octeon_kill_core(NULL);
 }
 
+static char __read_mostly octeon_system_type[80];
+
+static int __init init_octeon_system_type(void)
+{
+        snprintf(octeon_system_type, sizeof(octeon_system_type), "%s (%s)",
+                cvmx_board_type_to_string(octeon_bootinfo->board_type),
+                octeon_model_get_string(read_c0_prid()));
+
+        return 0;
+}
+early_initcall(init_octeon_system_type);
+
 /**
  * Return a string representing the system type
  *
@@ -465,11 +476,7 @@ static void octeon_halt(void)
  */
 const char *octeon_board_type_string(void)
 {
-        static char name[80];
-        sprintf(name, "%s (%s)",
-                cvmx_board_type_to_string(octeon_bootinfo->board_type),
-                octeon_model_get_string(read_c0_prid()));
-        return name;
+        return octeon_system_type;
 }
 
 const char *get_system_type(void)
diff --git a/arch/mips/include/asm/cop2.h b/arch/mips/include/asm/cop2.h
index d0352983b94d..51f80bd36fcc 100644
--- a/arch/mips/include/asm/cop2.h
+++ b/arch/mips/include/asm/cop2.h
@@ -16,8 +16,8 @@
 extern void octeon_cop2_save(struct octeon_cop2_state *);
 extern void octeon_cop2_restore(struct octeon_cop2_state *);
 
-#define cop2_save(r)            octeon_cop2_save(r)
-#define cop2_restore(r)         octeon_cop2_restore(r)
+#define cop2_save(r)            octeon_cop2_save(&(r)->thread.cp2)
+#define cop2_restore(r)         octeon_cop2_restore(&(r)->thread.cp2)
 
 #define cop2_present            1
 #define cop2_lazy_restore       1
@@ -26,26 +26,26 @@ extern void octeon_cop2_restore(struct octeon_cop2_state *);
 
 extern void nlm_cop2_save(struct nlm_cop2_state *);
 extern void nlm_cop2_restore(struct nlm_cop2_state *);
-#define cop2_save(r)            nlm_cop2_save(r)
-#define cop2_restore(r)         nlm_cop2_restore(r)
+
+#define cop2_save(r)            nlm_cop2_save(&(r)->thread.cp2)
+#define cop2_restore(r)         nlm_cop2_restore(&(r)->thread.cp2)
 
 #define cop2_present            1
 #define cop2_lazy_restore       0
 
 #elif defined(CONFIG_CPU_LOONGSON3)
 
-#define cop2_save(r)
-#define cop2_restore(r)
-
 #define cop2_present            1
 #define cop2_lazy_restore       1
+#define cop2_save(r)            do { (r); } while (0)
+#define cop2_restore(r)         do { (r); } while (0)
 
 #else
 
 #define cop2_present            0
 #define cop2_lazy_restore       0
-#define cop2_save(r)
-#define cop2_restore(r)
+#define cop2_save(r)            do { (r); } while (0)
+#define cop2_restore(r)         do { (r); } while (0)
 #endif
 
 enum cu2_ops {
diff --git a/arch/mips/include/asm/eva.h b/arch/mips/include/asm/eva.h
new file mode 100644
index 000000000000..a3d1807f227c
--- /dev/null
+++ b/arch/mips/include/asm/eva.h
@@ -0,0 +1,43 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2014, Imagination Technologies Ltd.
+ *
+ * EVA functions for generic code
+ */
+
+#ifndef _ASM_EVA_H
+#define _ASM_EVA_H
+
+#include <kernel-entry-init.h>
+
+#ifdef __ASSEMBLY__
+
+#ifdef CONFIG_EVA
+
+/*
+ * EVA early init code
+ *
+ * Platforms must define their own 'platform_eva_init' macro in
+ * their kernel-entry-init.h header. This macro usually does the
+ * platform specific configuration of the segmentation registers,
+ * and it is normally called from assembly code.
+ *
+ */
+
+.macro eva_init
+platform_eva_init
+.endm
+
+#else
+
+.macro eva_init
+.endm
+
+#endif /* CONFIG_EVA */
+
+#endif /* __ASSEMBLY__ */
+
+#endif
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 3f20b2111d56..d7699cf7e135 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -49,7 +49,7 @@
 #endif
 #define GICBIS(reg, mask, bits)                 \
         do { u32 data;                          \
-                GICREAD((reg), data);           \
+                GICREAD(reg, data);             \
                 data &= ~(mask);                \
                 data |= ((bits) & (mask));      \
                 GICWRITE((reg), data);          \
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index ae1f7b24dd1a..39f07aec640c 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -26,6 +26,8 @@ static inline int irq_canonicalize(int irq)
 #define irq_canonicalize(irq) (irq)     /* Sane hardware, sane code ... */
 #endif
 
+asmlinkage void plat_irq_dispatch(void);
+
 extern void do_IRQ(unsigned int irq);
 
 extern void arch_init_irq(void);
diff --git a/arch/mips/include/asm/mach-ip28/spaces.h b/arch/mips/include/asm/mach-ip28/spaces.h
index 5d6a76434d00..c4a912733b65 100644
--- a/arch/mips/include/asm/mach-ip28/spaces.h
+++ b/arch/mips/include/asm/mach-ip28/spaces.h
@@ -11,15 +11,8 @@
 #ifndef _ASM_MACH_IP28_SPACES_H
 #define _ASM_MACH_IP28_SPACES_H
 
-#define CAC_BASE        _AC(0xa800000000000000, UL)
-
-#define HIGHMEM_START   (~0UL)
-
 #define PHYS_OFFSET     _AC(0x20000000, UL)
 
-#define UNCAC_BASE      _AC(0xc0000000, UL)     /* 0xa0000000 + PHYS_OFFSET */
-#define IO_BASE         UNCAC_BASE
-
 #include <asm/mach-generic/spaces.h>
 
 #endif /* _ASM_MACH_IP28_SPACES_H */
diff --git a/arch/mips/include/asm/mach-malta/kernel-entry-init.h b/arch/mips/include/asm/mach-malta/kernel-entry-init.h
index 77eeda77e73c..0cf8622db27f 100644
--- a/arch/mips/include/asm/mach-malta/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-malta/kernel-entry-init.h
@@ -10,14 +10,15 @@
 #ifndef __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
 #define __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
 
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+
         /*
          * Prepare segments for EVA boot:
          *
          * This is in case the processor boots in legacy configuration
          * (SI_EVAReset is de-asserted and CONFIG5.K == 0)
          *
-         * On entry, t1 is loaded with CP0_CONFIG
-         *
          * ========================= Mappings =============================
          * Virtual memory           Physical memory           Mapping
          * 0x00000000 - 0x7fffffff  0x80000000 - 0xfffffffff   MUSUK (kuseg)
@@ -30,12 +31,20 @@
          *
          *
          * Lowmem is expanded to 2GB
+         *
+         * The following code uses the t0, t1, t2 and ra registers without
+         * previously preserving them.
+         *
          */
-        .macro  eva_entry
+        .macro  platform_eva_init
+
+        .set    push
+        .set    reorder
         /*
          * Get Config.K0 value and use it to program
          * the segmentation registers
          */
+        mfc0    t1, CP0_CONFIG
         andi    t1, 0x7 /* CCA */
         move    t2, t1
         ins     t2, t1, 16, 3
@@ -77,6 +86,8 @@
         mtc0    t0, $16, 5
         sync
         jal     mips_ihb
+
+        .set    pop
         .endm
 
         .macro  kernel_entry_setup
@@ -95,7 +106,7 @@
         sll     t0, t0, 6   /* SC bit */
         bgez    t0, 9f
 
-        eva_entry
+        platform_eva_init
         b       0f
 9:
         /* Assume we came from YAMON... */
@@ -127,8 +138,7 @@ nonsc_processor:
 #ifdef CONFIG_EVA
         sync
         ehb
-        mfc0    t1, CP0_CONFIG
-        eva_entry
+        platform_eva_init
 #endif
         .endm
 
diff --git a/arch/mips/include/asm/mach-netlogic/topology.h b/arch/mips/include/asm/mach-netlogic/topology.h
index ceeb1f5e7129..0eb43c832b25 100644
--- a/arch/mips/include/asm/mach-netlogic/topology.h
+++ b/arch/mips/include/asm/mach-netlogic/topology.h
@@ -10,13 +10,6 @@
 
 #include <asm/mach-netlogic/multi-node.h>
 
-#ifdef CONFIG_SMP
-#define topology_physical_package_id(cpu)       cpu_to_node(cpu)
-#define topology_core_id(cpu)   (cpu_logical_map(cpu) / NLM_THREADS_PER_CORE)
-#define topology_thread_cpumask(cpu)            (&cpu_sibling_map[cpu])
-#define topology_core_cpumask(cpu)      cpumask_of_node(cpu_to_node(cpu))
-#endif
-
 #include <asm-generic/topology.h>
 
 #endif /* _ASM_MACH_NETLOGIC_TOPOLOGY_H */
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index 5699ec3a71af..3be81803595d 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -37,7 +37,7 @@
 
 /*
  * This is used for calculating the real page sizes
- * for FTLB or VTLB + FTLB confugrations.
+ * for FTLB or VTLB + FTLB configurations.
  */
 static inline unsigned int page_size_ftlb(unsigned int mmuextdef)
 {
@@ -223,7 +223,8 @@ static inline int pfn_valid(unsigned long pfn)
 
 #endif
 
-#define virt_to_page(kaddr)     pfn_to_page(PFN_DOWN(virt_to_phys(kaddr)))
+#define virt_to_page(kaddr)     pfn_to_page(PFN_DOWN(virt_to_phys((void *)     \
+                                                                  (kaddr))))
 
 extern int __virt_addr_valid(const volatile void *kaddr);
 #define virt_addr_valid(kaddr)                                          \
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index 027c74db13f9..df49a308085c 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -122,6 +122,9 @@ do {									\
         }                                                               \
 } while(0)
 
+extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
+        pte_t pteval);
+
 #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
 
 #define pte_none(pte)           (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
@@ -145,7 +148,6 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
                 }
         }
 }
-#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
 
 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
@@ -183,7 +185,6 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
         }
 #endif
 }
-#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
 
 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
@@ -390,15 +391,12 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 
 extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
         pte_t pte);
-extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
-        pte_t pte);
 
 static inline void update_mmu_cache(struct vm_area_struct *vma,
         unsigned long address, pte_t *ptep)
 {
         pte_t pte = *ptep;
         __update_tlb(vma, address, pte);
-        __update_cache(vma, address, pte);
 }
 
 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
index 1e0f20a9cdda..eacf865d21c2 100644
--- a/arch/mips/include/asm/smp.h
+++ b/arch/mips/include/asm/smp.h
@@ -37,11 +37,6 @@ extern int __cpu_logical_map[NR_CPUS];
 
 #define NO_PROC_ID      (-1)
 
-#define topology_physical_package_id(cpu)       (cpu_data[cpu].package)
-#define topology_core_id(cpu)                   (cpu_data[cpu].core)
-#define topology_core_cpumask(cpu)              (&cpu_core_map[cpu])
-#define topology_thread_cpumask(cpu)            (&cpu_sibling_map[cpu])
-
 #define SMP_RESCHEDULE_YOURSELF 0x1     /* XXX braindead */
 #define SMP_CALL_FUNCTION       0x2
 /* Octeon - Tell another core to flush its icache */
diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h
index 495c1041a2cc..b928b6f898cd 100644
--- a/arch/mips/include/asm/switch_to.h
+++ b/arch/mips/include/asm/switch_to.h
@@ -92,7 +92,7 @@ do {									\
                         KSTK_STATUS(prev) &= ~ST0_CU2;                  \
                 __c0_stat = read_c0_status();                           \
                 write_c0_status(__c0_stat | ST0_CU2);                   \
-                cop2_save(&prev->thread.cp2);                           \
+                cop2_save(prev);                                        \
                 write_c0_status(__c0_stat & ~ST0_CU2);                  \
         }                                                               \
         __clear_software_ll_bit();                                      \
@@ -111,7 +111,7 @@ do {									\
                         (KSTK_STATUS(current) & ST0_CU2)) {             \
                 __c0_stat = read_c0_status();                           \
                 write_c0_status(__c0_stat | ST0_CU2);                   \
-                cop2_restore(&current->thread.cp2);                     \
+                cop2_restore(current);                                  \
                 write_c0_status(__c0_stat & ~ST0_CU2);                  \
         }                                                               \
         if (cpu_has_dsp)                                                \
diff --git a/arch/mips/include/asm/syscall.h b/arch/mips/include/asm/syscall.h
index 17960fe7a8ce..cdf68b33bd65 100644
--- a/arch/mips/include/asm/syscall.h
+++ b/arch/mips/include/asm/syscall.h
@@ -131,10 +131,12 @@ static inline int syscall_get_arch(void)
 {
         int arch = EM_MIPS;
 #ifdef CONFIG_64BIT
-        if (!test_thread_flag(TIF_32BIT_REGS))
+        if (!test_thread_flag(TIF_32BIT_REGS)) {
                 arch |= __AUDIT_ARCH_64BIT;
-        if (test_thread_flag(TIF_32BIT_ADDR))
-                arch |= __AUDIT_ARCH_CONVENTION_MIPS64_N32;
+                /* N32 sets only TIF_32BIT_ADDR */
+                if (test_thread_flag(TIF_32BIT_ADDR))
+                        arch |= __AUDIT_ARCH_CONVENTION_MIPS64_N32;
+        }
 #endif
 #if defined(__LITTLE_ENDIAN)
         arch |=  __AUDIT_ARCH_LE;
diff --git a/arch/mips/include/asm/topology.h b/arch/mips/include/asm/topology.h
index 20ea4859c822..3e307ec2afba 100644
--- a/arch/mips/include/asm/topology.h
+++ b/arch/mips/include/asm/topology.h
@@ -9,5 +9,13 @@
 #define __ASM_TOPOLOGY_H
 
 #include <topology.h>
+#include <linux/smp.h>
+
+#ifdef CONFIG_SMP
+#define topology_physical_package_id(cpu)       (cpu_data[cpu].package)
+#define topology_core_id(cpu)                   (cpu_data[cpu].core)
+#define topology_core_cpumask(cpu)              (&cpu_core_map[cpu])
+#define topology_thread_cpumask(cpu)            (&cpu_sibling_map[cpu])
+#endif
 
 #endif /* __ASM_TOPOLOGY_H */
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index 9bc13eaf9d67..fdb4923777d1 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -373,16 +373,18 @@
 #define __NR_sched_getattr              (__NR_Linux + 350)
 #define __NR_renameat2                  (__NR_Linux + 351)
 #define __NR_seccomp                    (__NR_Linux + 352)
+#define __NR_getrandom                  (__NR_Linux + 353)
+#define __NR_memfd_create               (__NR_Linux + 354)
 
 /*
  * Offset of the last Linux o32 flavoured syscall
  */
-#define __NR_Linux_syscalls             352
+#define __NR_Linux_syscalls             354
 
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
 
 #define __NR_O32_Linux                  4000
-#define __NR_O32_Linux_syscalls         352
+#define __NR_O32_Linux_syscalls         354
 
 #if _MIPS_SIM == _MIPS_SIM_ABI64
 
@@ -703,16 +705,18 @@
 #define __NR_sched_getattr              (__NR_Linux + 310)
 #define __NR_renameat2                  (__NR_Linux + 311)
 #define __NR_seccomp                    (__NR_Linux + 312)
+#define __NR_getrandom                  (__NR_Linux + 313)
+#define __NR_memfd_create               (__NR_Linux + 314)
 
 /*
  * Offset of the last Linux 64-bit flavoured syscall
  */
-#define __NR_Linux_syscalls             312
+#define __NR_Linux_syscalls             314
 
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
 
 #define __NR_64_Linux                   5000
-#define __NR_64_Linux_syscalls          312
+#define __NR_64_Linux_syscalls          314
 
 #if _MIPS_SIM == _MIPS_SIM_NABI32
 
@@ -1037,15 +1041,17 @@
 #define __NR_sched_getattr              (__NR_Linux + 314)
 #define __NR_renameat2                  (__NR_Linux + 315)
 #define __NR_seccomp                    (__NR_Linux + 316)
+#define __NR_getrandom                  (__NR_Linux + 317)
+#define __NR_memfd_create               (__NR_Linux + 318)
 
 /*
  * Offset of the last N32 flavoured syscall
  */
-#define __NR_Linux_syscalls             316
+#define __NR_Linux_syscalls             318
 
 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
 
 #define __NR_N32_Linux                  6000
-#define __NR_N32_Linux_syscalls         316
+#define __NR_N32_Linux_syscalls         318
 
 #endif /* _UAPI_ASM_UNISTD_H */
diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S
index 6f4f739dad96..e6e97d2a5c9e 100644
--- a/arch/mips/kernel/cps-vec.S
+++ b/arch/mips/kernel/cps-vec.S
@@ -13,6 +13,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/asmmacro.h>
 #include <asm/cacheops.h>
+#include <asm/eva.h>
 #include <asm/mipsregs.h>
 #include <asm/mipsmtregs.h>
 #include <asm/pm.h>
@@ -166,6 +167,9 @@ dcache_done:
 1:      jal     mips_cps_core_init
          nop
 
+        /* Do any EVA initialization if necessary */
+        eva_init
+
         /*
          * Boot any other VPEs within this core that should be online, and
          * deactivate this VPE if it should be offline.
diff --git a/arch/mips/kernel/machine_kexec.c b/arch/mips/kernel/machine_kexec.c
index 992e18474da5..50980bf3983e 100644
--- a/arch/mips/kernel/machine_kexec.c
+++ b/arch/mips/kernel/machine_kexec.c
@@ -71,8 +71,12 @@ machine_kexec(struct kimage *image)
         kexec_start_address =
                 (unsigned long) phys_to_virt(image->start);
 
-        kexec_indirection_page =
-                (unsigned long) phys_to_virt(image->head & PAGE_MASK);
+        if (image->type == KEXEC_TYPE_DEFAULT) {
+                kexec_indirection_page =
+                        (unsigned long) phys_to_virt(image->head & PAGE_MASK);
+        } else {
+                kexec_indirection_page = (unsigned long)&image->head;
+        }
 
         memcpy((void*)reboot_code_buffer, relocate_new_kernel,
                relocate_new_kernel_size);
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 14bf74b0f51c..b63f2482f288 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -558,7 +558,7 @@ static int mipspmu_get_irq(void)
         if (mipspmu.irq >= 0) {
                 /* Request my own irq handler. */
                 err = request_irq(mipspmu.irq, mipsxx_pmu_handle_irq,
-                        IRQF_PERCPU | IRQF_NOBALANCING,
+                        IRQF_PERCPU | IRQF_NOBALANCING | IRQF_NO_THREAD,
                         "mips_perf_pmu", NULL);
                 if (err) {
                         pr_warning("Unable to request IRQ%d for MIPS "
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index f93b4cbec739..744cd10ba599 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -577,3 +577,5 @@ EXPORT(sys_call_table)
         PTR     sys_sched_getattr               /* 4350 */
         PTR     sys_renameat2
         PTR     sys_seccomp
+        PTR     sys_getrandom
+        PTR     sys_memfd_create
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 03ebd9979ad2..002b1bc09c38 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -432,4 +432,6 @@ EXPORT(sys_call_table)
         PTR     sys_sched_getattr               /* 5310 */
         PTR     sys_renameat2
         PTR     sys_seccomp
+        PTR     sys_getrandom
+        PTR     sys_memfd_create
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index ebc9228e2e15..ca6cbbe9805b 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -425,4 +425,6 @@ EXPORT(sysn32_call_table)
         PTR     sys_sched_getattr
         PTR     sys_renameat2                   /* 6315 */
         PTR     sys_seccomp
+        PTR     sys_getrandom
+        PTR     sys_memfd_create
         .size   sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 13b964fddc4a..9e10d11fbb84 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -113,15 +113,19 @@ trace_a_syscall:
         move    s0, t2                  # Save syscall pointer
         move    a0, sp
         /*
-         * syscall number is in v0 unless we called syscall(__NR_###)
+         * absolute syscall number is in v0 unless we called syscall(__NR_###)
          * where the real syscall number is in a0
          * note: NR_syscall is the first O32 syscall but the macro is
          * only defined when compiling with -mabi=32 (CONFIG_32BIT)
          * therefore __NR_O32_Linux is used (4000)
          */
-        addiu   a1, v0,  __NR_O32_Linux
-        bnez    v0, 1f /* __NR_syscall at offset 0 */
-        lw      a1, PT_R4(sp)
+        .set    push
+        .set    reorder
+        subu    t1, v0,  __NR_O32_Linux
+        move    a1, v0
+        bnez    t1, 1f /* __NR_syscall at offset 0 */
+        lw      a1, PT_R4(sp) /* Arg1 for __NR_syscall case */
+        .set    pop
 
 1:      jal     syscall_trace_enter
 
@@ -558,4 +562,6 @@ EXPORT(sys32_call_table)
         PTR     sys_sched_getattr               /* 4350 */
         PTR     sys_renameat2
         PTR     sys_seccomp
+        PTR     sys_getrandom
+        PTR     sys_memfd_create
         .size   sys32_call_table,.-sys32_call_table
diff --git a/arch/mips/loongson/loongson-3/cop2-ex.c b/arch/mips/loongson/loongson-3/cop2-ex.c
index 9182e8d2967c..b03e37d2071a 100644
--- a/arch/mips/loongson/loongson-3/cop2-ex.c
+++ b/arch/mips/loongson/loongson-3/cop2-ex.c
@@ -22,13 +22,13 @@
 static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
         void *data)
 {
-        int fpu_enabled;
+        int fpu_owned;
         int fr = !test_thread_flag(TIF_32BIT_FPREGS);
 
         switch (action) {
         case CU2_EXCEPTION:
                 preempt_disable();
-                fpu_enabled = read_c0_status() & ST0_CU1;
+                fpu_owned = __is_fpu_owner();
                 if (!fr)
                         set_c0_status(ST0_CU1 | ST0_CU2);
                 else
@@ -39,8 +39,8 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
                         KSTK_STATUS(current) |= ST0_FR;
                 else
                         KSTK_STATUS(current) &= ~ST0_FR;
-                /* If FPU is enabled, we needn't init or restore fp */
-                if(!fpu_enabled) {
+                /* If FPU is owned, we needn't init or restore fp */
+                if (!fpu_owned) {
                         set_thread_flag(TIF_USEDFPU);
                         if (!used_math()) {
                                 _init_fpu();
diff --git a/arch/mips/loongson/loongson-3/numa.c b/arch/mips/loongson/loongson-3/numa.c
index ca025a6ba559..37ed184398c6 100644
--- a/arch/mips/loongson/loongson-3/numa.c
+++ b/arch/mips/loongson/loongson-3/numa.c
@@ -24,8 +24,6 @@
 #include <asm/page.h>
 #include <asm/pgalloc.h>
 #include <asm/sections.h>
-#include <linux/bootmem.h>
-#include <linux/init.h>
 #include <linux/irq.h>
 #include <asm/bootinfo.h>
 #include <asm/mc146818-time.h>
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index f7b91d3a371d..7e3ea7766822 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -119,25 +119,36 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
 
 EXPORT_SYMBOL(__flush_anon_page);
 
-void __update_cache(struct vm_area_struct *vma, unsigned long address,
-        pte_t pte)
+static void mips_flush_dcache_from_pte(pte_t pteval, unsigned long address)
 {
         struct page *page;
-        unsigned long pfn, addr;
-        int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
+        unsigned long pfn = pte_pfn(pteval);
 
-        pfn = pte_pfn(pte);
         if (unlikely(!pfn_valid(pfn)))
                 return;
+
         page = pfn_to_page(pfn);
         if (page_mapping(page) && Page_dcache_dirty(page)) {
-                addr = (unsigned long) page_address(page);
-                if (exec || pages_do_alias(addr, address & PAGE_MASK))
-                        flush_data_cache_page(addr);
+                unsigned long page_addr = (unsigned long) page_address(page);
+
+                if (!cpu_has_ic_fills_f_dc ||
+                    pages_do_alias(page_addr, address & PAGE_MASK))
+                        flush_data_cache_page(page_addr);
                 ClearPageDcacheDirty(page);
         }
 }
 
+void set_pte_at(struct mm_struct *mm, unsigned long addr,
+        pte_t *ptep, pte_t pteval)
+{
+        if (cpu_has_dc_aliases || !cpu_has_ic_fills_f_dc) {
+                if (pte_present(pteval))
+                        mips_flush_dcache_from_pte(pteval, addr);
+        }
+
+        set_pte(ptep, pteval);
+}
+
 unsigned long _page_cachable_default;
 EXPORT_SYMBOL(_page_cachable_default);
 
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c
index 0c35dee0a215..8fddd2cdbff7 100644
--- a/arch/mips/mti-malta/malta-memory.c
+++ b/arch/mips/mti-malta/malta-memory.c
@@ -35,13 +35,19 @@ fw_memblock_t * __init fw_getmdesc(int eva)
         /* otherwise look in the environment */
 
         memsize_str = fw_getenv("memsize");
-        if (memsize_str)
-                tmp = kstrtol(memsize_str, 0, &memsize);
+        if (memsize_str) {
+                tmp = kstrtoul(memsize_str, 0, &memsize);
+                if (tmp)
+                        pr_warn("Failed to read the 'memsize' env variable.\n");
+        }
         if (eva) {
         /* Look for ememsize for EVA */
                 ememsize_str = fw_getenv("ememsize");
-                if (ememsize_str)
-                        tmp = kstrtol(ememsize_str, 0, &ememsize);
+                if (ememsize_str) {
+                        tmp = kstrtoul(ememsize_str, 0, &ememsize);
+                        if (tmp)
+                                pr_warn("Failed to read the 'ememsize' env variable.\n");
+                }
         }
         if (!memsize && !ememsize) {
                 pr_warn("memsize not set in YAMON, set to default (32Mb)\n");
diff --git a/arch/mips/net/bpf_jit.c b/arch/mips/net/bpf_jit.c
index 05a56619ece2..9f7ecbda250c 100644
--- a/arch/mips/net/bpf_jit.c
+++ b/arch/mips/net/bpf_jit.c
@@ -793,6 +793,7 @@ static int build_body(struct jit_ctx *ctx)
         const struct sock_filter *inst;
         unsigned int i, off, load_order, condt;
         u32 k, b_off __maybe_unused;
+        int tmp;
 
         for (i = 0; i < prog->len; i++) {
                 u16 code;
@@ -1332,9 +1333,9 @@ jmp_cmp:
                 case BPF_ANC | SKF_AD_PKTTYPE:
                         ctx->flags |= SEEN_SKB;
 
-                        off = pkt_type_offset();
+                        tmp = off = pkt_type_offset();
 
-                        if (off < 0)
+                        if (tmp < 0)
                                 return -1;
                         emit_load_byte(r_tmp, r_skb, off, ctx);
                         /* Keep only the last 3 bits */
diff --git a/arch/mips/pmcs-msp71xx/msp_irq.c b/arch/mips/pmcs-msp71xx/msp_irq.c
index 941744aabb51..f914c753de21 100644
--- a/arch/mips/pmcs-msp71xx/msp_irq.c
+++ b/arch/mips/pmcs-msp71xx/msp_irq.c
@@ -51,7 +51,7 @@ static inline void sec_int_dispatch(void)  { do_IRQ(MSP_INT_SEC);  }
  * the range 40-71.
  */
 
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
 {
         u32 pending;