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-rw-r--r--arch/mips/mti-sead3/sead3-int.c42
1 files changed, 0 insertions, 42 deletions
diff --git a/arch/mips/mti-sead3/sead3-int.c b/arch/mips/mti-sead3/sead3-int.c
deleted file mode 100644
index e31e17f81eef..000000000000
--- a/arch/mips/mti-sead3/sead3-int.c
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/init.h>
9#include <linux/irq.h>
10#include <linux/irqchip/mips-gic.h>
11#include <linux/io.h>
12
13#include <asm/irq_cpu.h>
14#include <asm/setup.h>
15
16#include <asm/mips-boards/sead3int.h>
17
18#define SEAD_CONFIG_GIC_PRESENT_SHF 1
19#define SEAD_CONFIG_GIC_PRESENT_MSK (1 << SEAD_CONFIG_GIC_PRESENT_SHF)
20#define SEAD_CONFIG_BASE 0x1b100110
21#define SEAD_CONFIG_SIZE 4
22
23static void __iomem *sead3_config_reg;
24
25void __init arch_init_irq(void)
26{
27 if (!cpu_has_veic)
28 mips_cpu_irq_init();
29
30 sead3_config_reg = ioremap_nocache(SEAD_CONFIG_BASE, SEAD_CONFIG_SIZE);
31 gic_present = (__raw_readl(sead3_config_reg) &
32 SEAD_CONFIG_GIC_PRESENT_MSK) >>
33 SEAD_CONFIG_GIC_PRESENT_SHF;
34 pr_info("GIC: %spresent\n", (gic_present) ? "" : "not ");
35 pr_info("EIC: %s\n",
36 (current_cpu_data.options & MIPS_CPU_VEIC) ? "on" : "off");
37
38 if (gic_present)
39 gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, CPU_INT_GIC,
40 MIPS_GIC_IRQ_BASE);
41}
42