3 files changed, 6 insertions, 0 deletions

diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 9801ac982655..fe67f12ac239 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -20,6 +20,9 @@
 #ifndef cpu_has_tlb
 #define cpu_has_tlb             (cpu_data[0].options & MIPS_CPU_TLB)
 #endif
+#ifndef cpu_has_ftlb
+#define cpu_has_ftlb            (cpu_data[0].options & MIPS_CPU_FTLB)
+#endif
 #ifndef cpu_has_tlbinv
 #define cpu_has_tlbinv          (cpu_data[0].options & MIPS_CPU_TLBINV)
 #endif
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index cd89e9855775..82ad15f11049 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -385,6 +385,7 @@ enum cpu_type_enum {
 #define MIPS_CPU_CDMM           0x4000000000ull /* CPU has Common Device Memory Map */
 #define MIPS_CPU_BP_GHIST       0x8000000000ull /* R12K+ Branch Prediction Global History */
 #define MIPS_CPU_SP             0x10000000000ull /* Small (1KB) page support */
+#define MIPS_CPU_FTLB           0x20000000000ull /* CPU has Fixed-page-size TLB */
 
 /*
  * CPU ASE encodings
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index d3cd8eac81e3..c64781cf649f 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -487,6 +487,8 @@
 
 /* Bits specific to the MIPS32/64 PRA.  */
 #define MIPS_CONF_MT            (_ULCAST_(7) <<  7)
+#define MIPS_CONF_MT_TLB        (_ULCAST_(1) <<  7)
+#define MIPS_CONF_MT_FTLB       (_ULCAST_(4) <<  7)
 #define MIPS_CONF_AR            (_ULCAST_(7) << 10)
 #define MIPS_CONF_AT            (_ULCAST_(3) << 13)
 #define MIPS_CONF_M             (_ULCAST_(1) << 31)