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Diffstat (limited to 'arch/mips/include/asm/txx9/tx4927.h')
-rw-r--r--arch/mips/include/asm/txx9/tx4927.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/mips/include/asm/txx9/tx4927.h b/arch/mips/include/asm/txx9/tx4927.h
index 18c98c52afdb..284eea752d55 100644
--- a/arch/mips/include/asm/txx9/tx4927.h
+++ b/arch/mips/include/asm/txx9/tx4927.h
@@ -1,6 +1,6 @@
1/* 1/*
2 * Author: MontaVista Software, Inc. 2 * Author: MontaVista Software, Inc.
3 * source@mvista.com 3 * source@mvista.com
4 * 4 *
5 * Copyright 2001-2006 MontaVista Software Inc. 5 * Copyright 2001-2006 MontaVista Software Inc.
6 * 6 *
@@ -33,11 +33,11 @@
33#include <asm/txx9/tx4927pcic.h> 33#include <asm/txx9/tx4927pcic.h>
34 34
35#ifdef CONFIG_64BIT 35#ifdef CONFIG_64BIT
36#define TX4927_REG_BASE 0xffffffffff1f0000UL 36#define TX4927_REG_BASE 0xffffffffff1f0000UL
37#else 37#else
38#define TX4927_REG_BASE 0xff1f0000UL 38#define TX4927_REG_BASE 0xff1f0000UL
39#endif 39#endif
40#define TX4927_REG_SIZE 0x00010000 40#define TX4927_REG_SIZE 0x00010000
41 41
42#define TX4927_SDRAMC_REG (TX4927_REG_BASE + 0x8000) 42#define TX4927_SDRAMC_REG (TX4927_REG_BASE + 0x8000)
43#define TX4927_EBUSC_REG (TX4927_REG_BASE + 0x9000) 43#define TX4927_EBUSC_REG (TX4927_REG_BASE + 0x9000)
@@ -118,10 +118,10 @@ struct tx4927_ccfg_reg {
118#define TX4927_CCFG_DIVMODE_2 (0x4 << 17) 118#define TX4927_CCFG_DIVMODE_2 (0x4 << 17)
119#define TX4927_CCFG_DIVMODE_3 (0x5 << 17) 119#define TX4927_CCFG_DIVMODE_3 (0x5 << 17)
120#define TX4927_CCFG_DIVMODE_4 (0x6 << 17) 120#define TX4927_CCFG_DIVMODE_4 (0x6 << 17)
121#define TX4927_CCFG_DIVMODE_2_5 (0x7 << 17) 121#define TX4927_CCFG_DIVMODE_2_5 (0x7 << 17)
122#define TX4927_CCFG_BEOW 0x00010000 122#define TX4927_CCFG_BEOW 0x00010000
123#define TX4927_CCFG_WR 0x00008000 123#define TX4927_CCFG_WR 0x00008000
124#define TX4927_CCFG_TOE 0x00004000 124#define TX4927_CCFG_TOE 0x00004000
125#define TX4927_CCFG_PCIARB 0x00002000 125#define TX4927_CCFG_PCIARB 0x00002000
126#define TX4927_CCFG_PCIDIVMODE_MASK 0x00001800 126#define TX4927_CCFG_PCIDIVMODE_MASK 0x00001800
127#define TX4927_CCFG_PCIDIVMODE_2_5 0x00000000 127#define TX4927_CCFG_PCIDIVMODE_2_5 0x00000000
@@ -136,10 +136,10 @@ struct tx4927_ccfg_reg {
136 136
137/* PCFG : Pin Configuration */ 137/* PCFG : Pin Configuration */
138#define TX4927_PCFG_SDCLKDLY_MASK 0x30000000 138#define TX4927_PCFG_SDCLKDLY_MASK 0x30000000
139#define TX4927_PCFG_SDCLKDLY(d) ((d)<<28) 139#define TX4927_PCFG_SDCLKDLY(d) ((d)<<28)
140#define TX4927_PCFG_SYSCLKEN 0x08000000 140#define TX4927_PCFG_SYSCLKEN 0x08000000
141#define TX4927_PCFG_SDCLKEN_ALL 0x07800000 141#define TX4927_PCFG_SDCLKEN_ALL 0x07800000
142#define TX4927_PCFG_SDCLKEN(ch) (0x00800000<<(ch)) 142#define TX4927_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
143#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000 143#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
144#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch)) 144#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
145#define TX4927_PCFG_SEL2 0x00000200 145#define TX4927_PCFG_SEL2 0x00000200