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-rw-r--r--arch/mips/include/asm/tlb.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/mips/include/asm/tlb.h b/arch/mips/include/asm/tlb.h
index 4a2349302b55..dd179fd8acda 100644
--- a/arch/mips/include/asm/tlb.h
+++ b/arch/mips/include/asm/tlb.h
@@ -1,6 +1,9 @@
1#ifndef __ASM_TLB_H 1#ifndef __ASM_TLB_H
2#define __ASM_TLB_H 2#define __ASM_TLB_H
3 3
4#include <asm/cpu-features.h>
5#include <asm/mipsregs.h>
6
4/* 7/*
5 * MIPS doesn't need any special per-pte or per-vma handling, except 8 * MIPS doesn't need any special per-pte or per-vma handling, except
6 * we need to flush cache for area to be unmapped. 9 * we need to flush cache for area to be unmapped.
@@ -22,6 +25,16 @@
22 ((CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) | \ 25 ((CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) | \
23 (cpu_has_tlbinv ? MIPS_ENTRYHI_EHINV : 0)) 26 (cpu_has_tlbinv ? MIPS_ENTRYHI_EHINV : 0))
24 27
28static inline unsigned int num_wired_entries(void)
29{
30 unsigned int wired = read_c0_wired();
31
32 if (cpu_has_mips_r6)
33 wired &= MIPSR6_WIRED_WIRED;
34
35 return wired;
36}
37
25#include <asm-generic/tlb.h> 38#include <asm-generic/tlb.h>
26 39
27#endif /* __ASM_TLB_H */ 40#endif /* __ASM_TLB_H */