1 files changed, 80 insertions, 51 deletions

diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index da4ba49adcf6..f6a0439a4085 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -34,38 +34,72 @@
  */
 #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
 
-#define _PAGE_PRESENT               (1<<6)  /* implemented in software */
-#define _PAGE_READ                  (1<<7)  /* implemented in software */
-#define _PAGE_WRITE                 (1<<8)  /* implemented in software */
-#define _PAGE_ACCESSED              (1<<9)  /* implemented in software */
-#define _PAGE_MODIFIED              (1<<10) /* implemented in software */
-#define _PAGE_FILE                  (1<<10) /* set:pagecache unset:swap */
-
-#define _PAGE_R4KBUG                (1<<0)  /* workaround for r4k bug  */
-#define _PAGE_GLOBAL                (1<<0)
-#define _PAGE_VALID                 (1<<1)
-#define _PAGE_SILENT_READ           (1<<1)  /* synonym                 */
-#define _PAGE_DIRTY                 (1<<2)  /* The MIPS dirty bit      */
-#define _PAGE_SILENT_WRITE          (1<<2)
-#define _CACHE_SHIFT                3
-#define _CACHE_MASK                 (7<<3)
+/*
+ * The following bits are directly used by the TLB hardware
+ */
+#define _PAGE_R4KBUG            (1 << 0)  /* workaround for r4k bug  */
+#define _PAGE_GLOBAL            (1 << 0)
+#define _PAGE_VALID_SHIFT       1
+#define _PAGE_VALID             (1 << _PAGE_VALID_SHIFT)
+#define _PAGE_SILENT_READ       (1 << 1)  /* synonym                 */
+#define _PAGE_DIRTY_SHIFT       2
+#define _PAGE_DIRTY             (1 << _PAGE_DIRTY_SHIFT)  /* The MIPS dirty bit      */
+#define _PAGE_SILENT_WRITE      (1 << 2)
+#define _CACHE_SHIFT            3
+#define _CACHE_MASK             (7 << 3)
+
+/*
+ * The following bits are implemented in software
+ *
+ * _PAGE_FILE semantics: set:pagecache unset:swap
+ */ 
+#define _PAGE_PRESENT_SHIFT     6
+#define _PAGE_PRESENT           (1 << _PAGE_PRESENT_SHIFT)
+#define _PAGE_READ_SHIFT        7
+#define _PAGE_READ              (1 << _PAGE_READ_SHIFT)
+#define _PAGE_WRITE_SHIFT       8
+#define _PAGE_WRITE             (1 << _PAGE_WRITE_SHIFT)
+#define _PAGE_ACCESSED_SHIFT    9
+#define _PAGE_ACCESSED          (1 << _PAGE_ACCESSED_SHIFT)
+#define _PAGE_MODIFIED_SHIFT    10
+#define _PAGE_MODIFIED          (1 << _PAGE_MODIFIED_SHIFT)
+
+#define _PAGE_FILE              (1 << 10)
 
 #elif defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
 
-#define _PAGE_PRESENT               (1<<0)  /* implemented in software */
-#define _PAGE_READ                  (1<<1)  /* implemented in software */
-#define _PAGE_WRITE                 (1<<2)  /* implemented in software */
-#define _PAGE_ACCESSED              (1<<3)  /* implemented in software */
-#define _PAGE_MODIFIED              (1<<4)  /* implemented in software */
-#define _PAGE_FILE                  (1<<4)  /* set:pagecache unset:swap */
-
-#define _PAGE_GLOBAL                (1<<8)
-#define _PAGE_VALID                 (1<<9)
-#define _PAGE_SILENT_READ           (1<<9)  /* synonym                 */
-#define _PAGE_DIRTY                 (1<<10) /* The MIPS dirty bit      */
-#define _PAGE_SILENT_WRITE          (1<<10)
-#define _CACHE_UNCACHED             (1<<11)
-#define _CACHE_MASK                 (1<<11)
+/*
+ * The following are implemented by software
+ *
+ * _PAGE_FILE semantics: set:pagecache unset:swap
+ */
+#define _PAGE_PRESENT_SHIFT     0
+#define _PAGE_PRESENT           (1 <<  _PAGE_PRESENT_SHIFT)
+#define _PAGE_READ_SHIFT        1
+#define _PAGE_READ              (1 <<  _PAGE_READ_SHIFT)
+#define _PAGE_WRITE_SHIFT       2
+#define _PAGE_WRITE             (1 <<  _PAGE_WRITE_SHIFT)
+#define _PAGE_ACCESSED_SHIFT    3
+#define _PAGE_ACCESSED          (1 <<  _PAGE_ACCESSED_SHIFT)
+#define _PAGE_MODIFIED_SHIFT    4
+#define _PAGE_MODIFIED          (1 <<  _PAGE_MODIFIED_SHIFT)
+#define _PAGE_FILE_SHIFT        4
+#define _PAGE_FILE              (1 <<  _PAGE_FILE_SHIFT)
+
+/*
+ * And these are the hardware TLB bits
+ */
+#define _PAGE_GLOBAL_SHIFT      8
+#define _PAGE_GLOBAL            (1 <<  _PAGE_GLOBAL_SHIFT)
+#define _PAGE_VALID_SHIFT       9
+#define _PAGE_VALID             (1 <<  _PAGE_VALID_SHIFT)
+#define _PAGE_SILENT_READ       (1 <<  _PAGE_VALID_SHIFT)       /* synonym  */
+#define _PAGE_DIRTY_SHIFT       10
+#define _PAGE_DIRTY             (1 << _PAGE_DIRTY_SHIFT)
+#define _PAGE_SILENT_WRITE      (1 << _PAGE_DIRTY_SHIFT)
+#define _CACHE_UNCACHED_SHIFT   11
+#define _CACHE_UNCACHED         (1 << _CACHE_UNCACHED_SHIFT)
+#define _CACHE_MASK             (1 << _CACHE_UNCACHED_SHIFT)
 
 #else /* 'Normal' r4K case */
 /*
@@ -76,25 +110,25 @@
  * which is more than we need right now.
  */
 
-/* implemented in software */
+/*
+ * The following bits are implemented in software
+ *
+ * _PAGE_READ / _PAGE_READ_SHIFT should be unused if cpu_has_rixi.
+ * _PAGE_FILE semantics: set:pagecache unset:swap
+ */
 #define _PAGE_PRESENT_SHIFT     (0)
 #define _PAGE_PRESENT           (1 << _PAGE_PRESENT_SHIFT)
-/* implemented in software, should be unused if cpu_has_rixi. */
 #define _PAGE_READ_SHIFT        (cpu_has_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1)
 #define _PAGE_READ ({BUG_ON(cpu_has_rixi); 1 << _PAGE_READ_SHIFT; })
-/* implemented in software */
 #define _PAGE_WRITE_SHIFT       (_PAGE_READ_SHIFT + 1)
 #define _PAGE_WRITE             (1 << _PAGE_WRITE_SHIFT)
-/* implemented in software */
 #define _PAGE_ACCESSED_SHIFT    (_PAGE_WRITE_SHIFT + 1)
 #define _PAGE_ACCESSED          (1 << _PAGE_ACCESSED_SHIFT)
-/* implemented in software */
 #define _PAGE_MODIFIED_SHIFT    (_PAGE_ACCESSED_SHIFT + 1)
 #define _PAGE_MODIFIED          (1 << _PAGE_MODIFIED_SHIFT)
-/* set:pagecache unset:swap */
 #define _PAGE_FILE              (_PAGE_MODIFIED)
 
-#ifdef CONFIG_HUGETLB_PAGE
+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
 /* huge tlb page */
 #define _PAGE_HUGE_SHIFT        (_PAGE_MODIFIED_SHIFT + 1)
 #define _PAGE_HUGE              (1 << _PAGE_HUGE_SHIFT)
@@ -103,8 +137,17 @@
 #define _PAGE_HUGE              ({BUG(); 1; })  /* Dummy value */
 #endif
 
+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
+/* huge tlb page */
+#define _PAGE_SPLITTING_SHIFT   (_PAGE_HUGE_SHIFT + 1)
+#define _PAGE_SPLITTING         (1 << _PAGE_SPLITTING_SHIFT)
+#else
+#define _PAGE_SPLITTING_SHIFT   (_PAGE_HUGE_SHIFT)
+#define _PAGE_SPLITTING         ({BUG(); 1; })  /* Dummy value */
+#endif
+
 /* Page cannot be executed */
-#define _PAGE_NO_EXEC_SHIFT     (cpu_has_rixi ? _PAGE_HUGE_SHIFT + 1 : _PAGE_HUGE_SHIFT)
+#define _PAGE_NO_EXEC_SHIFT     (cpu_has_rixi ? _PAGE_SPLITTING_SHIFT + 1 : _PAGE_SPLITTING_SHIFT)
 #define _PAGE_NO_EXEC           ({BUG_ON(!cpu_has_rixi); 1 << _PAGE_NO_EXEC_SHIFT; })
 
 /* Page cannot be read */
@@ -192,20 +235,6 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
 #define _CACHE_CACHABLE_NONCOHERENT (5<<_CACHE_SHIFT)
 #define _CACHE_UNCACHED_ACCELERATED (7<<_CACHE_SHIFT)
 
-#elif defined(CONFIG_CPU_RM9000)
-
-#define _CACHE_WT                   (0<<_CACHE_SHIFT)
-#define _CACHE_WTWA                 (1<<_CACHE_SHIFT)
-#define _CACHE_UC_B                 (2<<_CACHE_SHIFT)
-#define _CACHE_WB                   (3<<_CACHE_SHIFT)
-#define _CACHE_CWBEA                (4<<_CACHE_SHIFT)
-#define _CACHE_CWB                  (5<<_CACHE_SHIFT)
-#define _CACHE_UCNB                 (6<<_CACHE_SHIFT)
-#define _CACHE_FPC                  (7<<_CACHE_SHIFT)
-
-#define _CACHE_UNCACHED             _CACHE_UC_B
-#define _CACHE_CACHABLE_NONCOHERENT _CACHE_WB
-
 #else
 
 #define _CACHE_CACHABLE_NO_WA       (0<<_CACHE_SHIFT)  /* R4600 only      */