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Diffstat (limited to 'arch/mips/include/asm/octeon/cvmx-fau.h')
-rw-r--r--arch/mips/include/asm/octeon/cvmx-fau.h162
1 files changed, 81 insertions, 81 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-fau.h b/arch/mips/include/asm/octeon/cvmx-fau.h
index a6939fc8ba18..ef98f7fc102f 100644
--- a/arch/mips/include/asm/octeon/cvmx-fau.h
+++ b/arch/mips/include/asm/octeon/cvmx-fau.h
@@ -37,13 +37,13 @@
37 */ 37 */
38 38
39#define CVMX_FAU_LOAD_IO_ADDRESS cvmx_build_io_address(0x1e, 0) 39#define CVMX_FAU_LOAD_IO_ADDRESS cvmx_build_io_address(0x1e, 0)
40#define CVMX_FAU_BITS_SCRADDR 63, 56 40#define CVMX_FAU_BITS_SCRADDR 63, 56
41#define CVMX_FAU_BITS_LEN 55, 48 41#define CVMX_FAU_BITS_LEN 55, 48
42#define CVMX_FAU_BITS_INEVAL 35, 14 42#define CVMX_FAU_BITS_INEVAL 35, 14
43#define CVMX_FAU_BITS_TAGWAIT 13, 13 43#define CVMX_FAU_BITS_TAGWAIT 13, 13
44#define CVMX_FAU_BITS_NOADD 13, 13 44#define CVMX_FAU_BITS_NOADD 13, 13
45#define CVMX_FAU_BITS_SIZE 12, 11 45#define CVMX_FAU_BITS_SIZE 12, 11
46#define CVMX_FAU_BITS_REGISTER 10, 0 46#define CVMX_FAU_BITS_REGISTER 10, 0
47 47
48typedef enum { 48typedef enum {
49 CVMX_FAU_OP_SIZE_8 = 0, 49 CVMX_FAU_OP_SIZE_8 = 0,
@@ -109,11 +109,11 @@ typedef union {
109 * Builds a store I/O address for writing to the FAU 109 * Builds a store I/O address for writing to the FAU
110 * 110 *
111 * @noadd: 0 = Store value is atomically added to the current value 111 * @noadd: 0 = Store value is atomically added to the current value
112 * 1 = Store value is atomically written over the current value 112 * 1 = Store value is atomically written over the current value
113 * @reg: FAU atomic register to access. 0 <= reg < 2048. 113 * @reg: FAU atomic register to access. 0 <= reg < 2048.
114 * - Step by 2 for 16 bit access. 114 * - Step by 2 for 16 bit access.
115 * - Step by 4 for 32 bit access. 115 * - Step by 4 for 32 bit access.
116 * - Step by 8 for 64 bit access. 116 * - Step by 8 for 64 bit access.
117 * Returns Address to store for atomic update 117 * Returns Address to store for atomic update
118 */ 118 */
119static inline uint64_t __cvmx_fau_store_address(uint64_t noadd, uint64_t reg) 119static inline uint64_t __cvmx_fau_store_address(uint64_t noadd, uint64_t reg)
@@ -127,16 +127,16 @@ static inline uint64_t __cvmx_fau_store_address(uint64_t noadd, uint64_t reg)
127 * Builds a I/O address for accessing the FAU 127 * Builds a I/O address for accessing the FAU
128 * 128 *
129 * @tagwait: Should the atomic add wait for the current tag switch 129 * @tagwait: Should the atomic add wait for the current tag switch
130 * operation to complete. 130 * operation to complete.
131 * - 0 = Don't wait 131 * - 0 = Don't wait
132 * - 1 = Wait for tag switch to complete 132 * - 1 = Wait for tag switch to complete
133 * @reg: FAU atomic register to access. 0 <= reg < 2048. 133 * @reg: FAU atomic register to access. 0 <= reg < 2048.
134 * - Step by 2 for 16 bit access. 134 * - Step by 2 for 16 bit access.
135 * - Step by 4 for 32 bit access. 135 * - Step by 4 for 32 bit access.
136 * - Step by 8 for 64 bit access. 136 * - Step by 8 for 64 bit access.
137 * @value: Signed value to add. 137 * @value: Signed value to add.
138 * Note: When performing 32 and 64 bit access, only the low 138 * Note: When performing 32 and 64 bit access, only the low
139 * 22 bits are available. 139 * 22 bits are available.
140 * Returns Address to read from for atomic update 140 * Returns Address to read from for atomic update
141 */ 141 */
142static inline uint64_t __cvmx_fau_atomic_address(uint64_t tagwait, uint64_t reg, 142static inline uint64_t __cvmx_fau_atomic_address(uint64_t tagwait, uint64_t reg,
@@ -152,9 +152,9 @@ static inline uint64_t __cvmx_fau_atomic_address(uint64_t tagwait, uint64_t reg,
152 * Perform an atomic 64 bit add 152 * Perform an atomic 64 bit add
153 * 153 *
154 * @reg: FAU atomic register to access. 0 <= reg < 2048. 154 * @reg: FAU atomic register to access. 0 <= reg < 2048.
155 * - Step by 8 for 64 bit access. 155 * - Step by 8 for 64 bit access.
156 * @value: Signed value to add. 156 * @value: Signed value to add.
157 * Note: Only the low 22 bits are available. 157 * Note: Only the low 22 bits are available.
158 * Returns Value of the register before the update 158 * Returns Value of the register before the update
159 */ 159 */
160static inline int64_t cvmx_fau_fetch_and_add64(cvmx_fau_reg_64_t reg, 160static inline int64_t cvmx_fau_fetch_and_add64(cvmx_fau_reg_64_t reg,
@@ -167,9 +167,9 @@ static inline int64_t cvmx_fau_fetch_and_add64(cvmx_fau_reg_64_t reg,
167 * Perform an atomic 32 bit add 167 * Perform an atomic 32 bit add
168 * 168 *
169 * @reg: FAU atomic register to access. 0 <= reg < 2048. 169 * @reg: FAU atomic register to access. 0 <= reg < 2048.
170 * - Step by 4 for 32 bit access. 170 * - Step by 4 for 32 bit access.
171 * @value: Signed value to add. 171 * @value: Signed value to add.
172 * Note: Only the low 22 bits are available. 172 * Note: Only the low 22 bits are available.
173 * Returns Value of the register before the update 173 * Returns Value of the register before the update
174 */ 174 */
175static inline int32_t cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg, 175static inline int32_t cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg,
@@ -182,7 +182,7 @@ static inline int32_t cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg,
182 * Perform an atomic 16 bit add 182 * Perform an atomic 16 bit add
183 * 183 *
184 * @reg: FAU atomic register to access. 0 <= reg < 2048. 184 * @reg: FAU atomic register to access. 0 <= reg < 2048.
185 * - Step by 2 for 16 bit access. 185 * - Step by 2 for 16 bit access.
186 * @value: Signed value to add. 186 * @value: Signed value to add.
187 * Returns Value of the register before the update 187 * Returns Value of the register before the update
188 */ 188 */
@@ -209,12 +209,12 @@ static inline int8_t cvmx_fau_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value)
209 * completes 209 * completes
210 * 210 *
211 * @reg: FAU atomic register to access. 0 <= reg < 2048. 211 * @reg: FAU atomic register to access. 0 <= reg < 2048.
212 * - Step by 8 for 64 bit access. 212 * - Step by 8 for 64 bit access.
213 * @value: Signed value to add. 213 * @value: Signed value to add.
214 * Note: Only the low 22 bits are available. 214 * Note: Only the low 22 bits are available.
215 * Returns If a timeout occurs, the error bit will be set. Otherwise 215 * Returns If a timeout occurs, the error bit will be set. Otherwise
216 * the value of the register before the update will be 216 * the value of the register before the update will be
217 * returned 217 * returned
218 */ 218 */
219static inline cvmx_fau_tagwait64_t 219static inline cvmx_fau_tagwait64_t
220cvmx_fau_tagwait_fetch_and_add64(cvmx_fau_reg_64_t reg, int64_t value) 220cvmx_fau_tagwait_fetch_and_add64(cvmx_fau_reg_64_t reg, int64_t value)
@@ -233,12 +233,12 @@ cvmx_fau_tagwait_fetch_and_add64(cvmx_fau_reg_64_t reg, int64_t value)
233 * completes 233 * completes
234 * 234 *
235 * @reg: FAU atomic register to access. 0 <= reg < 2048. 235 * @reg: FAU atomic register to access. 0 <= reg < 2048.
236 * - Step by 4 for 32 bit access. 236 * - Step by 4 for 32 bit access.
237 * @value: Signed value to add. 237 * @value: Signed value to add.
238 * Note: Only the low 22 bits are available. 238 * Note: Only the low 22 bits are available.
239 * Returns If a timeout occurs, the error bit will be set. Otherwise 239 * Returns If a timeout occurs, the error bit will be set. Otherwise
240 * the value of the register before the update will be 240 * the value of the register before the update will be
241 * returned 241 * returned
242 */ 242 */
243static inline cvmx_fau_tagwait32_t 243static inline cvmx_fau_tagwait32_t
244cvmx_fau_tagwait_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value) 244cvmx_fau_tagwait_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value)
@@ -257,11 +257,11 @@ cvmx_fau_tagwait_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value)
257 * completes 257 * completes
258 * 258 *
259 * @reg: FAU atomic register to access. 0 <= reg < 2048. 259 * @reg: FAU atomic register to access. 0 <= reg < 2048.
260 * - Step by 2 for 16 bit access. 260 * - Step by 2 for 16 bit access.
261 * @value: Signed value to add. 261 * @value: Signed value to add.
262 * Returns If a timeout occurs, the error bit will be set. Otherwise 262 * Returns If a timeout occurs, the error bit will be set. Otherwise
263 * the value of the register before the update will be 263 * the value of the register before the update will be
264 * returned 264 * returned
265 */ 265 */
266static inline cvmx_fau_tagwait16_t 266static inline cvmx_fau_tagwait16_t
267cvmx_fau_tagwait_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value) 267cvmx_fau_tagwait_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value)
@@ -282,8 +282,8 @@ cvmx_fau_tagwait_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value)
282 * @reg: FAU atomic register to access. 0 <= reg < 2048. 282 * @reg: FAU atomic register to access. 0 <= reg < 2048.
283 * @value: Signed value to add. 283 * @value: Signed value to add.
284 * Returns If a timeout occurs, the error bit will be set. Otherwise 284 * Returns If a timeout occurs, the error bit will be set. Otherwise
285 * the value of the register before the update will be 285 * the value of the register before the update will be
286 * returned 286 * returned
287 */ 287 */
288static inline cvmx_fau_tagwait8_t 288static inline cvmx_fau_tagwait8_t
289cvmx_fau_tagwait_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value) 289cvmx_fau_tagwait_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value)
@@ -301,21 +301,21 @@ cvmx_fau_tagwait_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value)
301 * 301 *
302 * @scraddr: Scratch pad byte address to write to. Must be 8 byte aligned 302 * @scraddr: Scratch pad byte address to write to. Must be 8 byte aligned
303 * @value: Signed value to add. 303 * @value: Signed value to add.
304 * Note: When performing 32 and 64 bit access, only the low 304 * Note: When performing 32 and 64 bit access, only the low
305 * 22 bits are available. 305 * 22 bits are available.
306 * @tagwait: Should the atomic add wait for the current tag switch 306 * @tagwait: Should the atomic add wait for the current tag switch
307 * operation to complete. 307 * operation to complete.
308 * - 0 = Don't wait 308 * - 0 = Don't wait
309 * - 1 = Wait for tag switch to complete 309 * - 1 = Wait for tag switch to complete
310 * @size: The size of the operation: 310 * @size: The size of the operation:
311 * - CVMX_FAU_OP_SIZE_8 (0) = 8 bits 311 * - CVMX_FAU_OP_SIZE_8 (0) = 8 bits
312 * - CVMX_FAU_OP_SIZE_16 (1) = 16 bits 312 * - CVMX_FAU_OP_SIZE_16 (1) = 16 bits
313 * - CVMX_FAU_OP_SIZE_32 (2) = 32 bits 313 * - CVMX_FAU_OP_SIZE_32 (2) = 32 bits
314 * - CVMX_FAU_OP_SIZE_64 (3) = 64 bits 314 * - CVMX_FAU_OP_SIZE_64 (3) = 64 bits
315 * @reg: FAU atomic register to access. 0 <= reg < 2048. 315 * @reg: FAU atomic register to access. 0 <= reg < 2048.
316 * - Step by 2 for 16 bit access. 316 * - Step by 2 for 16 bit access.
317 * - Step by 4 for 32 bit access. 317 * - Step by 4 for 32 bit access.
318 * - Step by 8 for 64 bit access. 318 * - Step by 8 for 64 bit access.
319 * Returns Data to write using cvmx_send_single 319 * Returns Data to write using cvmx_send_single
320 */ 320 */
321static inline uint64_t __cvmx_fau_iobdma_data(uint64_t scraddr, int64_t value, 321static inline uint64_t __cvmx_fau_iobdma_data(uint64_t scraddr, int64_t value,
@@ -337,11 +337,11 @@ static inline uint64_t __cvmx_fau_iobdma_data(uint64_t scraddr, int64_t value,
337 * placed in the scratch memory at byte address scraddr. 337 * placed in the scratch memory at byte address scraddr.
338 * 338 *
339 * @scraddr: Scratch memory byte address to put response in. 339 * @scraddr: Scratch memory byte address to put response in.
340 * Must be 8 byte aligned. 340 * Must be 8 byte aligned.
341 * @reg: FAU atomic register to access. 0 <= reg < 2048. 341 * @reg: FAU atomic register to access. 0 <= reg < 2048.
342 * - Step by 8 for 64 bit access. 342 * - Step by 8 for 64 bit access.
343 * @value: Signed value to add. 343 * @value: Signed value to add.
344 * Note: Only the low 22 bits are available. 344 * Note: Only the low 22 bits are available.
345 * Returns Placed in the scratch pad register 345 * Returns Placed in the scratch pad register
346 */ 346 */
347static inline void cvmx_fau_async_fetch_and_add64(uint64_t scraddr, 347static inline void cvmx_fau_async_fetch_and_add64(uint64_t scraddr,
@@ -357,11 +357,11 @@ static inline void cvmx_fau_async_fetch_and_add64(uint64_t scraddr,
357 * placed in the scratch memory at byte address scraddr. 357 * placed in the scratch memory at byte address scraddr.
358 * 358 *
359 * @scraddr: Scratch memory byte address to put response in. 359 * @scraddr: Scratch memory byte address to put response in.
360 * Must be 8 byte aligned. 360 * Must be 8 byte aligned.
361 * @reg: FAU atomic register to access. 0 <= reg < 2048. 361 * @reg: FAU atomic register to access. 0 <= reg < 2048.
362 * - Step by 4 for 32 bit access. 362 * - Step by 4 for 32 bit access.
363 * @value: Signed value to add. 363 * @value: Signed value to add.
364 * Note: Only the low 22 bits are available. 364 * Note: Only the low 22 bits are available.
365 * Returns Placed in the scratch pad register 365 * Returns Placed in the scratch pad register
366 */ 366 */
367static inline void cvmx_fau_async_fetch_and_add32(uint64_t scraddr, 367static inline void cvmx_fau_async_fetch_and_add32(uint64_t scraddr,
@@ -377,9 +377,9 @@ static inline void cvmx_fau_async_fetch_and_add32(uint64_t scraddr,
377 * placed in the scratch memory at byte address scraddr. 377 * placed in the scratch memory at byte address scraddr.
378 * 378 *
379 * @scraddr: Scratch memory byte address to put response in. 379 * @scraddr: Scratch memory byte address to put response in.
380 * Must be 8 byte aligned. 380 * Must be 8 byte aligned.
381 * @reg: FAU atomic register to access. 0 <= reg < 2048. 381 * @reg: FAU atomic register to access. 0 <= reg < 2048.
382 * - Step by 2 for 16 bit access. 382 * - Step by 2 for 16 bit access.
383 * @value: Signed value to add. 383 * @value: Signed value to add.
384 * Returns Placed in the scratch pad register 384 * Returns Placed in the scratch pad register
385 */ 385 */
@@ -396,7 +396,7 @@ static inline void cvmx_fau_async_fetch_and_add16(uint64_t scraddr,
396 * placed in the scratch memory at byte address scraddr. 396 * placed in the scratch memory at byte address scraddr.
397 * 397 *
398 * @scraddr: Scratch memory byte address to put response in. 398 * @scraddr: Scratch memory byte address to put response in.
399 * Must be 8 byte aligned. 399 * Must be 8 byte aligned.
400 * @reg: FAU atomic register to access. 0 <= reg < 2048. 400 * @reg: FAU atomic register to access. 0 <= reg < 2048.
401 * @value: Signed value to add. 401 * @value: Signed value to add.
402 * Returns Placed in the scratch pad register 402 * Returns Placed in the scratch pad register
@@ -414,14 +414,14 @@ static inline void cvmx_fau_async_fetch_and_add8(uint64_t scraddr,
414 * switch completes. 414 * switch completes.
415 * 415 *
416 * @scraddr: Scratch memory byte address to put response in. Must be 416 * @scraddr: Scratch memory byte address to put response in. Must be
417 * 8 byte aligned. If a timeout occurs, the error bit (63) 417 * 8 byte aligned. If a timeout occurs, the error bit (63)
418 * will be set. Otherwise the value of the register before 418 * will be set. Otherwise the value of the register before
419 * the update will be returned 419 * the update will be returned
420 * 420 *
421 * @reg: FAU atomic register to access. 0 <= reg < 2048. 421 * @reg: FAU atomic register to access. 0 <= reg < 2048.
422 * - Step by 8 for 64 bit access. 422 * - Step by 8 for 64 bit access.
423 * @value: Signed value to add. 423 * @value: Signed value to add.
424 * Note: Only the low 22 bits are available. 424 * Note: Only the low 22 bits are available.
425 * Returns Placed in the scratch pad register 425 * Returns Placed in the scratch pad register
426 */ 426 */
427static inline void cvmx_fau_async_tagwait_fetch_and_add64(uint64_t scraddr, 427static inline void cvmx_fau_async_tagwait_fetch_and_add64(uint64_t scraddr,
@@ -437,14 +437,14 @@ static inline void cvmx_fau_async_tagwait_fetch_and_add64(uint64_t scraddr,
437 * switch completes. 437 * switch completes.
438 * 438 *
439 * @scraddr: Scratch memory byte address to put response in. Must be 439 * @scraddr: Scratch memory byte address to put response in. Must be
440 * 8 byte aligned. If a timeout occurs, the error bit (63) 440 * 8 byte aligned. If a timeout occurs, the error bit (63)
441 * will be set. Otherwise the value of the register before 441 * will be set. Otherwise the value of the register before
442 * the update will be returned 442 * the update will be returned
443 * 443 *
444 * @reg: FAU atomic register to access. 0 <= reg < 2048. 444 * @reg: FAU atomic register to access. 0 <= reg < 2048.
445 * - Step by 4 for 32 bit access. 445 * - Step by 4 for 32 bit access.
446 * @value: Signed value to add. 446 * @value: Signed value to add.
447 * Note: Only the low 22 bits are available. 447 * Note: Only the low 22 bits are available.
448 * Returns Placed in the scratch pad register 448 * Returns Placed in the scratch pad register
449 */ 449 */
450static inline void cvmx_fau_async_tagwait_fetch_and_add32(uint64_t scraddr, 450static inline void cvmx_fau_async_tagwait_fetch_and_add32(uint64_t scraddr,
@@ -460,12 +460,12 @@ static inline void cvmx_fau_async_tagwait_fetch_and_add32(uint64_t scraddr,
460 * switch completes. 460 * switch completes.
461 * 461 *
462 * @scraddr: Scratch memory byte address to put response in. Must be 462 * @scraddr: Scratch memory byte address to put response in. Must be
463 * 8 byte aligned. If a timeout occurs, the error bit (63) 463 * 8 byte aligned. If a timeout occurs, the error bit (63)
464 * will be set. Otherwise the value of the register before 464 * will be set. Otherwise the value of the register before
465 * the update will be returned 465 * the update will be returned
466 * 466 *
467 * @reg: FAU atomic register to access. 0 <= reg < 2048. 467 * @reg: FAU atomic register to access. 0 <= reg < 2048.
468 * - Step by 2 for 16 bit access. 468 * - Step by 2 for 16 bit access.
469 * @value: Signed value to add. 469 * @value: Signed value to add.
470 * 470 *
471 * Returns Placed in the scratch pad register 471 * Returns Placed in the scratch pad register
@@ -483,9 +483,9 @@ static inline void cvmx_fau_async_tagwait_fetch_and_add16(uint64_t scraddr,
483 * switch completes. 483 * switch completes.
484 * 484 *
485 * @scraddr: Scratch memory byte address to put response in. Must be 485 * @scraddr: Scratch memory byte address to put response in. Must be
486 * 8 byte aligned. If a timeout occurs, the error bit (63) 486 * 8 byte aligned. If a timeout occurs, the error bit (63)
487 * will be set. Otherwise the value of the register before 487 * will be set. Otherwise the value of the register before
488 * the update will be returned 488 * the update will be returned
489 * 489 *
490 * @reg: FAU atomic register to access. 0 <= reg < 2048. 490 * @reg: FAU atomic register to access. 0 <= reg < 2048.
491 * @value: Signed value to add. 491 * @value: Signed value to add.
@@ -504,7 +504,7 @@ static inline void cvmx_fau_async_tagwait_fetch_and_add8(uint64_t scraddr,
504 * Perform an atomic 64 bit add 504 * Perform an atomic 64 bit add
505 * 505 *
506 * @reg: FAU atomic register to access. 0 <= reg < 2048. 506 * @reg: FAU atomic register to access. 0 <= reg < 2048.
507 * - Step by 8 for 64 bit access. 507 * - Step by 8 for 64 bit access.
508 * @value: Signed value to add. 508 * @value: Signed value to add.
509 */ 509 */
510static inline void cvmx_fau_atomic_add64(cvmx_fau_reg_64_t reg, int64_t value) 510static inline void cvmx_fau_atomic_add64(cvmx_fau_reg_64_t reg, int64_t value)
@@ -516,7 +516,7 @@ static inline void cvmx_fau_atomic_add64(cvmx_fau_reg_64_t reg, int64_t value)
516 * Perform an atomic 32 bit add 516 * Perform an atomic 32 bit add
517 * 517 *
518 * @reg: FAU atomic register to access. 0 <= reg < 2048. 518 * @reg: FAU atomic register to access. 0 <= reg < 2048.
519 * - Step by 4 for 32 bit access. 519 * - Step by 4 for 32 bit access.
520 * @value: Signed value to add. 520 * @value: Signed value to add.
521 */ 521 */
522static inline void cvmx_fau_atomic_add32(cvmx_fau_reg_32_t reg, int32_t value) 522static inline void cvmx_fau_atomic_add32(cvmx_fau_reg_32_t reg, int32_t value)
@@ -528,7 +528,7 @@ static inline void cvmx_fau_atomic_add32(cvmx_fau_reg_32_t reg, int32_t value)
528 * Perform an atomic 16 bit add 528 * Perform an atomic 16 bit add
529 * 529 *
530 * @reg: FAU atomic register to access. 0 <= reg < 2048. 530 * @reg: FAU atomic register to access. 0 <= reg < 2048.
531 * - Step by 2 for 16 bit access. 531 * - Step by 2 for 16 bit access.
532 * @value: Signed value to add. 532 * @value: Signed value to add.
533 */ 533 */
534static inline void cvmx_fau_atomic_add16(cvmx_fau_reg_16_t reg, int16_t value) 534static inline void cvmx_fau_atomic_add16(cvmx_fau_reg_16_t reg, int16_t value)
@@ -551,7 +551,7 @@ static inline void cvmx_fau_atomic_add8(cvmx_fau_reg_8_t reg, int8_t value)
551 * Perform an atomic 64 bit write 551 * Perform an atomic 64 bit write
552 * 552 *
553 * @reg: FAU atomic register to access. 0 <= reg < 2048. 553 * @reg: FAU atomic register to access. 0 <= reg < 2048.
554 * - Step by 8 for 64 bit access. 554 * - Step by 8 for 64 bit access.
555 * @value: Signed value to write. 555 * @value: Signed value to write.
556 */ 556 */
557static inline void cvmx_fau_atomic_write64(cvmx_fau_reg_64_t reg, int64_t value) 557static inline void cvmx_fau_atomic_write64(cvmx_fau_reg_64_t reg, int64_t value)
@@ -563,7 +563,7 @@ static inline void cvmx_fau_atomic_write64(cvmx_fau_reg_64_t reg, int64_t value)
563 * Perform an atomic 32 bit write 563 * Perform an atomic 32 bit write
564 * 564 *
565 * @reg: FAU atomic register to access. 0 <= reg < 2048. 565 * @reg: FAU atomic register to access. 0 <= reg < 2048.
566 * - Step by 4 for 32 bit access. 566 * - Step by 4 for 32 bit access.
567 * @value: Signed value to write. 567 * @value: Signed value to write.
568 */ 568 */
569static inline void cvmx_fau_atomic_write32(cvmx_fau_reg_32_t reg, int32_t value) 569static inline void cvmx_fau_atomic_write32(cvmx_fau_reg_32_t reg, int32_t value)
@@ -575,7 +575,7 @@ static inline void cvmx_fau_atomic_write32(cvmx_fau_reg_32_t reg, int32_t value)
575 * Perform an atomic 16 bit write 575 * Perform an atomic 16 bit write
576 * 576 *
577 * @reg: FAU atomic register to access. 0 <= reg < 2048. 577 * @reg: FAU atomic register to access. 0 <= reg < 2048.
578 * - Step by 2 for 16 bit access. 578 * - Step by 2 for 16 bit access.
579 * @value: Signed value to write. 579 * @value: Signed value to write.
580 */ 580 */
581static inline void cvmx_fau_atomic_write16(cvmx_fau_reg_16_t reg, int16_t value) 581static inline void cvmx_fau_atomic_write16(cvmx_fau_reg_16_t reg, int16_t value)
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-07 09:25:59 -0500