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Diffstat (limited to 'arch/mips/include/asm/netlogic/xlr/iomap.h')
-rw-r--r--arch/mips/include/asm/netlogic/xlr/iomap.h88
1 files changed, 44 insertions, 44 deletions
diff --git a/arch/mips/include/asm/netlogic/xlr/iomap.h b/arch/mips/include/asm/netlogic/xlr/iomap.h
index 2e768f032e83..ff4533d6ee64 100644
--- a/arch/mips/include/asm/netlogic/xlr/iomap.h
+++ b/arch/mips/include/asm/netlogic/xlr/iomap.h
@@ -35,66 +35,66 @@
35#ifndef _ASM_NLM_IOMAP_H 35#ifndef _ASM_NLM_IOMAP_H
36#define _ASM_NLM_IOMAP_H 36#define _ASM_NLM_IOMAP_H
37 37
38#define DEFAULT_NETLOGIC_IO_BASE CKSEG1ADDR(0x1ef00000) 38#define DEFAULT_NETLOGIC_IO_BASE CKSEG1ADDR(0x1ef00000)
39#define NETLOGIC_IO_DDR2_CHN0_OFFSET 0x01000 39#define NETLOGIC_IO_DDR2_CHN0_OFFSET 0x01000
40#define NETLOGIC_IO_DDR2_CHN1_OFFSET 0x02000 40#define NETLOGIC_IO_DDR2_CHN1_OFFSET 0x02000
41#define NETLOGIC_IO_DDR2_CHN2_OFFSET 0x03000 41#define NETLOGIC_IO_DDR2_CHN2_OFFSET 0x03000
42#define NETLOGIC_IO_DDR2_CHN3_OFFSET 0x04000 42#define NETLOGIC_IO_DDR2_CHN3_OFFSET 0x04000
43#define NETLOGIC_IO_PIC_OFFSET 0x08000 43#define NETLOGIC_IO_PIC_OFFSET 0x08000
44#define NETLOGIC_IO_UART_0_OFFSET 0x14000 44#define NETLOGIC_IO_UART_0_OFFSET 0x14000
45#define NETLOGIC_IO_UART_1_OFFSET 0x15100 45#define NETLOGIC_IO_UART_1_OFFSET 0x15100
46 46
47#define NETLOGIC_IO_SIZE 0x1000 47#define NETLOGIC_IO_SIZE 0x1000
48 48
49#define NETLOGIC_IO_BRIDGE_OFFSET 0x00000 49#define NETLOGIC_IO_BRIDGE_OFFSET 0x00000
50 50
51#define NETLOGIC_IO_RLD2_CHN0_OFFSET 0x05000 51#define NETLOGIC_IO_RLD2_CHN0_OFFSET 0x05000
52#define NETLOGIC_IO_RLD2_CHN1_OFFSET 0x06000 52#define NETLOGIC_IO_RLD2_CHN1_OFFSET 0x06000
53 53
54#define NETLOGIC_IO_SRAM_OFFSET 0x07000 54#define NETLOGIC_IO_SRAM_OFFSET 0x07000
55 55
56#define NETLOGIC_IO_PCIX_OFFSET 0x09000 56#define NETLOGIC_IO_PCIX_OFFSET 0x09000
57#define NETLOGIC_IO_HT_OFFSET 0x0A000 57#define NETLOGIC_IO_HT_OFFSET 0x0A000
58 58
59#define NETLOGIC_IO_SECURITY_OFFSET 0x0B000 59#define NETLOGIC_IO_SECURITY_OFFSET 0x0B000
60 60
61#define NETLOGIC_IO_GMAC_0_OFFSET 0x0C000 61#define NETLOGIC_IO_GMAC_0_OFFSET 0x0C000
62#define NETLOGIC_IO_GMAC_1_OFFSET 0x0D000 62#define NETLOGIC_IO_GMAC_1_OFFSET 0x0D000
63#define NETLOGIC_IO_GMAC_2_OFFSET 0x0E000 63#define NETLOGIC_IO_GMAC_2_OFFSET 0x0E000
64#define NETLOGIC_IO_GMAC_3_OFFSET 0x0F000 64#define NETLOGIC_IO_GMAC_3_OFFSET 0x0F000
65 65
66/* XLS devices */ 66/* XLS devices */
67#define NETLOGIC_IO_GMAC_4_OFFSET 0x20000 67#define NETLOGIC_IO_GMAC_4_OFFSET 0x20000
68#define NETLOGIC_IO_GMAC_5_OFFSET 0x21000 68#define NETLOGIC_IO_GMAC_5_OFFSET 0x21000
69#define NETLOGIC_IO_GMAC_6_OFFSET 0x22000 69#define NETLOGIC_IO_GMAC_6_OFFSET 0x22000
70#define NETLOGIC_IO_GMAC_7_OFFSET 0x23000 70#define NETLOGIC_IO_GMAC_7_OFFSET 0x23000
71 71
72#define NETLOGIC_IO_PCIE_0_OFFSET 0x1E000 72#define NETLOGIC_IO_PCIE_0_OFFSET 0x1E000
73#define NETLOGIC_IO_PCIE_1_OFFSET 0x1F000 73#define NETLOGIC_IO_PCIE_1_OFFSET 0x1F000
74#define NETLOGIC_IO_SRIO_0_OFFSET 0x1E000 74#define NETLOGIC_IO_SRIO_0_OFFSET 0x1E000
75#define NETLOGIC_IO_SRIO_1_OFFSET 0x1F000 75#define NETLOGIC_IO_SRIO_1_OFFSET 0x1F000
76 76
77#define NETLOGIC_IO_USB_0_OFFSET 0x24000 77#define NETLOGIC_IO_USB_0_OFFSET 0x24000
78#define NETLOGIC_IO_USB_1_OFFSET 0x25000 78#define NETLOGIC_IO_USB_1_OFFSET 0x25000
79 79
80#define NETLOGIC_IO_COMP_OFFSET 0x1D000 80#define NETLOGIC_IO_COMP_OFFSET 0x1D000
81/* end XLS devices */ 81/* end XLS devices */
82 82
83/* XLR devices */ 83/* XLR devices */
84#define NETLOGIC_IO_SPI4_0_OFFSET 0x10000 84#define NETLOGIC_IO_SPI4_0_OFFSET 0x10000
85#define NETLOGIC_IO_XGMAC_0_OFFSET 0x11000 85#define NETLOGIC_IO_XGMAC_0_OFFSET 0x11000
86#define NETLOGIC_IO_SPI4_1_OFFSET 0x12000 86#define NETLOGIC_IO_SPI4_1_OFFSET 0x12000
87#define NETLOGIC_IO_XGMAC_1_OFFSET 0x13000 87#define NETLOGIC_IO_XGMAC_1_OFFSET 0x13000
88/* end XLR devices */ 88/* end XLR devices */
89 89
90#define NETLOGIC_IO_I2C_0_OFFSET 0x16000 90#define NETLOGIC_IO_I2C_0_OFFSET 0x16000
91#define NETLOGIC_IO_I2C_1_OFFSET 0x17000 91#define NETLOGIC_IO_I2C_1_OFFSET 0x17000
92 92
93#define NETLOGIC_IO_GPIO_OFFSET 0x18000 93#define NETLOGIC_IO_GPIO_OFFSET 0x18000
94#define NETLOGIC_IO_FLASH_OFFSET 0x19000 94#define NETLOGIC_IO_FLASH_OFFSET 0x19000
95#define NETLOGIC_IO_TB_OFFSET 0x1C000 95#define NETLOGIC_IO_TB_OFFSET 0x1C000
96 96
97#define NETLOGIC_CPLD_OFFSET KSEG1ADDR(0x1d840000) 97#define NETLOGIC_CPLD_OFFSET KSEG1ADDR(0x1d840000)
98 98
99/* 99/*
100 * Base Address (Virtual) of the PCI Config address space 100 * Base Address (Virtual) of the PCI Config address space
@@ -102,8 +102,8 @@
102 * Config space spans 256 (num of buses) * 256 (num functions) * 256 bytes 102 * Config space spans 256 (num of buses) * 256 (num functions) * 256 bytes
103 * ie 1<<24 = 16M 103 * ie 1<<24 = 16M
104 */ 104 */
105#define DEFAULT_PCI_CONFIG_BASE 0x18000000 105#define DEFAULT_PCI_CONFIG_BASE 0x18000000
106#define DEFAULT_HT_TYPE0_CFG_BASE 0x16000000 106#define DEFAULT_HT_TYPE0_CFG_BASE 0x16000000
107#define DEFAULT_HT_TYPE1_CFG_BASE 0x17000000 107#define DEFAULT_HT_TYPE1_CFG_BASE 0x17000000
108 108
109#endif 109#endif