diff options
Diffstat (limited to 'arch/mips/include/asm/bitops.h')
| -rw-r--r-- | arch/mips/include/asm/bitops.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index 46ac73abd5ee..71305a8b3d78 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h | |||
| @@ -26,15 +26,15 @@ | |||
| 26 | #define SZLONG_MASK 31UL | 26 | #define SZLONG_MASK 31UL |
| 27 | #define __LL "ll " | 27 | #define __LL "ll " |
| 28 | #define __SC "sc " | 28 | #define __SC "sc " |
| 29 | #define __INS "ins " | 29 | #define __INS "ins " |
| 30 | #define __EXT "ext " | 30 | #define __EXT "ext " |
| 31 | #elif _MIPS_SZLONG == 64 | 31 | #elif _MIPS_SZLONG == 64 |
| 32 | #define SZLONG_LOG 6 | 32 | #define SZLONG_LOG 6 |
| 33 | #define SZLONG_MASK 63UL | 33 | #define SZLONG_MASK 63UL |
| 34 | #define __LL "lld " | 34 | #define __LL "lld " |
| 35 | #define __SC "scd " | 35 | #define __SC "scd " |
| 36 | #define __INS "dins " | 36 | #define __INS "dins " |
| 37 | #define __EXT "dext " | 37 | #define __EXT "dext " |
| 38 | #endif | 38 | #endif |
| 39 | 39 | ||
| 40 | /* | 40 | /* |
| @@ -357,7 +357,7 @@ static inline int test_and_clear_bit(unsigned long nr, | |||
| 357 | "1: " __LL "%0, %1 # test_and_clear_bit \n" | 357 | "1: " __LL "%0, %1 # test_and_clear_bit \n" |
| 358 | " or %2, %0, %3 \n" | 358 | " or %2, %0, %3 \n" |
| 359 | " xor %2, %3 \n" | 359 | " xor %2, %3 \n" |
| 360 | " " __SC "%2, %1 \n" | 360 | " " __SC "%2, %1 \n" |
| 361 | " beqzl %2, 1b \n" | 361 | " beqzl %2, 1b \n" |
| 362 | " and %2, %0, %3 \n" | 362 | " and %2, %0, %3 \n" |
| 363 | " .set mips0 \n" | 363 | " .set mips0 \n" |
| @@ -371,10 +371,10 @@ static inline int test_and_clear_bit(unsigned long nr, | |||
| 371 | 371 | ||
| 372 | do { | 372 | do { |
| 373 | __asm__ __volatile__( | 373 | __asm__ __volatile__( |
| 374 | " " __LL "%0, %1 # test_and_clear_bit \n" | 374 | " " __LL "%0, %1 # test_and_clear_bit \n" |
| 375 | " " __EXT "%2, %0, %3, 1 \n" | 375 | " " __EXT "%2, %0, %3, 1 \n" |
| 376 | " " __INS "%0, $0, %3, 1 \n" | 376 | " " __INS "%0, $0, %3, 1 \n" |
| 377 | " " __SC "%0, %1 \n" | 377 | " " __SC "%0, %1 \n" |
| 378 | : "=&r" (temp), "+m" (*m), "=&r" (res) | 378 | : "=&r" (temp), "+m" (*m), "=&r" (res) |
| 379 | : "ir" (bit) | 379 | : "ir" (bit) |
| 380 | : "memory"); | 380 | : "memory"); |
| @@ -387,10 +387,10 @@ static inline int test_and_clear_bit(unsigned long nr, | |||
| 387 | do { | 387 | do { |
| 388 | __asm__ __volatile__( | 388 | __asm__ __volatile__( |
| 389 | " .set mips3 \n" | 389 | " .set mips3 \n" |
| 390 | " " __LL "%0, %1 # test_and_clear_bit \n" | 390 | " " __LL "%0, %1 # test_and_clear_bit \n" |
| 391 | " or %2, %0, %3 \n" | 391 | " or %2, %0, %3 \n" |
| 392 | " xor %2, %3 \n" | 392 | " xor %2, %3 \n" |
| 393 | " " __SC "%2, %1 \n" | 393 | " " __SC "%2, %1 \n" |
| 394 | " .set mips0 \n" | 394 | " .set mips0 \n" |
| 395 | : "=&r" (temp), "+m" (*m), "=&r" (res) | 395 | : "=&r" (temp), "+m" (*m), "=&r" (res) |
| 396 | : "r" (1UL << bit) | 396 | : "r" (1UL << bit) |
| @@ -444,7 +444,7 @@ static inline int test_and_change_bit(unsigned long nr, | |||
| 444 | do { | 444 | do { |
| 445 | __asm__ __volatile__( | 445 | __asm__ __volatile__( |
| 446 | " .set mips3 \n" | 446 | " .set mips3 \n" |
| 447 | " " __LL "%0, %1 # test_and_change_bit \n" | 447 | " " __LL "%0, %1 # test_and_change_bit \n" |
| 448 | " xor %2, %0, %3 \n" | 448 | " xor %2, %0, %3 \n" |
| 449 | " " __SC "\t%2, %1 \n" | 449 | " " __SC "\t%2, %1 \n" |
| 450 | " .set mips0 \n" | 450 | " .set mips0 \n" |