diff options
Diffstat (limited to 'arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c')
-rw-r--r-- | arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c | 109 |
1 files changed, 0 insertions, 109 deletions
diff --git a/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c b/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c deleted file mode 100644 index a3c5e7b18018..000000000000 --- a/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c +++ /dev/null | |||
@@ -1,109 +0,0 @@ | |||
1 | /* | ||
2 | * The irq controller for vrc5476. | ||
3 | * | ||
4 | * Copyright (C) 2001 MontaVista Software Inc. | ||
5 | * Author: jsun@mvista.com or jsun@junsun.net | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/irq.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/ptrace.h> | ||
18 | |||
19 | #include <asm/system.h> | ||
20 | |||
21 | #include <asm/ddb5xxx/ddb5xxx.h> | ||
22 | |||
23 | static int irq_base; | ||
24 | |||
25 | static void vrc5476_irq_enable(uint irq) | ||
26 | { | ||
27 | nile4_enable_irq(irq - irq_base); | ||
28 | } | ||
29 | |||
30 | static void vrc5476_irq_disable(uint irq) | ||
31 | { | ||
32 | nile4_disable_irq(irq - irq_base); | ||
33 | } | ||
34 | |||
35 | static unsigned int vrc5476_irq_startup(uint irq) | ||
36 | { | ||
37 | nile4_enable_irq(irq - irq_base); | ||
38 | return 0; | ||
39 | } | ||
40 | |||
41 | #define vrc5476_irq_shutdown vrc5476_irq_disable | ||
42 | |||
43 | static void vrc5476_irq_ack(uint irq) | ||
44 | { | ||
45 | nile4_clear_irq(irq - irq_base); | ||
46 | nile4_disable_irq(irq - irq_base); | ||
47 | } | ||
48 | |||
49 | static void vrc5476_irq_end(uint irq) | ||
50 | { | ||
51 | if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | ||
52 | vrc5476_irq_enable(irq); | ||
53 | } | ||
54 | |||
55 | static hw_irq_controller vrc5476_irq_controller = { | ||
56 | .typename = "vrc5476", | ||
57 | .startup = vrc5476_irq_startup, | ||
58 | .shutdown = vrc5476_irq_shutdown, | ||
59 | .enable = vrc5476_irq_enable, | ||
60 | .disable = vrc5476_irq_disable, | ||
61 | .ack = vrc5476_irq_ack, | ||
62 | .end = vrc5476_irq_end | ||
63 | }; | ||
64 | |||
65 | void __init | ||
66 | vrc5476_irq_init(u32 base) | ||
67 | { | ||
68 | u32 i; | ||
69 | |||
70 | irq_base = base; | ||
71 | for (i= base; i< base + NUM_VRC5476_IRQ; i++) { | ||
72 | irq_desc[i].status = IRQ_DISABLED; | ||
73 | irq_desc[i].action = NULL; | ||
74 | irq_desc[i].depth = 1; | ||
75 | irq_desc[i].handler = &vrc5476_irq_controller; | ||
76 | } | ||
77 | } | ||
78 | |||
79 | |||
80 | void | ||
81 | vrc5476_irq_dispatch(struct pt_regs *regs) | ||
82 | { | ||
83 | u32 mask; | ||
84 | int nile4_irq; | ||
85 | |||
86 | mask = nile4_get_irq_stat(0); | ||
87 | |||
88 | /* quick check for possible time interrupt */ | ||
89 | if (mask & (1 << VRC5476_IRQ_GPT)) { | ||
90 | do_IRQ(VRC5476_IRQ_BASE + VRC5476_IRQ_GPT, regs); | ||
91 | return; | ||
92 | } | ||
93 | |||
94 | /* check for i8259 interrupts */ | ||
95 | if (mask & (1 << VRC5476_I8259_CASCADE)) { | ||
96 | int i8259_irq = nile4_i8259_iack(); | ||
97 | do_IRQ(I8259_IRQ_BASE + i8259_irq, regs); | ||
98 | return; | ||
99 | } | ||
100 | |||
101 | /* regular nile4 interrupts (we should not really have any */ | ||
102 | for (nile4_irq = 0; mask; nile4_irq++, mask >>= 1) { | ||
103 | if (mask & 1) { | ||
104 | do_IRQ(VRC5476_IRQ_BASE + nile4_irq, regs); | ||
105 | return; | ||
106 | } | ||
107 | } | ||
108 | spurious_interrupt(regs); | ||
109 | } | ||