1 files changed, 0 insertions, 50 deletions

diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h b/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h
index e548e9d1d6fa..29498e59e71f 100644
--- a/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h
+++ b/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h
@@ -1058,54 +1058,4 @@
 /* These need to be last due to the cdef/linux inter-dependencies */
 #include <asm/irq.h>
 
-/* Writing to PLL_CTL initiates a PLL relock sequence. */
-static __inline__ void bfin_write_PLL_CTL(unsigned int val)
-{
-        unsigned long flags, iwr0, iwr1;
-
-        if (val == bfin_read_PLL_CTL())
-                return;
-
-        local_irq_save_hw(flags);
-        /* Enable the PLL Wakeup bit in SIC IWR */
-        iwr0 = bfin_read32(SIC_IWR0);
-        iwr1 = bfin_read32(SIC_IWR1);
-        /* Only allow PPL Wakeup) */
-        bfin_write32(SIC_IWR0, IWR_ENABLE(0));
-        bfin_write32(SIC_IWR1, 0);
-
-        bfin_write16(PLL_CTL, val);
-        SSYNC();
-        asm("IDLE;");
-
-        bfin_write32(SIC_IWR0, iwr0);
-        bfin_write32(SIC_IWR1, iwr1);
-        local_irq_restore_hw(flags);
-}
-
-/* Writing to VR_CTL initiates a PLL relock sequence. */
-static __inline__ void bfin_write_VR_CTL(unsigned int val)
-{
-        unsigned long flags, iwr0, iwr1;
-
-        if (val == bfin_read_VR_CTL())
-                return;
-
-        local_irq_save_hw(flags);
-        /* Enable the PLL Wakeup bit in SIC IWR */
-        iwr0 = bfin_read32(SIC_IWR0);
-        iwr1 = bfin_read32(SIC_IWR1);
-        /* Only allow PPL Wakeup) */
-        bfin_write32(SIC_IWR0, IWR_ENABLE(0));
-        bfin_write32(SIC_IWR1, 0);
-
-        bfin_write16(VR_CTL, val);
-        SSYNC();
-        asm("IDLE;");
-
-        bfin_write32(SIC_IWR0, iwr0);
-        bfin_write32(SIC_IWR1, iwr1);
-        local_irq_restore_hw(flags);
-}
-
 #endif /* _CDEF_BF52X_H */