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-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts2
-rw-r--r--arch/arm/boot/dts/am335x-evmsk.dts4
-rw-r--r--arch/arm/boot/dts/am335x-shc.dts2
-rw-r--r--arch/arm/boot/dts/armada-xp-db.dts46
-rw-r--r--arch/arm/boot/dts/armada-xp-gp.dts13
-rw-r--r--arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts85
-rw-r--r--arch/arm/boot/dts/da850.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6q-pistachio.dts2
-rw-r--r--arch/arm/boot/dts/imx6sll-evk.dts2
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi2
-rw-r--r--arch/arm/boot/dts/meson.dtsi2
-rw-r--r--arch/arm/boot/dts/meson8b-ec100.dts3
-rw-r--r--arch/arm/boot/dts/meson8b-odroidc1.dts4
-rw-r--r--arch/arm/boot/dts/meson8m2-mxiii-plus.dts3
-rw-r--r--arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-gta04.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts2
-rw-r--r--arch/arm/boot/dts/omap3-n950-n9.dtsi42
-rw-r--r--arch/arm/boot/dts/omap4-droid4-xt894.dts11
-rw-r--r--arch/arm/boot/dts/omap5-board-common.dtsi9
-rw-r--r--arch/arm/boot/dts/omap5-cm-t54.dts12
-rw-r--r--arch/arm/boot/dts/omap5-l4.dtsi2
-rw-r--r--arch/arm/boot/dts/r8a7743.dtsi36
-rw-r--r--arch/arm/boot/dts/rk3188.dtsi1
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi1
-rw-r--r--arch/arm/boot/dts/sun8i-h3-beelink-x2.dts2
-rw-r--r--arch/arm/boot/dts/tegra124-nyan.dtsi17
-rw-r--r--arch/arm/boot/dts/vf610-bk4.dts4
-rw-r--r--arch/arm/include/asm/irq.h1
-rw-r--r--arch/arm/include/asm/kvm_host.h10
-rw-r--r--arch/arm/include/asm/stage2_pgtable.h5
-rw-r--r--arch/arm/kernel/irq.c62
-rw-r--r--arch/arm/kernel/smp.c2
-rw-r--r--arch/arm/kvm/coproc.c4
-rw-r--r--arch/arm/kvm/reset.c24
-rw-r--r--arch/arm/mach-iop32x/n2100.c3
-rw-r--r--arch/arm/mach-omap2/cpuidle44xx.c16
-rw-r--r--arch/arm/mach-omap2/display.c7
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c36
-rw-r--r--arch/arm/mach-tango/pm.c6
-rw-r--r--arch/arm/mach-tango/pm.h7
-rw-r--r--arch/arm/mach-tango/setup.c2
-rw-r--r--arch/arm/mm/dma-mapping.c2
-rw-r--r--arch/arm/plat-pxa/ssp.c3
-rw-r--r--arch/arm/probes/kprobes/opt-arm.c2
-rw-r--r--arch/arm/xen/mm.c1
47 files changed, 299 insertions, 212 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 664e918e2624..26524b75970a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1400,6 +1400,7 @@ config NR_CPUS
1400config HOTPLUG_CPU 1400config HOTPLUG_CPU
1401 bool "Support for hot-pluggable CPUs" 1401 bool "Support for hot-pluggable CPUs"
1402 depends on SMP 1402 depends on SMP
1403 select GENERIC_IRQ_MIGRATION
1403 help 1404 help
1404 Say Y here to experiment with turning CPUs off and on. CPUs 1405 Say Y here to experiment with turning CPUs off and on. CPUs
1405 can be controlled through /sys/devices/system/cpu. 1406 can be controlled through /sys/devices/system/cpu.
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index b67f5fee1469..dce5be5df97b 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -729,7 +729,7 @@
729 729
730&cpsw_emac0 { 730&cpsw_emac0 {
731 phy-handle = <&ethphy0>; 731 phy-handle = <&ethphy0>;
732 phy-mode = "rgmii-txid"; 732 phy-mode = "rgmii-id";
733}; 733};
734 734
735&tscadc { 735&tscadc {
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 172c0224e7f6..b128998097ce 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -651,13 +651,13 @@
651 651
652&cpsw_emac0 { 652&cpsw_emac0 {
653 phy-handle = <&ethphy0>; 653 phy-handle = <&ethphy0>;
654 phy-mode = "rgmii-txid"; 654 phy-mode = "rgmii-id";
655 dual_emac_res_vlan = <1>; 655 dual_emac_res_vlan = <1>;
656}; 656};
657 657
658&cpsw_emac1 { 658&cpsw_emac1 {
659 phy-handle = <&ethphy1>; 659 phy-handle = <&ethphy1>;
660 phy-mode = "rgmii-txid"; 660 phy-mode = "rgmii-id";
661 dual_emac_res_vlan = <2>; 661 dual_emac_res_vlan = <2>;
662}; 662};
663 663
diff --git a/arch/arm/boot/dts/am335x-shc.dts b/arch/arm/boot/dts/am335x-shc.dts
index d0fd68873689..5b250060f6dd 100644
--- a/arch/arm/boot/dts/am335x-shc.dts
+++ b/arch/arm/boot/dts/am335x-shc.dts
@@ -215,7 +215,7 @@
215 pinctrl-names = "default"; 215 pinctrl-names = "default";
216 pinctrl-0 = <&mmc1_pins>; 216 pinctrl-0 = <&mmc1_pins>;
217 bus-width = <0x4>; 217 bus-width = <0x4>;
218 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 218 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
219 cd-inverted; 219 cd-inverted;
220 max-frequency = <26000000>; 220 max-frequency = <26000000>;
221 vmmc-supply = <&vmmcsd_fixed>; 221 vmmc-supply = <&vmmcsd_fixed>;
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index f3ac7483afed..5d04dc68cf57 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -144,30 +144,32 @@
144 status = "okay"; 144 status = "okay";
145 }; 145 };
146 146
147 nand@d0000 { 147 nand-controller@d0000 {
148 status = "okay"; 148 status = "okay";
149 label = "pxa3xx_nand-0";
150 num-cs = <1>;
151 marvell,nand-keep-config;
152 nand-on-flash-bbt;
153
154 partitions {
155 compatible = "fixed-partitions";
156 #address-cells = <1>;
157 #size-cells = <1>;
158
159 partition@0 {
160 label = "U-Boot";
161 reg = <0 0x800000>;
162 };
163 partition@800000 {
164 label = "Linux";
165 reg = <0x800000 0x800000>;
166 };
167 partition@1000000 {
168 label = "Filesystem";
169 reg = <0x1000000 0x3f000000>;
170 149
150 nand@0 {
151 reg = <0>;
152 label = "pxa3xx_nand-0";
153 nand-rb = <0>;
154 nand-on-flash-bbt;
155
156 partitions {
157 compatible = "fixed-partitions";
158 #address-cells = <1>;
159 #size-cells = <1>;
160
161 partition@0 {
162 label = "U-Boot";
163 reg = <0 0x800000>;
164 };
165 partition@800000 {
166 label = "Linux";
167 reg = <0x800000 0x800000>;
168 };
169 partition@1000000 {
170 label = "Filesystem";
171 reg = <0x1000000 0x3f000000>;
172 };
171 }; 173 };
172 }; 174 };
173 }; 175 };
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 1139e9469a83..b4cca507cf13 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -160,12 +160,15 @@
160 status = "okay"; 160 status = "okay";
161 }; 161 };
162 162
163 nand@d0000 { 163 nand-controller@d0000 {
164 status = "okay"; 164 status = "okay";
165 label = "pxa3xx_nand-0"; 165
166 num-cs = <1>; 166 nand@0 {
167 marvell,nand-keep-config; 167 reg = <0>;
168 nand-on-flash-bbt; 168 label = "pxa3xx_nand-0";
169 nand-rb = <0>;
170 nand-on-flash-bbt;
171 };
169 }; 172 };
170 }; 173 };
171 174
diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
index bbbb38888bb8..87dcb502f72d 100644
--- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
@@ -81,49 +81,52 @@
81 81
82 }; 82 };
83 83
84 nand@d0000 { 84 nand-controller@d0000 {
85 status = "okay"; 85 status = "okay";
86 label = "pxa3xx_nand-0";
87 num-cs = <1>;
88 marvell,nand-keep-config;
89 nand-on-flash-bbt;
90
91 partitions {
92 compatible = "fixed-partitions";
93 #address-cells = <1>;
94 #size-cells = <1>;
95
96 partition@0 {
97 label = "u-boot";
98 reg = <0x00000000 0x000e0000>;
99 read-only;
100 };
101
102 partition@e0000 {
103 label = "u-boot-env";
104 reg = <0x000e0000 0x00020000>;
105 read-only;
106 };
107
108 partition@100000 {
109 label = "u-boot-env2";
110 reg = <0x00100000 0x00020000>;
111 read-only;
112 };
113
114 partition@120000 {
115 label = "zImage";
116 reg = <0x00120000 0x00400000>;
117 };
118
119 partition@520000 {
120 label = "initrd";
121 reg = <0x00520000 0x00400000>;
122 };
123 86
124 partition@e00000 { 87 nand@0 {
125 label = "boot"; 88 reg = <0>;
126 reg = <0x00e00000 0x3f200000>; 89 label = "pxa3xx_nand-0";
90 nand-rb = <0>;
91 nand-on-flash-bbt;
92
93 partitions {
94 compatible = "fixed-partitions";
95 #address-cells = <1>;
96 #size-cells = <1>;
97
98 partition@0 {
99 label = "u-boot";
100 reg = <0x00000000 0x000e0000>;
101 read-only;
102 };
103
104 partition@e0000 {
105 label = "u-boot-env";
106 reg = <0x000e0000 0x00020000>;
107 read-only;
108 };
109
110 partition@100000 {
111 label = "u-boot-env2";
112 reg = <0x00100000 0x00020000>;
113 read-only;
114 };
115
116 partition@120000 {
117 label = "zImage";
118 reg = <0x00120000 0x00400000>;
119 };
120
121 partition@520000 {
122 label = "initrd";
123 reg = <0x00520000 0x00400000>;
124 };
125
126 partition@e00000 {
127 label = "boot";
128 reg = <0x00e00000 0x3f200000>;
129 };
127 }; 130 };
128 }; 131 };
129 }; 132 };
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 47aa53ba6b92..559659b399d0 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -476,7 +476,7 @@
476 clocksource: timer@20000 { 476 clocksource: timer@20000 {
477 compatible = "ti,da830-timer"; 477 compatible = "ti,da830-timer";
478 reg = <0x20000 0x1000>; 478 reg = <0x20000 0x1000>;
479 interrupts = <12>, <13>; 479 interrupts = <21>, <22>;
480 interrupt-names = "tint12", "tint34"; 480 interrupt-names = "tint12", "tint34";
481 clocks = <&pll0_auxclk>; 481 clocks = <&pll0_auxclk>;
482 }; 482 };
diff --git a/arch/arm/boot/dts/imx6q-pistachio.dts b/arch/arm/boot/dts/imx6q-pistachio.dts
index 5edf858c8b86..a31b17eaf51c 100644
--- a/arch/arm/boot/dts/imx6q-pistachio.dts
+++ b/arch/arm/boot/dts/imx6q-pistachio.dts
@@ -103,7 +103,7 @@
103 power { 103 power {
104 label = "Power Button"; 104 label = "Power Button";
105 gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 105 gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
106 gpio-key,wakeup; 106 wakeup-source;
107 linux,code = <KEY_POWER>; 107 linux,code = <KEY_POWER>;
108 }; 108 };
109 }; 109 };
diff --git a/arch/arm/boot/dts/imx6sll-evk.dts b/arch/arm/boot/dts/imx6sll-evk.dts
index d8163705363e..4a31a415f88e 100644
--- a/arch/arm/boot/dts/imx6sll-evk.dts
+++ b/arch/arm/boot/dts/imx6sll-evk.dts
@@ -309,7 +309,7 @@
309 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 309 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
310 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 310 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
311 keep-power-in-suspend; 311 keep-power-in-suspend;
312 enable-sdio-wakeup; 312 wakeup-source;
313 vmmc-supply = <&reg_sd3_vmmc>; 313 vmmc-supply = <&reg_sd3_vmmc>;
314 status = "okay"; 314 status = "okay";
315}; 315};
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 272ff6133ec1..d1375d3650fd 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -467,7 +467,7 @@
467 }; 467 };
468 468
469 gpt: gpt@2098000 { 469 gpt: gpt@2098000 {
470 compatible = "fsl,imx6sx-gpt", "fsl,imx31-gpt"; 470 compatible = "fsl,imx6sx-gpt", "fsl,imx6dl-gpt";
471 reg = <0x02098000 0x4000>; 471 reg = <0x02098000 0x4000>;
472 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 472 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
473 clocks = <&clks IMX6SX_CLK_GPT_BUS>, 473 clocks = <&clks IMX6SX_CLK_GPT_BUS>,
diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi
index e4645f612712..2ab74860d962 100644
--- a/arch/arm/boot/dts/meson.dtsi
+++ b/arch/arm/boot/dts/meson.dtsi
@@ -274,7 +274,7 @@
274 compatible = "amlogic,meson6-dwmac", "snps,dwmac"; 274 compatible = "amlogic,meson6-dwmac", "snps,dwmac";
275 reg = <0xc9410000 0x10000 275 reg = <0xc9410000 0x10000
276 0xc1108108 0x4>; 276 0xc1108108 0x4>;
277 interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>; 277 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
278 interrupt-names = "macirq"; 278 interrupt-names = "macirq";
279 status = "disabled"; 279 status = "disabled";
280 }; 280 };
diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts
index 0872f6e3abf5..d50fc2f60fa3 100644
--- a/arch/arm/boot/dts/meson8b-ec100.dts
+++ b/arch/arm/boot/dts/meson8b-ec100.dts
@@ -205,8 +205,7 @@
205 cap-sd-highspeed; 205 cap-sd-highspeed;
206 disable-wp; 206 disable-wp;
207 207
208 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 208 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
209 cd-inverted;
210 209
211 vmmc-supply = <&vcc_3v3>; 210 vmmc-supply = <&vcc_3v3>;
212 }; 211 };
diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index 58669abda259..0f0a46ddf3ff 100644
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -221,7 +221,6 @@
221 /* Realtek RTL8211F (0x001cc916) */ 221 /* Realtek RTL8211F (0x001cc916) */
222 eth_phy: ethernet-phy@0 { 222 eth_phy: ethernet-phy@0 {
223 reg = <0>; 223 reg = <0>;
224 eee-broken-1000t;
225 interrupt-parent = <&gpio_intc>; 224 interrupt-parent = <&gpio_intc>;
226 /* GPIOH_3 */ 225 /* GPIOH_3 */
227 interrupts = <17 IRQ_TYPE_LEVEL_LOW>; 226 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
@@ -273,8 +272,7 @@
273 cap-sd-highspeed; 272 cap-sd-highspeed;
274 disable-wp; 273 disable-wp;
275 274
276 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 275 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
277 cd-inverted;
278 276
279 vmmc-supply = <&tflash_vdd>; 277 vmmc-supply = <&tflash_vdd>;
280 vqmmc-supply = <&tf_io>; 278 vqmmc-supply = <&tf_io>;
diff --git a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
index f5853610b20b..6ac02beb5fa7 100644
--- a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
+++ b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
@@ -206,8 +206,7 @@
206 cap-sd-highspeed; 206 cap-sd-highspeed;
207 disable-wp; 207 disable-wp;
208 208
209 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 209 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
210 cd-inverted;
211 210
212 vmmc-supply = <&vcc_3v3>; 211 vmmc-supply = <&vcc_3v3>;
213 }; 212 };
diff --git a/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi b/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
index ddc7a7bb33c0..f57acf8f66b9 100644
--- a/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
+++ b/arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
@@ -105,7 +105,7 @@
105 interrupts-extended = < 105 interrupts-extended = <
106 &cpcap 15 0 &cpcap 14 0 &cpcap 28 0 &cpcap 19 0 106 &cpcap 15 0 &cpcap 14 0 &cpcap 28 0 &cpcap 19 0
107 &cpcap 18 0 &cpcap 17 0 &cpcap 16 0 &cpcap 49 0 107 &cpcap 18 0 &cpcap 17 0 &cpcap 16 0 &cpcap 49 0
108 &cpcap 48 1 108 &cpcap 48 0
109 >; 109 >;
110 interrupt-names = 110 interrupt-names =
111 "id_ground", "id_float", "se0conn", "vbusvld", 111 "id_ground", "id_float", "se0conn", "vbusvld",
diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi
index e53d32691308..93b420934e8e 100644
--- a/arch/arm/boot/dts/omap3-gta04.dtsi
+++ b/arch/arm/boot/dts/omap3-gta04.dtsi
@@ -714,11 +714,7 @@
714 714
715 vdda-supply = <&vdac>; 715 vdda-supply = <&vdac>;
716 716
717 #address-cells = <1>;
718 #size-cells = <0>;
719
720 port { 717 port {
721 reg = <0>;
722 venc_out: endpoint { 718 venc_out: endpoint {
723 remote-endpoint = <&opa_in>; 719 remote-endpoint = <&opa_in>;
724 ti,channels = <1>; 720 ti,channels = <1>;
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 182a53991c90..826920e6b878 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -814,7 +814,7 @@
814 /* For debugging, it is often good idea to remove this GPIO. 814 /* For debugging, it is often good idea to remove this GPIO.
815 It means you can remove back cover (to reboot by removing 815 It means you can remove back cover (to reboot by removing
816 battery) and still use the MMC card. */ 816 battery) and still use the MMC card. */
817 cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */ 817 cd-gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
818}; 818};
819 819
820/* most boards use vaux3, only some old versions use vmmc2 instead */ 820/* most boards use vaux3, only some old versions use vmmc2 instead */
diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi
index 0d9b85317529..e142e6c70a59 100644
--- a/arch/arm/boot/dts/omap3-n950-n9.dtsi
+++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi
@@ -370,6 +370,19 @@
370 compatible = "ti,omap2-onenand"; 370 compatible = "ti,omap2-onenand";
371 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */ 371 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
372 372
373 /*
374 * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported
375 * bootloader set values when booted with v4.19 using both N950
376 * and N9 devices (OneNAND Manufacturer: Samsung):
377 *
378 * gpmc cs0 before gpmc_cs_program_settings:
379 * cs0 GPMC_CS_CONFIG1: 0xfd001202
380 * cs0 GPMC_CS_CONFIG2: 0x00181800
381 * cs0 GPMC_CS_CONFIG3: 0x00030300
382 * cs0 GPMC_CS_CONFIG4: 0x18001804
383 * cs0 GPMC_CS_CONFIG5: 0x03171d1d
384 * cs0 GPMC_CS_CONFIG6: 0x97080000
385 */
373 gpmc,sync-read; 386 gpmc,sync-read;
374 gpmc,sync-write; 387 gpmc,sync-write;
375 gpmc,burst-length = <16>; 388 gpmc,burst-length = <16>;
@@ -379,26 +392,27 @@
379 gpmc,device-width = <2>; 392 gpmc,device-width = <2>;
380 gpmc,mux-add-data = <2>; 393 gpmc,mux-add-data = <2>;
381 gpmc,cs-on-ns = <0>; 394 gpmc,cs-on-ns = <0>;
382 gpmc,cs-rd-off-ns = <87>; 395 gpmc,cs-rd-off-ns = <122>;
383 gpmc,cs-wr-off-ns = <87>; 396 gpmc,cs-wr-off-ns = <122>;
384 gpmc,adv-on-ns = <0>; 397 gpmc,adv-on-ns = <0>;
385 gpmc,adv-rd-off-ns = <10>; 398 gpmc,adv-rd-off-ns = <15>;
386 gpmc,adv-wr-off-ns = <10>; 399 gpmc,adv-wr-off-ns = <15>;
387 gpmc,oe-on-ns = <15>; 400 gpmc,oe-on-ns = <20>;
388 gpmc,oe-off-ns = <87>; 401 gpmc,oe-off-ns = <122>;
389 gpmc,we-on-ns = <0>; 402 gpmc,we-on-ns = <0>;
390 gpmc,we-off-ns = <87>; 403 gpmc,we-off-ns = <122>;
391 gpmc,rd-cycle-ns = <112>; 404 gpmc,rd-cycle-ns = <148>;
392 gpmc,wr-cycle-ns = <112>; 405 gpmc,wr-cycle-ns = <148>;
393 gpmc,access-ns = <81>; 406 gpmc,access-ns = <117>;
394 gpmc,page-burst-access-ns = <15>; 407 gpmc,page-burst-access-ns = <15>;
395 gpmc,bus-turnaround-ns = <0>; 408 gpmc,bus-turnaround-ns = <0>;
396 gpmc,cycle2cycle-delay-ns = <0>; 409 gpmc,cycle2cycle-delay-ns = <0>;
397 gpmc,wait-monitoring-ns = <0>; 410 gpmc,wait-monitoring-ns = <0>;
398 gpmc,clk-activation-ns = <5>; 411 gpmc,clk-activation-ns = <10>;
399 gpmc,wr-data-mux-bus-ns = <30>; 412 gpmc,wr-data-mux-bus-ns = <40>;
400 gpmc,wr-access-ns = <81>; 413 gpmc,wr-access-ns = <117>;
401 gpmc,sync-clk-ps = <15000>; 414
415 gpmc,sync-clk-ps = <15000>; /* TBC; Where this value came? */
402 416
403 /* 417 /*
404 * MTD partition table corresponding to Nokia's MeeGo 1.2 418 * MTD partition table corresponding to Nokia's MeeGo 1.2
diff --git a/arch/arm/boot/dts/omap4-droid4-xt894.dts b/arch/arm/boot/dts/omap4-droid4-xt894.dts
index 04758a2a87f0..67d77eee9433 100644
--- a/arch/arm/boot/dts/omap4-droid4-xt894.dts
+++ b/arch/arm/boot/dts/omap4-droid4-xt894.dts
@@ -644,6 +644,17 @@
644 }; 644 };
645}; 645};
646 646
647/* Configure pwm clock source for timers 8 & 9 */
648&timer8 {
649 assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
650 assigned-clock-parents = <&sys_clkin_ck>;
651};
652
653&timer9 {
654 assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
655 assigned-clock-parents = <&sys_clkin_ck>;
656};
657
647/* 658/*
648 * As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for 659 * As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
649 * uart1 wakeirq. 660 * uart1 wakeirq.
diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi
index bc853ebeda22..61a06f6add3c 100644
--- a/arch/arm/boot/dts/omap5-board-common.dtsi
+++ b/arch/arm/boot/dts/omap5-board-common.dtsi
@@ -317,7 +317,8 @@
317 317
318 palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins { 318 palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
319 pinctrl-single,pins = < 319 pinctrl-single,pins = <
320 OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */ 320 /* sys_nirq1 is pulled down as the SoC is inverting it for GIC */
321 OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0)
321 >; 322 >;
322 }; 323 };
323 324
@@ -385,7 +386,8 @@
385 386
386 palmas: palmas@48 { 387 palmas: palmas@48 {
387 compatible = "ti,palmas"; 388 compatible = "ti,palmas";
388 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */ 389 /* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
390 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
389 reg = <0x48>; 391 reg = <0x48>;
390 interrupt-controller; 392 interrupt-controller;
391 #interrupt-cells = <2>; 393 #interrupt-cells = <2>;
@@ -651,7 +653,8 @@
651 pinctrl-names = "default"; 653 pinctrl-names = "default";
652 pinctrl-0 = <&twl6040_pins>; 654 pinctrl-0 = <&twl6040_pins>;
653 655
654 interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */ 656 /* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
657 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_LOW>;
655 658
656 /* audpwron gpio defined in the board specific dts */ 659 /* audpwron gpio defined in the board specific dts */
657 660
diff --git a/arch/arm/boot/dts/omap5-cm-t54.dts b/arch/arm/boot/dts/omap5-cm-t54.dts
index 5e21fb430a65..e78d3718f145 100644
--- a/arch/arm/boot/dts/omap5-cm-t54.dts
+++ b/arch/arm/boot/dts/omap5-cm-t54.dts
@@ -181,6 +181,13 @@
181 OMAP5_IOPAD(0x0042, PIN_INPUT_PULLDOWN | MUX_MODE6) /* llib_wakereqin.gpio1_wk15 */ 181 OMAP5_IOPAD(0x0042, PIN_INPUT_PULLDOWN | MUX_MODE6) /* llib_wakereqin.gpio1_wk15 */
182 >; 182 >;
183 }; 183 };
184
185 palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
186 pinctrl-single,pins = <
187 /* sys_nirq1 is pulled down as the SoC is inverting it for GIC */
188 OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0)
189 >;
190 };
184}; 191};
185 192
186&omap5_pmx_core { 193&omap5_pmx_core {
@@ -414,8 +421,11 @@
414 421
415 palmas: palmas@48 { 422 palmas: palmas@48 {
416 compatible = "ti,palmas"; 423 compatible = "ti,palmas";
417 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
418 reg = <0x48>; 424 reg = <0x48>;
425 pinctrl-0 = <&palmas_sys_nirq_pins>;
426 pinctrl-names = "default";
427 /* sys_nirq/ext_sys_irq pins get inverted at mpuss wakeupgen */
428 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
419 interrupt-controller; 429 interrupt-controller;
420 #interrupt-cells = <2>; 430 #interrupt-cells = <2>;
421 ti,system-power-controller; 431 ti,system-power-controller;
diff --git a/arch/arm/boot/dts/omap5-l4.dtsi b/arch/arm/boot/dts/omap5-l4.dtsi
index 9c7e309d9c2c..0960348002ad 100644
--- a/arch/arm/boot/dts/omap5-l4.dtsi
+++ b/arch/arm/boot/dts/omap5-l4.dtsi
@@ -1046,8 +1046,6 @@
1046 <SYSC_IDLE_SMART>, 1046 <SYSC_IDLE_SMART>,
1047 <SYSC_IDLE_SMART_WKUP>; 1047 <SYSC_IDLE_SMART_WKUP>;
1048 ti,syss-mask = <1>; 1048 ti,syss-mask = <1>;
1049 ti,no-reset-on-init;
1050 ti,no-idle-on-init;
1051 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */ 1049 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1052 clocks = <&l4per_clkctrl OMAP5_UART3_CLKCTRL 0>; 1050 clocks = <&l4per_clkctrl OMAP5_UART3_CLKCTRL 0>;
1053 clock-names = "fck"; 1051 clock-names = "fck";
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 3cc33f7ff7fe..3adc158a40bb 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -1681,15 +1681,12 @@
1681 1681
1682 du: display@feb00000 { 1682 du: display@feb00000 {
1683 compatible = "renesas,du-r8a7743"; 1683 compatible = "renesas,du-r8a7743";
1684 reg = <0 0xfeb00000 0 0x40000>, 1684 reg = <0 0xfeb00000 0 0x40000>;
1685 <0 0xfeb90000 0 0x1c>;
1686 reg-names = "du", "lvds.0";
1687 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1685 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1688 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1686 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1689 clocks = <&cpg CPG_MOD 724>, 1687 clocks = <&cpg CPG_MOD 724>,
1690 <&cpg CPG_MOD 723>, 1688 <&cpg CPG_MOD 723>;
1691 <&cpg CPG_MOD 726>; 1689 clock-names = "du.0", "du.1";
1692 clock-names = "du.0", "du.1", "lvds.0";
1693 status = "disabled"; 1690 status = "disabled";
1694 1691
1695 ports { 1692 ports {
@@ -1704,6 +1701,33 @@
1704 port@1 { 1701 port@1 {
1705 reg = <1>; 1702 reg = <1>;
1706 du_out_lvds0: endpoint { 1703 du_out_lvds0: endpoint {
1704 remote-endpoint = <&lvds0_in>;
1705 };
1706 };
1707 };
1708 };
1709
1710 lvds0: lvds@feb90000 {
1711 compatible = "renesas,r8a7743-lvds";
1712 reg = <0 0xfeb90000 0 0x1c>;
1713 clocks = <&cpg CPG_MOD 726>;
1714 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1715 resets = <&cpg 726>;
1716 status = "disabled";
1717
1718 ports {
1719 #address-cells = <1>;
1720 #size-cells = <0>;
1721
1722 port@0 {
1723 reg = <0>;
1724 lvds0_in: endpoint {
1725 remote-endpoint = <&du_out_lvds0>;
1726 };
1727 };
1728 port@1 {
1729 reg = <1>;
1730 lvds0_out: endpoint {
1707 }; 1731 };
1708 }; 1732 };
1709 }; 1733 };
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 4acb501dd3f8..3ed49898f4b2 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -719,7 +719,6 @@
719 pm_qos = <&qos_lcdc0>, 719 pm_qos = <&qos_lcdc0>,
720 <&qos_lcdc1>, 720 <&qos_lcdc1>,
721 <&qos_cif0>, 721 <&qos_cif0>,
722 <&qos_cif1>,
723 <&qos_ipp>, 722 <&qos_ipp>,
724 <&qos_rga>; 723 <&qos_rga>;
725 }; 724 };
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 353d90f99b40..13304b8c5139 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -216,6 +216,7 @@
216 #clock-cells = <0>; 216 #clock-cells = <0>;
217 compatible = "fixed-clock"; 217 compatible = "fixed-clock";
218 clock-frequency = <24000000>; 218 clock-frequency = <24000000>;
219 clock-output-names = "osc24M";
219 }; 220 };
220 221
221 osc32k: clk-32k { 222 osc32k: clk-32k {
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
index 5d23667dc2d2..25540b7694d5 100644
--- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
@@ -53,7 +53,7 @@
53 53
54 aliases { 54 aliases {
55 serial0 = &uart0; 55 serial0 = &uart0;
56 /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ 56 ethernet0 = &emac;
57 ethernet1 = &sdiowifi; 57 ethernet1 = &sdiowifi;
58 }; 58 };
59 59
diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi
index d5f11d6d987e..bc85b6a166c7 100644
--- a/arch/arm/boot/dts/tegra124-nyan.dtsi
+++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
@@ -13,10 +13,25 @@
13 stdout-path = "serial0:115200n8"; 13 stdout-path = "serial0:115200n8";
14 }; 14 };
15 15
16 memory@80000000 { 16 /*
17 * Note that recent version of the device tree compiler (starting with
18 * version 1.4.2) warn about this node containing a reg property, but
19 * missing a unit-address. However, the bootloader on these Chromebook
20 * devices relies on the full name of this node to be exactly /memory.
21 * Adding the unit-address causes the bootloader to create a /memory
22 * node and write the memory bank configuration to that node, which in
23 * turn leads the kernel to believe that the device has 2 GiB of
24 * memory instead of the amount detected by the bootloader.
25 *
26 * The name of this node is effectively ABI and must not be changed.
27 */
28 memory {
29 device_type = "memory";
17 reg = <0x0 0x80000000 0x0 0x80000000>; 30 reg = <0x0 0x80000000 0x0 0x80000000>;
18 }; 31 };
19 32
33 /delete-node/ memory@80000000;
34
20 host1x@50000000 { 35 host1x@50000000 {
21 hdmi@54280000 { 36 hdmi@54280000 {
22 status = "okay"; 37 status = "okay";
diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts
index 689c8930dce3..b08d561d6748 100644
--- a/arch/arm/boot/dts/vf610-bk4.dts
+++ b/arch/arm/boot/dts/vf610-bk4.dts
@@ -110,11 +110,11 @@
110 bus-num = <3>; 110 bus-num = <3>;
111 status = "okay"; 111 status = "okay";
112 spi-slave; 112 spi-slave;
113 #address-cells = <0>;
113 114
114 slave@0 { 115 slave {
115 compatible = "lwn,bk4"; 116 compatible = "lwn,bk4";
116 spi-max-frequency = <30000000>; 117 spi-max-frequency = <30000000>;
117 reg = <0>;
118 }; 118 };
119}; 119};
120 120
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index c883fcbe93b6..46d41140df27 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -25,7 +25,6 @@
25#ifndef __ASSEMBLY__ 25#ifndef __ASSEMBLY__
26struct irqaction; 26struct irqaction;
27struct pt_regs; 27struct pt_regs;
28extern void migrate_irqs(void);
29 28
30extern void asm_do_IRQ(unsigned int, struct pt_regs *); 29extern void asm_do_IRQ(unsigned int, struct pt_regs *);
31void handle_IRQ(unsigned int, struct pt_regs *); 30void handle_IRQ(unsigned int, struct pt_regs *);
diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h
index ca56537b61bc..50e89869178a 100644
--- a/arch/arm/include/asm/kvm_host.h
+++ b/arch/arm/include/asm/kvm_host.h
@@ -48,6 +48,7 @@
48#define KVM_REQ_SLEEP \ 48#define KVM_REQ_SLEEP \
49 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 49 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
50#define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1) 50#define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1)
51#define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2)
51 52
52DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use); 53DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
53 54
@@ -147,6 +148,13 @@ struct kvm_cpu_context {
147 148
148typedef struct kvm_cpu_context kvm_cpu_context_t; 149typedef struct kvm_cpu_context kvm_cpu_context_t;
149 150
151struct vcpu_reset_state {
152 unsigned long pc;
153 unsigned long r0;
154 bool be;
155 bool reset;
156};
157
150struct kvm_vcpu_arch { 158struct kvm_vcpu_arch {
151 struct kvm_cpu_context ctxt; 159 struct kvm_cpu_context ctxt;
152 160
@@ -186,6 +194,8 @@ struct kvm_vcpu_arch {
186 /* Cache some mmu pages needed inside spinlock regions */ 194 /* Cache some mmu pages needed inside spinlock regions */
187 struct kvm_mmu_memory_cache mmu_page_cache; 195 struct kvm_mmu_memory_cache mmu_page_cache;
188 196
197 struct vcpu_reset_state reset_state;
198
189 /* Detect first run of a vcpu */ 199 /* Detect first run of a vcpu */
190 bool has_run_once; 200 bool has_run_once;
191}; 201};
diff --git a/arch/arm/include/asm/stage2_pgtable.h b/arch/arm/include/asm/stage2_pgtable.h
index c4b1d4fb1797..de2089501b8b 100644
--- a/arch/arm/include/asm/stage2_pgtable.h
+++ b/arch/arm/include/asm/stage2_pgtable.h
@@ -76,4 +76,9 @@ static inline bool kvm_stage2_has_pud(struct kvm *kvm)
76#define S2_PMD_MASK PMD_MASK 76#define S2_PMD_MASK PMD_MASK
77#define S2_PMD_SIZE PMD_SIZE 77#define S2_PMD_SIZE PMD_SIZE
78 78
79static inline bool kvm_stage2_has_pmd(struct kvm *kvm)
80{
81 return true;
82}
83
79#endif /* __ARM_S2_PGTABLE_H_ */ 84#endif /* __ARM_S2_PGTABLE_H_ */
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 9908dacf9229..844861368cd5 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -31,7 +31,6 @@
31#include <linux/smp.h> 31#include <linux/smp.h>
32#include <linux/init.h> 32#include <linux/init.h>
33#include <linux/seq_file.h> 33#include <linux/seq_file.h>
34#include <linux/ratelimit.h>
35#include <linux/errno.h> 34#include <linux/errno.h>
36#include <linux/list.h> 35#include <linux/list.h>
37#include <linux/kallsyms.h> 36#include <linux/kallsyms.h>
@@ -109,64 +108,3 @@ int __init arch_probe_nr_irqs(void)
109 return nr_irqs; 108 return nr_irqs;
110} 109}
111#endif 110#endif
112
113#ifdef CONFIG_HOTPLUG_CPU
114static bool migrate_one_irq(struct irq_desc *desc)
115{
116 struct irq_data *d = irq_desc_get_irq_data(desc);
117 const struct cpumask *affinity = irq_data_get_affinity_mask(d);
118 struct irq_chip *c;
119 bool ret = false;
120
121 /*
122 * If this is a per-CPU interrupt, or the affinity does not
123 * include this CPU, then we have nothing to do.
124 */
125 if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
126 return false;
127
128 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
129 affinity = cpu_online_mask;
130 ret = true;
131 }
132
133 c = irq_data_get_irq_chip(d);
134 if (!c->irq_set_affinity)
135 pr_debug("IRQ%u: unable to set affinity\n", d->irq);
136 else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret)
137 cpumask_copy(irq_data_get_affinity_mask(d), affinity);
138
139 return ret;
140}
141
142/*
143 * The current CPU has been marked offline. Migrate IRQs off this CPU.
144 * If the affinity settings do not allow other CPUs, force them onto any
145 * available CPU.
146 *
147 * Note: we must iterate over all IRQs, whether they have an attached
148 * action structure or not, as we need to get chained interrupts too.
149 */
150void migrate_irqs(void)
151{
152 unsigned int i;
153 struct irq_desc *desc;
154 unsigned long flags;
155
156 local_irq_save(flags);
157
158 for_each_irq_desc(i, desc) {
159 bool affinity_broken;
160
161 raw_spin_lock(&desc->lock);
162 affinity_broken = migrate_one_irq(desc);
163 raw_spin_unlock(&desc->lock);
164
165 if (affinity_broken)
166 pr_warn_ratelimited("IRQ%u no longer affine to CPU%u\n",
167 i, smp_processor_id());
168 }
169
170 local_irq_restore(flags);
171}
172#endif /* CONFIG_HOTPLUG_CPU */
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 3bf82232b1be..1d6f5ea522f4 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -254,7 +254,7 @@ int __cpu_disable(void)
254 /* 254 /*
255 * OK - migrate IRQs away from this CPU 255 * OK - migrate IRQs away from this CPU
256 */ 256 */
257 migrate_irqs(); 257 irq_migrate_all_off_this_cpu();
258 258
259 /* 259 /*
260 * Flush user cache and TLB mappings, and then remove this CPU 260 * Flush user cache and TLB mappings, and then remove this CPU
diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
index 222c1635bc7a..e8bd288fd5be 100644
--- a/arch/arm/kvm/coproc.c
+++ b/arch/arm/kvm/coproc.c
@@ -1450,6 +1450,6 @@ void kvm_reset_coprocs(struct kvm_vcpu *vcpu)
1450 reset_coproc_regs(vcpu, table, num); 1450 reset_coproc_regs(vcpu, table, num);
1451 1451
1452 for (num = 1; num < NR_CP15_REGS; num++) 1452 for (num = 1; num < NR_CP15_REGS; num++)
1453 if (vcpu_cp15(vcpu, num) == 0x42424242) 1453 WARN(vcpu_cp15(vcpu, num) == 0x42424242,
1454 panic("Didn't reset vcpu_cp15(vcpu, %zi)", num); 1454 "Didn't reset vcpu_cp15(vcpu, %zi)", num);
1455} 1455}
diff --git a/arch/arm/kvm/reset.c b/arch/arm/kvm/reset.c
index 5ed0c3ee33d6..e53327912adc 100644
--- a/arch/arm/kvm/reset.c
+++ b/arch/arm/kvm/reset.c
@@ -26,6 +26,7 @@
26#include <asm/cputype.h> 26#include <asm/cputype.h>
27#include <asm/kvm_arm.h> 27#include <asm/kvm_arm.h>
28#include <asm/kvm_coproc.h> 28#include <asm/kvm_coproc.h>
29#include <asm/kvm_emulate.h>
29 30
30#include <kvm/arm_arch_timer.h> 31#include <kvm/arm_arch_timer.h>
31 32
@@ -69,6 +70,29 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
69 /* Reset CP15 registers */ 70 /* Reset CP15 registers */
70 kvm_reset_coprocs(vcpu); 71 kvm_reset_coprocs(vcpu);
71 72
73 /*
74 * Additional reset state handling that PSCI may have imposed on us.
75 * Must be done after all the sys_reg reset.
76 */
77 if (READ_ONCE(vcpu->arch.reset_state.reset)) {
78 unsigned long target_pc = vcpu->arch.reset_state.pc;
79
80 /* Gracefully handle Thumb2 entry point */
81 if (target_pc & 1) {
82 target_pc &= ~1UL;
83 vcpu_set_thumb(vcpu);
84 }
85
86 /* Propagate caller endianness */
87 if (vcpu->arch.reset_state.be)
88 kvm_vcpu_set_be(vcpu);
89
90 *vcpu_pc(vcpu) = target_pc;
91 vcpu_set_reg(vcpu, 0, vcpu->arch.reset_state.r0);
92
93 vcpu->arch.reset_state.reset = false;
94 }
95
72 /* Reset arch_timer context */ 96 /* Reset arch_timer context */
73 return kvm_timer_vcpu_reset(vcpu); 97 return kvm_timer_vcpu_reset(vcpu);
74} 98}
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index 3b73813c6b04..23e8c93515d4 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -75,8 +75,7 @@ void __init n2100_map_io(void)
75/* 75/*
76 * N2100 PCI. 76 * N2100 PCI.
77 */ 77 */
78static int __init 78static int n2100_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
79n2100_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
80{ 79{
81 int irq; 80 int irq;
82 81
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index a8b291f00109..dae514c8276a 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -152,6 +152,10 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
152 mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) && 152 mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
153 (cx->mpu_logic_state == PWRDM_POWER_OFF); 153 (cx->mpu_logic_state == PWRDM_POWER_OFF);
154 154
155 /* Enter broadcast mode for periodic timers */
156 tick_broadcast_enable();
157
158 /* Enter broadcast mode for one-shot timers */
155 tick_broadcast_enter(); 159 tick_broadcast_enter();
156 160
157 /* 161 /*
@@ -218,15 +222,6 @@ fail:
218 return index; 222 return index;
219} 223}
220 224
221/*
222 * For each cpu, setup the broadcast timer because local timers
223 * stops for the states above C1.
224 */
225static void omap_setup_broadcast_timer(void *arg)
226{
227 tick_broadcast_enable();
228}
229
230static struct cpuidle_driver omap4_idle_driver = { 225static struct cpuidle_driver omap4_idle_driver = {
231 .name = "omap4_idle", 226 .name = "omap4_idle",
232 .owner = THIS_MODULE, 227 .owner = THIS_MODULE,
@@ -319,8 +314,5 @@ int __init omap4_idle_init(void)
319 if (!cpu_clkdm[0] || !cpu_clkdm[1]) 314 if (!cpu_clkdm[0] || !cpu_clkdm[1])
320 return -ENODEV; 315 return -ENODEV;
321 316
322 /* Configure the broadcast timer on each cpu */
323 on_each_cpu(omap_setup_broadcast_timer, NULL, 1);
324
325 return cpuidle_register(idle_driver, cpu_online_mask); 317 return cpuidle_register(idle_driver, cpu_online_mask);
326} 318}
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index f86b72d1d59e..1444b4b4bd9f 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -83,6 +83,7 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
83 u32 enable_mask, enable_shift; 83 u32 enable_mask, enable_shift;
84 u32 pipd_mask, pipd_shift; 84 u32 pipd_mask, pipd_shift;
85 u32 reg; 85 u32 reg;
86 int ret;
86 87
87 if (dsi_id == 0) { 88 if (dsi_id == 0) {
88 enable_mask = OMAP4_DSI1_LANEENABLE_MASK; 89 enable_mask = OMAP4_DSI1_LANEENABLE_MASK;
@@ -98,7 +99,11 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
98 return -ENODEV; 99 return -ENODEV;
99 } 100 }
100 101
101 regmap_read(omap4_dsi_mux_syscon, OMAP4_DSIPHY_SYSCON_OFFSET, &reg); 102 ret = regmap_read(omap4_dsi_mux_syscon,
103 OMAP4_DSIPHY_SYSCON_OFFSET,
104 &reg);
105 if (ret)
106 return ret;
102 107
103 reg &= ~enable_mask; 108 reg &= ~enable_mask;
104 reg &= ~pipd_mask; 109 reg &= ~pipd_mask;
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index fc5fb776a710..17558be4bf0a 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -50,6 +50,9 @@
50#define OMAP4_NR_BANKS 4 50#define OMAP4_NR_BANKS 4
51#define OMAP4_NR_IRQS 128 51#define OMAP4_NR_IRQS 128
52 52
53#define SYS_NIRQ1_EXT_SYS_IRQ_1 7
54#define SYS_NIRQ2_EXT_SYS_IRQ_2 119
55
53static void __iomem *wakeupgen_base; 56static void __iomem *wakeupgen_base;
54static void __iomem *sar_base; 57static void __iomem *sar_base;
55static DEFINE_RAW_SPINLOCK(wakeupgen_lock); 58static DEFINE_RAW_SPINLOCK(wakeupgen_lock);
@@ -153,6 +156,37 @@ static void wakeupgen_unmask(struct irq_data *d)
153 irq_chip_unmask_parent(d); 156 irq_chip_unmask_parent(d);
154} 157}
155 158
159/*
160 * The sys_nirq pins bypass peripheral modules and are wired directly
161 * to MPUSS wakeupgen. They get automatically inverted for GIC.
162 */
163static int wakeupgen_irq_set_type(struct irq_data *d, unsigned int type)
164{
165 bool inverted = false;
166
167 switch (type) {
168 case IRQ_TYPE_LEVEL_LOW:
169 type &= ~IRQ_TYPE_LEVEL_MASK;
170 type |= IRQ_TYPE_LEVEL_HIGH;
171 inverted = true;
172 break;
173 case IRQ_TYPE_EDGE_FALLING:
174 type &= ~IRQ_TYPE_EDGE_BOTH;
175 type |= IRQ_TYPE_EDGE_RISING;
176 inverted = true;
177 break;
178 default:
179 break;
180 }
181
182 if (inverted && d->hwirq != SYS_NIRQ1_EXT_SYS_IRQ_1 &&
183 d->hwirq != SYS_NIRQ2_EXT_SYS_IRQ_2)
184 pr_warn("wakeupgen: irq%li polarity inverted in dts\n",
185 d->hwirq);
186
187 return irq_chip_set_type_parent(d, type);
188}
189
156#ifdef CONFIG_HOTPLUG_CPU 190#ifdef CONFIG_HOTPLUG_CPU
157static DEFINE_PER_CPU(u32 [MAX_NR_REG_BANKS], irqmasks); 191static DEFINE_PER_CPU(u32 [MAX_NR_REG_BANKS], irqmasks);
158 192
@@ -446,7 +480,7 @@ static struct irq_chip wakeupgen_chip = {
446 .irq_mask = wakeupgen_mask, 480 .irq_mask = wakeupgen_mask,
447 .irq_unmask = wakeupgen_unmask, 481 .irq_unmask = wakeupgen_unmask,
448 .irq_retrigger = irq_chip_retrigger_hierarchy, 482 .irq_retrigger = irq_chip_retrigger_hierarchy,
449 .irq_set_type = irq_chip_set_type_parent, 483 .irq_set_type = wakeupgen_irq_set_type,
450 .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, 484 .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND,
451#ifdef CONFIG_SMP 485#ifdef CONFIG_SMP
452 .irq_set_affinity = irq_chip_set_affinity_parent, 486 .irq_set_affinity = irq_chip_set_affinity_parent,
diff --git a/arch/arm/mach-tango/pm.c b/arch/arm/mach-tango/pm.c
index 028e50c6383f..a32c3b631484 100644
--- a/arch/arm/mach-tango/pm.c
+++ b/arch/arm/mach-tango/pm.c
@@ -3,6 +3,7 @@
3#include <linux/suspend.h> 3#include <linux/suspend.h>
4#include <asm/suspend.h> 4#include <asm/suspend.h>
5#include "smc.h" 5#include "smc.h"
6#include "pm.h"
6 7
7static int tango_pm_powerdown(unsigned long arg) 8static int tango_pm_powerdown(unsigned long arg)
8{ 9{
@@ -24,10 +25,7 @@ static const struct platform_suspend_ops tango_pm_ops = {
24 .valid = suspend_valid_only_mem, 25 .valid = suspend_valid_only_mem,
25}; 26};
26 27
27static int __init tango_pm_init(void) 28void __init tango_pm_init(void)
28{ 29{
29 suspend_set_ops(&tango_pm_ops); 30 suspend_set_ops(&tango_pm_ops);
30 return 0;
31} 31}
32
33late_initcall(tango_pm_init);
diff --git a/arch/arm/mach-tango/pm.h b/arch/arm/mach-tango/pm.h
new file mode 100644
index 000000000000..35ea705a0ee2
--- /dev/null
+++ b/arch/arm/mach-tango/pm.h
@@ -0,0 +1,7 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2
3#ifdef CONFIG_SUSPEND
4void __init tango_pm_init(void);
5#else
6#define tango_pm_init NULL
7#endif
diff --git a/arch/arm/mach-tango/setup.c b/arch/arm/mach-tango/setup.c
index 677dd7b5efd9..824f90737b04 100644
--- a/arch/arm/mach-tango/setup.c
+++ b/arch/arm/mach-tango/setup.c
@@ -2,6 +2,7 @@
2#include <asm/mach/arch.h> 2#include <asm/mach/arch.h>
3#include <asm/hardware/cache-l2x0.h> 3#include <asm/hardware/cache-l2x0.h>
4#include "smc.h" 4#include "smc.h"
5#include "pm.h"
5 6
6static void tango_l2c_write(unsigned long val, unsigned int reg) 7static void tango_l2c_write(unsigned long val, unsigned int reg)
7{ 8{
@@ -15,4 +16,5 @@ DT_MACHINE_START(TANGO_DT, "Sigma Tango DT")
15 .dt_compat = tango_dt_compat, 16 .dt_compat = tango_dt_compat,
16 .l2c_aux_mask = ~0, 17 .l2c_aux_mask = ~0,
17 .l2c_write_sec = tango_l2c_write, 18 .l2c_write_sec = tango_l2c_write,
19 .init_late = tango_pm_init,
18MACHINE_END 20MACHINE_END
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index f1e2922e447c..1e3e08a1c456 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -2390,4 +2390,6 @@ void arch_teardown_dma_ops(struct device *dev)
2390 return; 2390 return;
2391 2391
2392 arm_teardown_iommu_dma_ops(dev); 2392 arm_teardown_iommu_dma_ops(dev);
2393 /* Let arch_setup_dma_ops() start again from scratch upon re-probe */
2394 set_dma_ops(dev, NULL);
2393} 2395}
diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c
index ed36dcab80f1..f51919974183 100644
--- a/arch/arm/plat-pxa/ssp.c
+++ b/arch/arm/plat-pxa/ssp.c
@@ -190,8 +190,6 @@ static int pxa_ssp_remove(struct platform_device *pdev)
190 if (ssp == NULL) 190 if (ssp == NULL)
191 return -ENODEV; 191 return -ENODEV;
192 192
193 iounmap(ssp->mmio_base);
194
195 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 193 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
196 release_mem_region(res->start, resource_size(res)); 194 release_mem_region(res->start, resource_size(res));
197 195
@@ -201,7 +199,6 @@ static int pxa_ssp_remove(struct platform_device *pdev)
201 list_del(&ssp->node); 199 list_del(&ssp->node);
202 mutex_unlock(&ssp_lock); 200 mutex_unlock(&ssp_lock);
203 201
204 kfree(ssp);
205 return 0; 202 return 0;
206} 203}
207 204
diff --git a/arch/arm/probes/kprobes/opt-arm.c b/arch/arm/probes/kprobes/opt-arm.c
index 2c118a6ab358..0dc23fc227ed 100644
--- a/arch/arm/probes/kprobes/opt-arm.c
+++ b/arch/arm/probes/kprobes/opt-arm.c
@@ -247,7 +247,7 @@ int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *or
247 } 247 }
248 248
249 /* Copy arch-dep-instance from template. */ 249 /* Copy arch-dep-instance from template. */
250 memcpy(code, (unsigned char *)optprobe_template_entry, 250 memcpy(code, (unsigned long *)&optprobe_template_entry,
251 TMPL_END_IDX * sizeof(kprobe_opcode_t)); 251 TMPL_END_IDX * sizeof(kprobe_opcode_t));
252 252
253 /* Adjust buffer according to instruction. */ 253 /* Adjust buffer according to instruction. */
diff --git a/arch/arm/xen/mm.c b/arch/arm/xen/mm.c
index cb44aa290e73..e1d44b903dfc 100644
--- a/arch/arm/xen/mm.c
+++ b/arch/arm/xen/mm.c
@@ -7,7 +7,6 @@
7#include <linux/of_address.h> 7#include <linux/of_address.h>
8#include <linux/slab.h> 8#include <linux/slab.h>
9#include <linux/types.h> 9#include <linux/types.h>
10#include <linux/dma-mapping.h>
11#include <linux/vmalloc.h> 10#include <linux/vmalloc.h>
12#include <linux/swiotlb.h> 11#include <linux/swiotlb.h>
13 12
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-09 21:40:06 -0500