diff options
Diffstat (limited to 'arch/arm64/include/asm/io.h')
-rw-r--r-- | arch/arm64/include/asm/io.h | 122 |
1 files changed, 25 insertions, 97 deletions
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 79f1d519221f..deb6d2b6df0b 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h | |||
@@ -34,26 +34,31 @@ | |||
34 | /* | 34 | /* |
35 | * Generic IO read/write. These perform native-endian accesses. | 35 | * Generic IO read/write. These perform native-endian accesses. |
36 | */ | 36 | */ |
37 | #define __raw_writeb __raw_writeb | ||
37 | static inline void __raw_writeb(u8 val, volatile void __iomem *addr) | 38 | static inline void __raw_writeb(u8 val, volatile void __iomem *addr) |
38 | { | 39 | { |
39 | asm volatile("strb %w0, [%1]" : : "r" (val), "r" (addr)); | 40 | asm volatile("strb %w0, [%1]" : : "r" (val), "r" (addr)); |
40 | } | 41 | } |
41 | 42 | ||
43 | #define __raw_writew __raw_writew | ||
42 | static inline void __raw_writew(u16 val, volatile void __iomem *addr) | 44 | static inline void __raw_writew(u16 val, volatile void __iomem *addr) |
43 | { | 45 | { |
44 | asm volatile("strh %w0, [%1]" : : "r" (val), "r" (addr)); | 46 | asm volatile("strh %w0, [%1]" : : "r" (val), "r" (addr)); |
45 | } | 47 | } |
46 | 48 | ||
49 | #define __raw_writel __raw_writel | ||
47 | static inline void __raw_writel(u32 val, volatile void __iomem *addr) | 50 | static inline void __raw_writel(u32 val, volatile void __iomem *addr) |
48 | { | 51 | { |
49 | asm volatile("str %w0, [%1]" : : "r" (val), "r" (addr)); | 52 | asm volatile("str %w0, [%1]" : : "r" (val), "r" (addr)); |
50 | } | 53 | } |
51 | 54 | ||
55 | #define __raw_writeq __raw_writeq | ||
52 | static inline void __raw_writeq(u64 val, volatile void __iomem *addr) | 56 | static inline void __raw_writeq(u64 val, volatile void __iomem *addr) |
53 | { | 57 | { |
54 | asm volatile("str %0, [%1]" : : "r" (val), "r" (addr)); | 58 | asm volatile("str %0, [%1]" : : "r" (val), "r" (addr)); |
55 | } | 59 | } |
56 | 60 | ||
61 | #define __raw_readb __raw_readb | ||
57 | static inline u8 __raw_readb(const volatile void __iomem *addr) | 62 | static inline u8 __raw_readb(const volatile void __iomem *addr) |
58 | { | 63 | { |
59 | u8 val; | 64 | u8 val; |
@@ -61,6 +66,7 @@ static inline u8 __raw_readb(const volatile void __iomem *addr) | |||
61 | return val; | 66 | return val; |
62 | } | 67 | } |
63 | 68 | ||
69 | #define __raw_readw __raw_readw | ||
64 | static inline u16 __raw_readw(const volatile void __iomem *addr) | 70 | static inline u16 __raw_readw(const volatile void __iomem *addr) |
65 | { | 71 | { |
66 | u16 val; | 72 | u16 val; |
@@ -68,6 +74,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr) | |||
68 | return val; | 74 | return val; |
69 | } | 75 | } |
70 | 76 | ||
77 | #define __raw_readl __raw_readl | ||
71 | static inline u32 __raw_readl(const volatile void __iomem *addr) | 78 | static inline u32 __raw_readl(const volatile void __iomem *addr) |
72 | { | 79 | { |
73 | u32 val; | 80 | u32 val; |
@@ -75,6 +82,7 @@ static inline u32 __raw_readl(const volatile void __iomem *addr) | |||
75 | return val; | 82 | return val; |
76 | } | 83 | } |
77 | 84 | ||
85 | #define __raw_readq __raw_readq | ||
78 | static inline u64 __raw_readq(const volatile void __iomem *addr) | 86 | static inline u64 __raw_readq(const volatile void __iomem *addr) |
79 | { | 87 | { |
80 | u64 val; | 88 | u64 val; |
@@ -125,94 +133,6 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) | |||
125 | #define IO_SPACE_LIMIT (SZ_32M - 1) | 133 | #define IO_SPACE_LIMIT (SZ_32M - 1) |
126 | #define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_32M)) | 134 | #define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_32M)) |
127 | 135 | ||
128 | static inline u8 inb(unsigned long addr) | ||
129 | { | ||
130 | return readb(addr + PCI_IOBASE); | ||
131 | } | ||
132 | |||
133 | static inline u16 inw(unsigned long addr) | ||
134 | { | ||
135 | return readw(addr + PCI_IOBASE); | ||
136 | } | ||
137 | |||
138 | static inline u32 inl(unsigned long addr) | ||
139 | { | ||
140 | return readl(addr + PCI_IOBASE); | ||
141 | } | ||
142 | |||
143 | static inline void outb(u8 b, unsigned long addr) | ||
144 | { | ||
145 | writeb(b, addr + PCI_IOBASE); | ||
146 | } | ||
147 | |||
148 | static inline void outw(u16 b, unsigned long addr) | ||
149 | { | ||
150 | writew(b, addr + PCI_IOBASE); | ||
151 | } | ||
152 | |||
153 | static inline void outl(u32 b, unsigned long addr) | ||
154 | { | ||
155 | writel(b, addr + PCI_IOBASE); | ||
156 | } | ||
157 | |||
158 | #define inb_p(addr) inb(addr) | ||
159 | #define inw_p(addr) inw(addr) | ||
160 | #define inl_p(addr) inl(addr) | ||
161 | |||
162 | #define outb_p(x, addr) outb((x), (addr)) | ||
163 | #define outw_p(x, addr) outw((x), (addr)) | ||
164 | #define outl_p(x, addr) outl((x), (addr)) | ||
165 | |||
166 | static inline void insb(unsigned long addr, void *buffer, int count) | ||
167 | { | ||
168 | u8 *buf = buffer; | ||
169 | while (count--) | ||
170 | *buf++ = __raw_readb(addr + PCI_IOBASE); | ||
171 | } | ||
172 | |||
173 | static inline void insw(unsigned long addr, void *buffer, int count) | ||
174 | { | ||
175 | u16 *buf = buffer; | ||
176 | while (count--) | ||
177 | *buf++ = __raw_readw(addr + PCI_IOBASE); | ||
178 | } | ||
179 | |||
180 | static inline void insl(unsigned long addr, void *buffer, int count) | ||
181 | { | ||
182 | u32 *buf = buffer; | ||
183 | while (count--) | ||
184 | *buf++ = __raw_readl(addr + PCI_IOBASE); | ||
185 | } | ||
186 | |||
187 | static inline void outsb(unsigned long addr, const void *buffer, int count) | ||
188 | { | ||
189 | const u8 *buf = buffer; | ||
190 | while (count--) | ||
191 | __raw_writeb(*buf++, addr + PCI_IOBASE); | ||
192 | } | ||
193 | |||
194 | static inline void outsw(unsigned long addr, const void *buffer, int count) | ||
195 | { | ||
196 | const u16 *buf = buffer; | ||
197 | while (count--) | ||
198 | __raw_writew(*buf++, addr + PCI_IOBASE); | ||
199 | } | ||
200 | |||
201 | static inline void outsl(unsigned long addr, const void *buffer, int count) | ||
202 | { | ||
203 | const u32 *buf = buffer; | ||
204 | while (count--) | ||
205 | __raw_writel(*buf++, addr + PCI_IOBASE); | ||
206 | } | ||
207 | |||
208 | #define insb_p(port,to,len) insb(port,to,len) | ||
209 | #define insw_p(port,to,len) insw(port,to,len) | ||
210 | #define insl_p(port,to,len) insl(port,to,len) | ||
211 | |||
212 | #define outsb_p(port,from,len) outsb(port,from,len) | ||
213 | #define outsw_p(port,from,len) outsw(port,from,len) | ||
214 | #define outsl_p(port,from,len) outsl(port,from,len) | ||
215 | |||
216 | /* | 136 | /* |
217 | * String version of I/O memory access operations. | 137 | * String version of I/O memory access operations. |
218 | */ | 138 | */ |
@@ -236,18 +156,14 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size); | |||
236 | #define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) | 156 | #define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) |
237 | #define iounmap __iounmap | 157 | #define iounmap __iounmap |
238 | 158 | ||
239 | #define ARCH_HAS_IOREMAP_WC | ||
240 | #include <asm-generic/iomap.h> | ||
241 | |||
242 | /* | 159 | /* |
243 | * More restrictive address range checking than the default implementation | 160 | * io{read,write}{16,32}be() macros |
244 | * (PHYS_OFFSET and PHYS_MASK taken into account). | ||
245 | */ | 161 | */ |
246 | #define ARCH_HAS_VALID_PHYS_ADDR_RANGE | 162 | #define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; }) |
247 | extern int valid_phys_addr_range(phys_addr_t addr, size_t size); | 163 | #define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; }) |
248 | extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); | ||
249 | 164 | ||
250 | extern int devmem_is_allowed(unsigned long pfn); | 165 | #define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); }) |
166 | #define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); }) | ||
251 | 167 | ||
252 | /* | 168 | /* |
253 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | 169 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem |
@@ -260,6 +176,18 @@ extern int devmem_is_allowed(unsigned long pfn); | |||
260 | */ | 176 | */ |
261 | #define xlate_dev_kmem_ptr(p) p | 177 | #define xlate_dev_kmem_ptr(p) p |
262 | 178 | ||
179 | #include <asm-generic/io.h> | ||
180 | |||
181 | /* | ||
182 | * More restrictive address range checking than the default implementation | ||
183 | * (PHYS_OFFSET and PHYS_MASK taken into account). | ||
184 | */ | ||
185 | #define ARCH_HAS_VALID_PHYS_ADDR_RANGE | ||
186 | extern int valid_phys_addr_range(phys_addr_t addr, size_t size); | ||
187 | extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); | ||
188 | |||
189 | extern int devmem_is_allowed(unsigned long pfn); | ||
190 | |||
263 | struct bio_vec; | 191 | struct bio_vec; |
264 | extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1, | 192 | extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1, |
265 | const struct bio_vec *vec2); | 193 | const struct bio_vec *vec2); |