diff options
Diffstat (limited to 'arch/arm/plat-s5p/include/plat/irqs.h')
-rw-r--r-- | arch/arm/plat-s5p/include/plat/irqs.h | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h index ba9121c60a2a..144dbfc6506d 100644 --- a/arch/arm/plat-s5p/include/plat/irqs.h +++ b/arch/arm/plat-s5p/include/plat/irqs.h | |||
@@ -37,41 +37,6 @@ | |||
37 | #define IRQ_VIC1_BASE S5P_VIC1_BASE | 37 | #define IRQ_VIC1_BASE S5P_VIC1_BASE |
38 | #define IRQ_VIC2_BASE S5P_VIC2_BASE | 38 | #define IRQ_VIC2_BASE S5P_VIC2_BASE |
39 | 39 | ||
40 | /* UART interrupts, each UART has 4 intterupts per channel so | ||
41 | * use the space between the ISA and S3C main interrupts. Note, these | ||
42 | * are not in the same order as the S3C24XX series! */ | ||
43 | |||
44 | #define IRQ_S5P_UART_BASE0 (16) | ||
45 | #define IRQ_S5P_UART_BASE1 (20) | ||
46 | #define IRQ_S5P_UART_BASE2 (24) | ||
47 | #define IRQ_S5P_UART_BASE3 (28) | ||
48 | |||
49 | #define UART_IRQ_RXD (0) | ||
50 | #define UART_IRQ_ERR (1) | ||
51 | #define UART_IRQ_TXD (2) | ||
52 | |||
53 | #define IRQ_S5P_UART_RX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_RXD) | ||
54 | #define IRQ_S5P_UART_TX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_TXD) | ||
55 | #define IRQ_S5P_UART_ERR0 (IRQ_S5P_UART_BASE0 + UART_IRQ_ERR) | ||
56 | |||
57 | #define IRQ_S5P_UART_RX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_RXD) | ||
58 | #define IRQ_S5P_UART_TX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_TXD) | ||
59 | #define IRQ_S5P_UART_ERR1 (IRQ_S5P_UART_BASE1 + UART_IRQ_ERR) | ||
60 | |||
61 | #define IRQ_S5P_UART_RX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_RXD) | ||
62 | #define IRQ_S5P_UART_TX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_TXD) | ||
63 | #define IRQ_S5P_UART_ERR2 (IRQ_S5P_UART_BASE2 + UART_IRQ_ERR) | ||
64 | |||
65 | #define IRQ_S5P_UART_RX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_RXD) | ||
66 | #define IRQ_S5P_UART_TX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_TXD) | ||
67 | #define IRQ_S5P_UART_ERR3 (IRQ_S5P_UART_BASE3 + UART_IRQ_ERR) | ||
68 | |||
69 | /* S3C compatibilty defines */ | ||
70 | #define IRQ_S3CUART_RX0 IRQ_S5P_UART_RX0 | ||
71 | #define IRQ_S3CUART_RX1 IRQ_S5P_UART_RX1 | ||
72 | #define IRQ_S3CUART_RX2 IRQ_S5P_UART_RX2 | ||
73 | #define IRQ_S3CUART_RX3 IRQ_S5P_UART_RX3 | ||
74 | |||
75 | /* VIC based IRQs */ | 40 | /* VIC based IRQs */ |
76 | 41 | ||
77 | #define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x)) | 42 | #define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x)) |