1 files changed, 28 insertions, 29 deletions

diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index ee9bb363d606..806cc4f63516 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -18,30 +18,39 @@
 
 static DEFINE_RAW_SPINLOCK(cpu_asid_lock);
 unsigned int cpu_last_asid = ASID_FIRST_VERSION;
-#ifdef CONFIG_SMP
-DEFINE_PER_CPU(struct mm_struct *, current_mm);
-#endif
 
 #ifdef CONFIG_ARM_LPAE
-#define cpu_set_asid(asid) {                                            \
-        unsigned long ttbl, ttbh;                                       \
-        asm volatile(                                                   \
-        "       mrrc    p15, 0, %0, %1, c2              @ read TTBR0\n" \
-        "       mov     %1, %2, lsl #(48 - 32)          @ set ASID\n"   \
-        "       mcrr    p15, 0, %0, %1, c2              @ set TTBR0\n"  \
-        : "=&r" (ttbl), "=&r" (ttbh)                                    \
-        : "r" (asid & ~ASID_MASK));                                     \
+void cpu_set_reserved_ttbr0(void)
+{
+        unsigned long ttbl = __pa(swapper_pg_dir);
+        unsigned long ttbh = 0;
+
+        /*
+         * Set TTBR0 to swapper_pg_dir which contains only global entries. The
+         * ASID is set to 0.
+         */
+        asm volatile(
+        "       mcrr    p15, 0, %0, %1, c2              @ set TTBR0\n"
+        :
+        : "r" (ttbl), "r" (ttbh));
+        isb();
 }
 #else
-#define cpu_set_asid(asid) \
-        asm("   mcr     p15, 0, %0, c13, c0, 1\n" : : "r" (asid))
+void cpu_set_reserved_ttbr0(void)
+{
+        u32 ttb;
+        /* Copy TTBR1 into TTBR0 */
+        asm volatile(
+        "       mrc     p15, 0, %0, c2, c0, 1           @ read TTBR1\n"
+        "       mcr     p15, 0, %0, c2, c0, 0           @ set TTBR0\n"
+        : "=r" (ttb));
+        isb();
+}
 #endif
 
 /*
  * We fork()ed a process, and we need a new context for the child
- * to run in.  We reserve version 0 for initial tasks so we will
- * always allocate an ASID. The ASID 0 is reserved for the TTBR
- * register changing sequence.
+ * to run in.
  */
 void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 {
@@ -51,9 +60,7 @@ void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 
 static void flush_context(void)
 {
-        /* set the reserved ASID before flushing the TLB */
-        cpu_set_asid(0);
-        isb();
+        cpu_set_reserved_ttbr0();
         local_flush_tlb_all();
         if (icache_is_vivt_asid_tagged()) {
                 __flush_icache_all();
@@ -98,14 +105,7 @@ static void reset_context(void *info)
 {
         unsigned int asid;
         unsigned int cpu = smp_processor_id();
-        struct mm_struct *mm = per_cpu(current_mm, cpu);
-
-        /*
-         * Check if a current_mm was set on this CPU as it might still
-         * be in the early booting stages and using the reserved ASID.
-         */
-        if (!mm)
-                return;
+        struct mm_struct *mm = current->active_mm;
 
         smp_rmb();
         asid = cpu_last_asid + cpu + 1;
@@ -114,8 +114,7 @@ static void reset_context(void *info)
         set_mm_context(mm, asid);
 
         /* set the new ASID */
-        cpu_set_asid(mm->context.id);
-        isb();
+        cpu_switch_mm(mm->pgd, mm);
 }
 
 #else